| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner |
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| 4 | * |
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| 5 | * Copyright (c) 2009 Jochen Friedrich <jochen@scram.de> |
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| 6 | */ |
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| 7 | |
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| 8 | #ifndef MC44S803_PRIV_H |
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| 9 | #define MC44S803_PRIV_H |
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| 10 | |
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| 11 | /* This driver is based on the information available in the datasheet |
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| 12 | http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf |
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| 13 | |
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| 14 | SPI or I2C Address : 0xc0-0xc6 |
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| 15 | |
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| 16 | Reg.No | Function |
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| 17 | ------------------------------------------- |
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| 18 | 00 | Power Down |
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| 19 | 01 | Reference Oszillator |
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| 20 | 02 | Reference Dividers |
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| 21 | 03 | Mixer and Reference Buffer |
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| 22 | 04 | Reset/Serial Out |
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| 23 | 05 | LO 1 |
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| 24 | 06 | LO 2 |
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| 25 | 07 | Circuit Adjust |
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| 26 | 08 | Test |
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| 27 | 09 | Digital Tune |
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| 28 | 0A | LNA AGC |
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| 29 | 0B | Data Register Address |
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| 30 | 0C | Regulator Test |
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| 31 | 0D | VCO Test |
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| 32 | 0E | LNA Gain/Input Power |
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| 33 | 0F | ID Bits |
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| 34 | |
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| 35 | */ |
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| 36 | |
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| 37 | #define MC44S803_OSC 26000000 /* 26 MHz */ |
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| 38 | #define MC44S803_IF1 1086000000 /* 1086 MHz */ |
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| 39 | #define MC44S803_IF2 36125000 /* 36.125 MHz */ |
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| 40 | |
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| 41 | #define MC44S803_REG_POWER 0 |
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| 42 | #define MC44S803_REG_REFOSC 1 |
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| 43 | #define MC44S803_REG_REFDIV 2 |
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| 44 | #define MC44S803_REG_MIXER 3 |
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| 45 | #define MC44S803_REG_RESET 4 |
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| 46 | #define MC44S803_REG_LO1 5 |
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| 47 | #define MC44S803_REG_LO2 6 |
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| 48 | #define MC44S803_REG_CIRCADJ 7 |
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| 49 | #define MC44S803_REG_TEST 8 |
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| 50 | #define MC44S803_REG_DIGTUNE 9 |
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| 51 | #define MC44S803_REG_LNAAGC 0x0A |
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| 52 | #define MC44S803_REG_DATAREG 0x0B |
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| 53 | #define MC44S803_REG_REGTEST 0x0C |
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| 54 | #define MC44S803_REG_VCOTEST 0x0D |
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| 55 | #define MC44S803_REG_LNAGAIN 0x0E |
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| 56 | #define MC44S803_REG_ID 0x0F |
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| 57 | |
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| 58 | /* Register definitions */ |
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| 59 | #define MC44S803_ADDR 0x0F |
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| 60 | #define MC44S803_ADDR_S 0 |
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| 61 | /* REG_POWER */ |
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| 62 | #define MC44S803_POWER 0xFFFFF0 |
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| 63 | #define MC44S803_POWER_S 4 |
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| 64 | /* REG_REFOSC */ |
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| 65 | #define MC44S803_REFOSC 0x1FF0 |
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| 66 | #define MC44S803_REFOSC_S 4 |
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| 67 | #define MC44S803_OSCSEL 0x2000 |
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| 68 | #define MC44S803_OSCSEL_S 13 |
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| 69 | /* REG_REFDIV */ |
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| 70 | #define MC44S803_R2 0x1FF0 |
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| 71 | #define MC44S803_R2_S 4 |
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| 72 | #define MC44S803_REFBUF_EN 0x2000 |
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| 73 | #define MC44S803_REFBUF_EN_S 13 |
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| 74 | #define MC44S803_R1 0x7C000 |
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| 75 | #define MC44S803_R1_S 14 |
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| 76 | /* REG_MIXER */ |
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| 77 | #define MC44S803_R3 0x70 |
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| 78 | #define MC44S803_R3_S 4 |
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| 79 | #define MC44S803_MUX3 0x80 |
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| 80 | #define MC44S803_MUX3_S 7 |
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| 81 | #define MC44S803_MUX4 0x100 |
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| 82 | #define MC44S803_MUX4_S 8 |
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| 83 | #define MC44S803_OSC_SCR 0x200 |
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| 84 | #define MC44S803_OSC_SCR_S 9 |
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| 85 | #define MC44S803_TRI_STATE 0x400 |
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| 86 | #define MC44S803_TRI_STATE_S 10 |
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| 87 | #define MC44S803_BUF_GAIN 0x800 |
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| 88 | #define MC44S803_BUF_GAIN_S 11 |
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| 89 | #define MC44S803_BUF_IO 0x1000 |
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| 90 | #define MC44S803_BUF_IO_S 12 |
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| 91 | #define MC44S803_MIXER_RES 0xFE000 |
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| 92 | #define MC44S803_MIXER_RES_S 13 |
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| 93 | /* REG_RESET */ |
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| 94 | #define MC44S803_RS 0x10 |
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| 95 | #define MC44S803_RS_S 4 |
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| 96 | #define MC44S803_SO 0x20 |
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| 97 | #define MC44S803_SO_S 5 |
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| 98 | /* REG_LO1 */ |
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| 99 | #define MC44S803_LO1 0xFFF0 |
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| 100 | #define MC44S803_LO1_S 4 |
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| 101 | /* REG_LO2 */ |
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| 102 | #define MC44S803_LO2 0x7FFF0 |
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| 103 | #define MC44S803_LO2_S 4 |
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| 104 | /* REG_CIRCADJ */ |
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| 105 | #define MC44S803_G1 0x20 |
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| 106 | #define MC44S803_G1_S 5 |
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| 107 | #define MC44S803_G3 0x80 |
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| 108 | #define MC44S803_G3_S 7 |
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| 109 | #define MC44S803_CIRCADJ_RES 0x300 |
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| 110 | #define MC44S803_CIRCADJ_RES_S 8 |
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| 111 | #define MC44S803_G6 0x400 |
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| 112 | #define MC44S803_G6_S 10 |
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| 113 | #define MC44S803_G7 0x800 |
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| 114 | #define MC44S803_G7_S 11 |
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| 115 | #define MC44S803_S1 0x1000 |
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| 116 | #define MC44S803_S1_S 12 |
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| 117 | #define MC44S803_LP 0x7E000 |
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| 118 | #define MC44S803_LP_S 13 |
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| 119 | #define MC44S803_CLRF 0x80000 |
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| 120 | #define MC44S803_CLRF_S 19 |
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| 121 | #define MC44S803_CLIF 0x100000 |
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| 122 | #define MC44S803_CLIF_S 20 |
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| 123 | /* REG_TEST */ |
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| 124 | /* REG_DIGTUNE */ |
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| 125 | #define MC44S803_DA 0xF0 |
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| 126 | #define MC44S803_DA_S 4 |
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| 127 | #define MC44S803_XOD 0x300 |
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| 128 | #define MC44S803_XOD_S 8 |
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| 129 | #define MC44S803_RST 0x10000 |
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| 130 | #define MC44S803_RST_S 16 |
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| 131 | #define MC44S803_LO_REF 0x1FFF00 |
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| 132 | #define MC44S803_LO_REF_S 8 |
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| 133 | #define MC44S803_AT 0x200000 |
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| 134 | #define MC44S803_AT_S 21 |
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| 135 | #define MC44S803_MT 0x400000 |
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| 136 | #define MC44S803_MT_S 22 |
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| 137 | /* REG_LNAAGC */ |
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| 138 | #define MC44S803_G 0x3F0 |
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| 139 | #define MC44S803_G_S 4 |
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| 140 | #define MC44S803_AT1 0x400 |
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| 141 | #define MC44S803_AT1_S 10 |
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| 142 | #define MC44S803_AT2 0x800 |
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| 143 | #define MC44S803_AT2_S 11 |
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| 144 | #define MC44S803_HL_GR_EN 0x8000 |
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| 145 | #define MC44S803_HL_GR_EN_S 15 |
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| 146 | #define MC44S803_AGC_AN_DIG 0x10000 |
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| 147 | #define MC44S803_AGC_AN_DIG_S 16 |
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| 148 | #define MC44S803_ATTEN_EN 0x20000 |
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| 149 | #define MC44S803_ATTEN_EN_S 17 |
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| 150 | #define MC44S803_AGC_READ_EN 0x40000 |
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| 151 | #define MC44S803_AGC_READ_EN_S 18 |
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| 152 | #define MC44S803_LNA0 0x80000 |
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| 153 | #define MC44S803_LNA0_S 19 |
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| 154 | #define MC44S803_AGC_SEL 0x100000 |
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| 155 | #define MC44S803_AGC_SEL_S 20 |
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| 156 | #define MC44S803_AT0 0x200000 |
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| 157 | #define MC44S803_AT0_S 21 |
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| 158 | #define MC44S803_B 0xC00000 |
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| 159 | #define MC44S803_B_S 22 |
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| 160 | /* REG_DATAREG */ |
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| 161 | #define MC44S803_D 0xF0 |
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| 162 | #define MC44S803_D_S 4 |
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| 163 | /* REG_REGTEST */ |
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| 164 | /* REG_VCOTEST */ |
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| 165 | /* REG_LNAGAIN */ |
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| 166 | #define MC44S803_IF_PWR 0x700 |
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| 167 | #define MC44S803_IF_PWR_S 8 |
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| 168 | #define MC44S803_RF_PWR 0x3800 |
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| 169 | #define MC44S803_RF_PWR_S 11 |
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| 170 | #define MC44S803_LNA_GAIN 0xFC000 |
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| 171 | #define MC44S803_LNA_GAIN_S 14 |
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| 172 | /* REG_ID */ |
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| 173 | #define MC44S803_ID 0x3E00 |
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| 174 | #define MC44S803_ID_S 9 |
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| 175 | |
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| 176 | /* Some macros to read/write fields */ |
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| 177 | |
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| 178 | /* First shift, then mask */ |
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| 179 | #define MC44S803_REG_SM(_val, _reg) \ |
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| 180 | (((_val) << _reg##_S) & (_reg)) |
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| 181 | |
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| 182 | /* First mask, then shift */ |
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| 183 | #define MC44S803_REG_MS(_val, _reg) \ |
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| 184 | (((_val) & (_reg)) >> _reg##_S) |
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| 185 | |
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| 186 | struct mc44s803_priv { |
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| 187 | struct mc44s803_config *cfg; |
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| 188 | struct i2c_adapter *i2c; |
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| 189 | struct dvb_frontend *fe; |
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| 190 | |
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| 191 | u32 frequency; |
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| 192 | }; |
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| 193 | |
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| 194 | #endif |
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| 195 | |
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