1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * Copyright (C) 2004 Texas Instruments, Inc. |
4 | * |
5 | * Some parts based tps65010.c: |
6 | * Copyright (C) 2004 Texas Instruments and |
7 | * Copyright (C) 2004-2005 David Brownell |
8 | * |
9 | * Some parts based on tlv320aic24.c: |
10 | * Copyright (C) by Kai Svahn <kai.svahn@nokia.com> |
11 | * |
12 | * Changes for interrupt handling and clean-up by |
13 | * Tony Lindgren <tony@atomide.com> and Imre Deak <imre.deak@nokia.com> |
14 | * Cleanup and generalized support for voltage setting by |
15 | * Juha Yrjola |
16 | * Added support for controlling VCORE and regulator sleep states, |
17 | * Amit Kucheria <amit.kucheria@nokia.com> |
18 | * Copyright (C) 2005, 2006 Nokia Corporation |
19 | */ |
20 | |
21 | #include <linux/module.h> |
22 | #include <linux/i2c.h> |
23 | #include <linux/interrupt.h> |
24 | #include <linux/sched.h> |
25 | #include <linux/mutex.h> |
26 | #include <linux/workqueue.h> |
27 | #include <linux/delay.h> |
28 | #include <linux/rtc.h> |
29 | #include <linux/bcd.h> |
30 | #include <linux/slab.h> |
31 | #include <linux/mfd/menelaus.h> |
32 | #include <linux/gpio.h> |
33 | |
34 | #include <asm/mach/irq.h> |
35 | |
36 | |
37 | #define DRIVER_NAME "menelaus" |
38 | |
39 | #define MENELAUS_I2C_ADDRESS 0x72 |
40 | |
41 | #define MENELAUS_REV 0x01 |
42 | #define MENELAUS_VCORE_CTRL1 0x02 |
43 | #define MENELAUS_VCORE_CTRL2 0x03 |
44 | #define MENELAUS_VCORE_CTRL3 0x04 |
45 | #define MENELAUS_VCORE_CTRL4 0x05 |
46 | #define MENELAUS_VCORE_CTRL5 0x06 |
47 | #define MENELAUS_DCDC_CTRL1 0x07 |
48 | #define MENELAUS_DCDC_CTRL2 0x08 |
49 | #define MENELAUS_DCDC_CTRL3 0x09 |
50 | #define MENELAUS_LDO_CTRL1 0x0A |
51 | #define MENELAUS_LDO_CTRL2 0x0B |
52 | #define MENELAUS_LDO_CTRL3 0x0C |
53 | #define MENELAUS_LDO_CTRL4 0x0D |
54 | #define MENELAUS_LDO_CTRL5 0x0E |
55 | #define MENELAUS_LDO_CTRL6 0x0F |
56 | #define MENELAUS_LDO_CTRL7 0x10 |
57 | #define MENELAUS_LDO_CTRL8 0x11 |
58 | #define MENELAUS_SLEEP_CTRL1 0x12 |
59 | #define MENELAUS_SLEEP_CTRL2 0x13 |
60 | #define MENELAUS_DEVICE_OFF 0x14 |
61 | #define MENELAUS_OSC_CTRL 0x15 |
62 | #define MENELAUS_DETECT_CTRL 0x16 |
63 | #define MENELAUS_INT_MASK1 0x17 |
64 | #define MENELAUS_INT_MASK2 0x18 |
65 | #define MENELAUS_INT_STATUS1 0x19 |
66 | #define MENELAUS_INT_STATUS2 0x1A |
67 | #define MENELAUS_INT_ACK1 0x1B |
68 | #define MENELAUS_INT_ACK2 0x1C |
69 | #define MENELAUS_GPIO_CTRL 0x1D |
70 | #define MENELAUS_GPIO_IN 0x1E |
71 | #define MENELAUS_GPIO_OUT 0x1F |
72 | #define MENELAUS_BBSMS 0x20 |
73 | #define MENELAUS_RTC_CTRL 0x21 |
74 | #define MENELAUS_RTC_UPDATE 0x22 |
75 | #define MENELAUS_RTC_SEC 0x23 |
76 | #define MENELAUS_RTC_MIN 0x24 |
77 | #define MENELAUS_RTC_HR 0x25 |
78 | #define MENELAUS_RTC_DAY 0x26 |
79 | #define MENELAUS_RTC_MON 0x27 |
80 | #define MENELAUS_RTC_YR 0x28 |
81 | #define MENELAUS_RTC_WKDAY 0x29 |
82 | #define MENELAUS_RTC_AL_SEC 0x2A |
83 | #define MENELAUS_RTC_AL_MIN 0x2B |
84 | #define MENELAUS_RTC_AL_HR 0x2C |
85 | #define MENELAUS_RTC_AL_DAY 0x2D |
86 | #define MENELAUS_RTC_AL_MON 0x2E |
87 | #define MENELAUS_RTC_AL_YR 0x2F |
88 | #define MENELAUS_RTC_COMP_MSB 0x30 |
89 | #define MENELAUS_RTC_COMP_LSB 0x31 |
90 | #define MENELAUS_S1_PULL_EN 0x32 |
91 | #define MENELAUS_S1_PULL_DIR 0x33 |
92 | #define MENELAUS_S2_PULL_EN 0x34 |
93 | #define MENELAUS_S2_PULL_DIR 0x35 |
94 | #define MENELAUS_MCT_CTRL1 0x36 |
95 | #define MENELAUS_MCT_CTRL2 0x37 |
96 | #define MENELAUS_MCT_CTRL3 0x38 |
97 | #define MENELAUS_MCT_PIN_ST 0x39 |
98 | #define MENELAUS_DEBOUNCE1 0x3A |
99 | |
100 | #define IH_MENELAUS_IRQS 12 |
101 | #define MENELAUS_MMC_S1CD_IRQ 0 /* MMC slot 1 card change */ |
102 | #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */ |
103 | #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */ |
104 | #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */ |
105 | #define MENELAUS_LOWBAT_IRQ 4 /* Low battery */ |
106 | #define MENELAUS_HOTDIE_IRQ 5 /* Hot die detect */ |
107 | #define MENELAUS_UVLO_IRQ 6 /* UVLO detect */ |
108 | #define MENELAUS_TSHUT_IRQ 7 /* Thermal shutdown */ |
109 | #define MENELAUS_RTCTMR_IRQ 8 /* RTC timer */ |
110 | #define MENELAUS_RTCALM_IRQ 9 /* RTC alarm */ |
111 | #define MENELAUS_RTCERR_IRQ 10 /* RTC error */ |
112 | #define MENELAUS_PSHBTN_IRQ 11 /* Push button */ |
113 | #define MENELAUS_RESERVED12_IRQ 12 /* Reserved */ |
114 | #define MENELAUS_RESERVED13_IRQ 13 /* Reserved */ |
115 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ |
116 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ |
117 | |
118 | /* VCORE_CTRL1 register */ |
119 | #define VCORE_CTRL1_BYP_COMP (1 << 5) |
120 | #define VCORE_CTRL1_HW_NSW (1 << 7) |
121 | |
122 | /* GPIO_CTRL register */ |
123 | #define GPIO_CTRL_SLOTSELEN (1 << 5) |
124 | #define GPIO_CTRL_SLPCTLEN (1 << 6) |
125 | #define GPIO1_DIR_INPUT (1 << 0) |
126 | #define GPIO2_DIR_INPUT (1 << 1) |
127 | #define GPIO3_DIR_INPUT (1 << 2) |
128 | |
129 | /* MCT_CTRL1 register */ |
130 | #define MCT_CTRL1_S1_CMD_OD (1 << 2) |
131 | #define MCT_CTRL1_S2_CMD_OD (1 << 3) |
132 | |
133 | /* MCT_CTRL2 register */ |
134 | #define MCT_CTRL2_VS2_SEL_D0 (1 << 0) |
135 | #define MCT_CTRL2_VS2_SEL_D1 (1 << 1) |
136 | #define MCT_CTRL2_S1CD_BUFEN (1 << 4) |
137 | #define MCT_CTRL2_S2CD_BUFEN (1 << 5) |
138 | #define MCT_CTRL2_S1CD_DBEN (1 << 6) |
139 | #define MCT_CTRL2_S2CD_BEN (1 << 7) |
140 | |
141 | /* MCT_CTRL3 register */ |
142 | #define MCT_CTRL3_SLOT1_EN (1 << 0) |
143 | #define MCT_CTRL3_SLOT2_EN (1 << 1) |
144 | #define MCT_CTRL3_S1_AUTO_EN (1 << 2) |
145 | #define MCT_CTRL3_S2_AUTO_EN (1 << 3) |
146 | |
147 | /* MCT_PIN_ST register */ |
148 | #define MCT_PIN_ST_S1_CD_ST (1 << 0) |
149 | #define MCT_PIN_ST_S2_CD_ST (1 << 1) |
150 | |
151 | static void menelaus_work(struct work_struct *_menelaus); |
152 | |
153 | struct menelaus_chip { |
154 | struct mutex lock; |
155 | struct i2c_client *client; |
156 | struct work_struct work; |
157 | #ifdef CONFIG_RTC_DRV_TWL92330 |
158 | struct rtc_device *rtc; |
159 | u8 rtc_control; |
160 | unsigned uie:1; |
161 | #endif |
162 | unsigned vcore_hw_mode:1; |
163 | u8 mask1, mask2; |
164 | void (*handlers[16])(struct menelaus_chip *); |
165 | void (*mmc_callback)(void *data, u8 mask); |
166 | void *mmc_callback_data; |
167 | }; |
168 | |
169 | static struct menelaus_chip *the_menelaus; |
170 | |
171 | static int menelaus_write_reg(int reg, u8 value) |
172 | { |
173 | int val = i2c_smbus_write_byte_data(client: the_menelaus->client, command: reg, value); |
174 | |
175 | if (val < 0) { |
176 | pr_err(DRIVER_NAME ": write error" ); |
177 | return val; |
178 | } |
179 | |
180 | return 0; |
181 | } |
182 | |
183 | static int menelaus_read_reg(int reg) |
184 | { |
185 | int val = i2c_smbus_read_byte_data(client: the_menelaus->client, command: reg); |
186 | |
187 | if (val < 0) |
188 | pr_err(DRIVER_NAME ": read error" ); |
189 | |
190 | return val; |
191 | } |
192 | |
193 | static int menelaus_enable_irq(int irq) |
194 | { |
195 | if (irq > 7) { |
196 | irq -= 8; |
197 | the_menelaus->mask2 &= ~(1 << irq); |
198 | return menelaus_write_reg(MENELAUS_INT_MASK2, |
199 | value: the_menelaus->mask2); |
200 | } else { |
201 | the_menelaus->mask1 &= ~(1 << irq); |
202 | return menelaus_write_reg(MENELAUS_INT_MASK1, |
203 | value: the_menelaus->mask1); |
204 | } |
205 | } |
206 | |
207 | static int menelaus_disable_irq(int irq) |
208 | { |
209 | if (irq > 7) { |
210 | irq -= 8; |
211 | the_menelaus->mask2 |= (1 << irq); |
212 | return menelaus_write_reg(MENELAUS_INT_MASK2, |
213 | value: the_menelaus->mask2); |
214 | } else { |
215 | the_menelaus->mask1 |= (1 << irq); |
216 | return menelaus_write_reg(MENELAUS_INT_MASK1, |
217 | value: the_menelaus->mask1); |
218 | } |
219 | } |
220 | |
221 | static int menelaus_ack_irq(int irq) |
222 | { |
223 | if (irq > 7) |
224 | return menelaus_write_reg(MENELAUS_INT_ACK2, value: 1 << (irq - 8)); |
225 | else |
226 | return menelaus_write_reg(MENELAUS_INT_ACK1, value: 1 << irq); |
227 | } |
228 | |
229 | /* Adds a handler for an interrupt. Does not run in interrupt context */ |
230 | static int menelaus_add_irq_work(int irq, |
231 | void (*handler)(struct menelaus_chip *)) |
232 | { |
233 | int ret = 0; |
234 | |
235 | mutex_lock(&the_menelaus->lock); |
236 | the_menelaus->handlers[irq] = handler; |
237 | ret = menelaus_enable_irq(irq); |
238 | mutex_unlock(lock: &the_menelaus->lock); |
239 | |
240 | return ret; |
241 | } |
242 | |
243 | /* Removes handler for an interrupt */ |
244 | static int menelaus_remove_irq_work(int irq) |
245 | { |
246 | int ret = 0; |
247 | |
248 | mutex_lock(&the_menelaus->lock); |
249 | ret = menelaus_disable_irq(irq); |
250 | the_menelaus->handlers[irq] = NULL; |
251 | mutex_unlock(lock: &the_menelaus->lock); |
252 | |
253 | return ret; |
254 | } |
255 | |
256 | /* |
257 | * Gets scheduled when a card detect interrupt happens. Note that in some cases |
258 | * this line is wired to card cover switch rather than the card detect switch |
259 | * in each slot. In this case the cards are not seen by menelaus. |
260 | * FIXME: Add handling for D1 too |
261 | */ |
262 | static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw) |
263 | { |
264 | int reg; |
265 | unsigned char card_mask = 0; |
266 | |
267 | reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST); |
268 | if (reg < 0) |
269 | return; |
270 | |
271 | if (!(reg & 0x1)) |
272 | card_mask |= MCT_PIN_ST_S1_CD_ST; |
273 | |
274 | if (!(reg & 0x2)) |
275 | card_mask |= MCT_PIN_ST_S2_CD_ST; |
276 | |
277 | if (menelaus_hw->mmc_callback) |
278 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, |
279 | card_mask); |
280 | } |
281 | |
282 | /* |
283 | * Toggles the MMC slots between open-drain and push-pull mode. |
284 | */ |
285 | int menelaus_set_mmc_opendrain(int slot, int enable) |
286 | { |
287 | int ret, val; |
288 | |
289 | if (slot != 1 && slot != 2) |
290 | return -EINVAL; |
291 | mutex_lock(&the_menelaus->lock); |
292 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL1); |
293 | if (ret < 0) { |
294 | mutex_unlock(lock: &the_menelaus->lock); |
295 | return ret; |
296 | } |
297 | val = ret; |
298 | if (slot == 1) { |
299 | if (enable) |
300 | val |= MCT_CTRL1_S1_CMD_OD; |
301 | else |
302 | val &= ~MCT_CTRL1_S1_CMD_OD; |
303 | } else { |
304 | if (enable) |
305 | val |= MCT_CTRL1_S2_CMD_OD; |
306 | else |
307 | val &= ~MCT_CTRL1_S2_CMD_OD; |
308 | } |
309 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, value: val); |
310 | mutex_unlock(lock: &the_menelaus->lock); |
311 | |
312 | return ret; |
313 | } |
314 | EXPORT_SYMBOL(menelaus_set_mmc_opendrain); |
315 | |
316 | int menelaus_set_slot_sel(int enable) |
317 | { |
318 | int ret; |
319 | |
320 | mutex_lock(&the_menelaus->lock); |
321 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
322 | if (ret < 0) |
323 | goto out; |
324 | ret |= GPIO2_DIR_INPUT; |
325 | if (enable) |
326 | ret |= GPIO_CTRL_SLOTSELEN; |
327 | else |
328 | ret &= ~GPIO_CTRL_SLOTSELEN; |
329 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, value: ret); |
330 | out: |
331 | mutex_unlock(lock: &the_menelaus->lock); |
332 | return ret; |
333 | } |
334 | EXPORT_SYMBOL(menelaus_set_slot_sel); |
335 | |
336 | int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) |
337 | { |
338 | int ret, val; |
339 | |
340 | if (slot != 1 && slot != 2) |
341 | return -EINVAL; |
342 | if (power >= 3) |
343 | return -EINVAL; |
344 | |
345 | mutex_lock(&the_menelaus->lock); |
346 | |
347 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
348 | if (ret < 0) |
349 | goto out; |
350 | val = ret; |
351 | if (slot == 1) { |
352 | if (cd_en) |
353 | val |= MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN; |
354 | else |
355 | val &= ~(MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN); |
356 | } else { |
357 | if (cd_en) |
358 | val |= MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN; |
359 | else |
360 | val &= ~(MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN); |
361 | } |
362 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, value: val); |
363 | if (ret < 0) |
364 | goto out; |
365 | |
366 | ret = menelaus_read_reg(MENELAUS_MCT_CTRL3); |
367 | if (ret < 0) |
368 | goto out; |
369 | val = ret; |
370 | if (slot == 1) { |
371 | if (enable) |
372 | val |= MCT_CTRL3_SLOT1_EN; |
373 | else |
374 | val &= ~MCT_CTRL3_SLOT1_EN; |
375 | } else { |
376 | int b; |
377 | |
378 | if (enable) |
379 | val |= MCT_CTRL3_SLOT2_EN; |
380 | else |
381 | val &= ~MCT_CTRL3_SLOT2_EN; |
382 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
383 | b &= ~(MCT_CTRL2_VS2_SEL_D0 | MCT_CTRL2_VS2_SEL_D1); |
384 | b |= power; |
385 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, value: b); |
386 | if (ret < 0) |
387 | goto out; |
388 | } |
389 | /* Disable autonomous shutdown */ |
390 | val &= ~(MCT_CTRL3_S1_AUTO_EN | MCT_CTRL3_S2_AUTO_EN); |
391 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, value: val); |
392 | out: |
393 | mutex_unlock(lock: &the_menelaus->lock); |
394 | return ret; |
395 | } |
396 | EXPORT_SYMBOL(menelaus_set_mmc_slot); |
397 | |
398 | int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), |
399 | void *data) |
400 | { |
401 | int ret = 0; |
402 | |
403 | the_menelaus->mmc_callback_data = data; |
404 | the_menelaus->mmc_callback = callback; |
405 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ, |
406 | handler: menelaus_mmc_cd_work); |
407 | if (ret < 0) |
408 | return ret; |
409 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ, |
410 | handler: menelaus_mmc_cd_work); |
411 | if (ret < 0) |
412 | return ret; |
413 | ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ, |
414 | handler: menelaus_mmc_cd_work); |
415 | if (ret < 0) |
416 | return ret; |
417 | ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ, |
418 | handler: menelaus_mmc_cd_work); |
419 | |
420 | return ret; |
421 | } |
422 | EXPORT_SYMBOL(menelaus_register_mmc_callback); |
423 | |
424 | void menelaus_unregister_mmc_callback(void) |
425 | { |
426 | menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ); |
427 | menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ); |
428 | menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ); |
429 | menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ); |
430 | |
431 | the_menelaus->mmc_callback = NULL; |
432 | the_menelaus->mmc_callback_data = NULL; |
433 | } |
434 | EXPORT_SYMBOL(menelaus_unregister_mmc_callback); |
435 | |
436 | struct menelaus_vtg { |
437 | const char *name; |
438 | u8 vtg_reg; |
439 | u8 vtg_shift; |
440 | u8 vtg_bits; |
441 | u8 mode_reg; |
442 | }; |
443 | |
444 | struct menelaus_vtg_value { |
445 | u16 vtg; |
446 | u16 val; |
447 | }; |
448 | |
449 | static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, |
450 | int vtg_val, int mode) |
451 | { |
452 | int val, ret; |
453 | struct i2c_client *c = the_menelaus->client; |
454 | |
455 | mutex_lock(&the_menelaus->lock); |
456 | |
457 | ret = menelaus_read_reg(reg: vtg->vtg_reg); |
458 | if (ret < 0) |
459 | goto out; |
460 | val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift); |
461 | val |= vtg_val << vtg->vtg_shift; |
462 | |
463 | dev_dbg(&c->dev, "Setting voltage '%s'" |
464 | "to %d mV (reg 0x%02x, val 0x%02x)\n" , |
465 | vtg->name, mV, vtg->vtg_reg, val); |
466 | |
467 | ret = menelaus_write_reg(reg: vtg->vtg_reg, value: val); |
468 | if (ret < 0) |
469 | goto out; |
470 | ret = menelaus_write_reg(reg: vtg->mode_reg, value: mode); |
471 | out: |
472 | mutex_unlock(lock: &the_menelaus->lock); |
473 | if (ret == 0) { |
474 | /* Wait for voltage to stabilize */ |
475 | msleep(msecs: 1); |
476 | } |
477 | return ret; |
478 | } |
479 | |
480 | static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl, |
481 | int n) |
482 | { |
483 | int i; |
484 | |
485 | for (i = 0; i < n; i++, tbl++) |
486 | if (tbl->vtg == vtg) |
487 | return tbl->val; |
488 | return -EINVAL; |
489 | } |
490 | |
491 | /* |
492 | * Vcore can be programmed in two ways: |
493 | * SW-controlled: Required voltage is programmed into VCORE_CTRL1 |
494 | * HW-controlled: Required range (roof-floor) is programmed into VCORE_CTRL3 |
495 | * and VCORE_CTRL4 |
496 | * |
497 | * Call correct 'set' function accordingly |
498 | */ |
499 | |
500 | static const struct menelaus_vtg_value vcore_values[] = { |
501 | { 1000, 0 }, |
502 | { 1025, 1 }, |
503 | { 1050, 2 }, |
504 | { 1075, 3 }, |
505 | { 1100, 4 }, |
506 | { 1125, 5 }, |
507 | { 1150, 6 }, |
508 | { 1175, 7 }, |
509 | { 1200, 8 }, |
510 | { 1225, 9 }, |
511 | { 1250, 10 }, |
512 | { 1275, 11 }, |
513 | { 1300, 12 }, |
514 | { 1325, 13 }, |
515 | { 1350, 14 }, |
516 | { 1375, 15 }, |
517 | { 1400, 16 }, |
518 | { 1425, 17 }, |
519 | { 1450, 18 }, |
520 | }; |
521 | |
522 | int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) |
523 | { |
524 | int fval, rval, val, ret; |
525 | struct i2c_client *c = the_menelaus->client; |
526 | |
527 | rval = menelaus_get_vtg_value(vtg: roof_mV, tbl: vcore_values, |
528 | ARRAY_SIZE(vcore_values)); |
529 | if (rval < 0) |
530 | return -EINVAL; |
531 | fval = menelaus_get_vtg_value(vtg: floor_mV, tbl: vcore_values, |
532 | ARRAY_SIZE(vcore_values)); |
533 | if (fval < 0) |
534 | return -EINVAL; |
535 | |
536 | dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n" , |
537 | floor_mV, roof_mV); |
538 | |
539 | mutex_lock(&the_menelaus->lock); |
540 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, value: fval); |
541 | if (ret < 0) |
542 | goto out; |
543 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, value: rval); |
544 | if (ret < 0) |
545 | goto out; |
546 | if (!the_menelaus->vcore_hw_mode) { |
547 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); |
548 | /* HW mode, turn OFF byte comparator */ |
549 | val |= (VCORE_CTRL1_HW_NSW | VCORE_CTRL1_BYP_COMP); |
550 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, value: val); |
551 | the_menelaus->vcore_hw_mode = 1; |
552 | } |
553 | msleep(msecs: 1); |
554 | out: |
555 | mutex_unlock(lock: &the_menelaus->lock); |
556 | return ret; |
557 | } |
558 | |
559 | static const struct menelaus_vtg vmem_vtg = { |
560 | .name = "VMEM" , |
561 | .vtg_reg = MENELAUS_LDO_CTRL1, |
562 | .vtg_shift = 0, |
563 | .vtg_bits = 2, |
564 | .mode_reg = MENELAUS_LDO_CTRL3, |
565 | }; |
566 | |
567 | static const struct menelaus_vtg_value vmem_values[] = { |
568 | { 1500, 0 }, |
569 | { 1800, 1 }, |
570 | { 1900, 2 }, |
571 | { 2500, 3 }, |
572 | }; |
573 | |
574 | int menelaus_set_vmem(unsigned int mV) |
575 | { |
576 | int val; |
577 | |
578 | if (mV == 0) |
579 | return menelaus_set_voltage(vtg: &vmem_vtg, mV: 0, vtg_val: 0, mode: 0); |
580 | |
581 | val = menelaus_get_vtg_value(vtg: mV, tbl: vmem_values, ARRAY_SIZE(vmem_values)); |
582 | if (val < 0) |
583 | return -EINVAL; |
584 | return menelaus_set_voltage(vtg: &vmem_vtg, mV, vtg_val: val, mode: 0x02); |
585 | } |
586 | EXPORT_SYMBOL(menelaus_set_vmem); |
587 | |
588 | static const struct menelaus_vtg vio_vtg = { |
589 | .name = "VIO" , |
590 | .vtg_reg = MENELAUS_LDO_CTRL1, |
591 | .vtg_shift = 2, |
592 | .vtg_bits = 2, |
593 | .mode_reg = MENELAUS_LDO_CTRL4, |
594 | }; |
595 | |
596 | static const struct menelaus_vtg_value vio_values[] = { |
597 | { 1500, 0 }, |
598 | { 1800, 1 }, |
599 | { 2500, 2 }, |
600 | { 2800, 3 }, |
601 | }; |
602 | |
603 | int menelaus_set_vio(unsigned int mV) |
604 | { |
605 | int val; |
606 | |
607 | if (mV == 0) |
608 | return menelaus_set_voltage(vtg: &vio_vtg, mV: 0, vtg_val: 0, mode: 0); |
609 | |
610 | val = menelaus_get_vtg_value(vtg: mV, tbl: vio_values, ARRAY_SIZE(vio_values)); |
611 | if (val < 0) |
612 | return -EINVAL; |
613 | return menelaus_set_voltage(vtg: &vio_vtg, mV, vtg_val: val, mode: 0x02); |
614 | } |
615 | EXPORT_SYMBOL(menelaus_set_vio); |
616 | |
617 | static const struct menelaus_vtg_value vdcdc_values[] = { |
618 | { .vtg: 1500, .val: 0 }, |
619 | { 1800, 1 }, |
620 | { 2000, 2 }, |
621 | { 2200, 3 }, |
622 | { 2400, 4 }, |
623 | { 2800, 5 }, |
624 | { 3000, 6 }, |
625 | { 3300, 7 }, |
626 | }; |
627 | |
628 | static const struct menelaus_vtg vdcdc2_vtg = { |
629 | .name = "VDCDC2" , |
630 | .vtg_reg = MENELAUS_DCDC_CTRL1, |
631 | .vtg_shift = 0, |
632 | .vtg_bits = 3, |
633 | .mode_reg = MENELAUS_DCDC_CTRL2, |
634 | }; |
635 | |
636 | static const struct menelaus_vtg vdcdc3_vtg = { |
637 | .name = "VDCDC3" , |
638 | .vtg_reg = MENELAUS_DCDC_CTRL1, |
639 | .vtg_shift = 3, |
640 | .vtg_bits = 3, |
641 | .mode_reg = MENELAUS_DCDC_CTRL3, |
642 | }; |
643 | |
644 | int menelaus_set_vdcdc(int dcdc, unsigned int mV) |
645 | { |
646 | const struct menelaus_vtg *vtg; |
647 | int val; |
648 | |
649 | if (dcdc != 2 && dcdc != 3) |
650 | return -EINVAL; |
651 | if (dcdc == 2) |
652 | vtg = &vdcdc2_vtg; |
653 | else |
654 | vtg = &vdcdc3_vtg; |
655 | |
656 | if (mV == 0) |
657 | return menelaus_set_voltage(vtg, mV: 0, vtg_val: 0, mode: 0); |
658 | |
659 | val = menelaus_get_vtg_value(vtg: mV, tbl: vdcdc_values, |
660 | ARRAY_SIZE(vdcdc_values)); |
661 | if (val < 0) |
662 | return -EINVAL; |
663 | return menelaus_set_voltage(vtg, mV, vtg_val: val, mode: 0x03); |
664 | } |
665 | |
666 | static const struct menelaus_vtg_value vmmc_values[] = { |
667 | { 1850, 0 }, |
668 | { 2800, 1 }, |
669 | { 3000, 2 }, |
670 | { 3100, 3 }, |
671 | }; |
672 | |
673 | static const struct menelaus_vtg vmmc_vtg = { |
674 | .name = "VMMC" , |
675 | .vtg_reg = MENELAUS_LDO_CTRL1, |
676 | .vtg_shift = 6, |
677 | .vtg_bits = 2, |
678 | .mode_reg = MENELAUS_LDO_CTRL7, |
679 | }; |
680 | |
681 | int menelaus_set_vmmc(unsigned int mV) |
682 | { |
683 | int val; |
684 | |
685 | if (mV == 0) |
686 | return menelaus_set_voltage(vtg: &vmmc_vtg, mV: 0, vtg_val: 0, mode: 0); |
687 | |
688 | val = menelaus_get_vtg_value(vtg: mV, tbl: vmmc_values, ARRAY_SIZE(vmmc_values)); |
689 | if (val < 0) |
690 | return -EINVAL; |
691 | return menelaus_set_voltage(vtg: &vmmc_vtg, mV, vtg_val: val, mode: 0x02); |
692 | } |
693 | EXPORT_SYMBOL(menelaus_set_vmmc); |
694 | |
695 | |
696 | static const struct menelaus_vtg_value vaux_values[] = { |
697 | { .vtg: 1500, .val: 0 }, |
698 | { 1800, 1 }, |
699 | { 2500, 2 }, |
700 | { 2800, 3 }, |
701 | }; |
702 | |
703 | static const struct menelaus_vtg vaux_vtg = { |
704 | .name = "VAUX" , |
705 | .vtg_reg = MENELAUS_LDO_CTRL1, |
706 | .vtg_shift = 4, |
707 | .vtg_bits = 2, |
708 | .mode_reg = MENELAUS_LDO_CTRL6, |
709 | }; |
710 | |
711 | int menelaus_set_vaux(unsigned int mV) |
712 | { |
713 | int val; |
714 | |
715 | if (mV == 0) |
716 | return menelaus_set_voltage(vtg: &vaux_vtg, mV: 0, vtg_val: 0, mode: 0); |
717 | |
718 | val = menelaus_get_vtg_value(vtg: mV, tbl: vaux_values, ARRAY_SIZE(vaux_values)); |
719 | if (val < 0) |
720 | return -EINVAL; |
721 | return menelaus_set_voltage(vtg: &vaux_vtg, mV, vtg_val: val, mode: 0x02); |
722 | } |
723 | EXPORT_SYMBOL(menelaus_set_vaux); |
724 | |
725 | int menelaus_get_slot_pin_states(void) |
726 | { |
727 | return menelaus_read_reg(MENELAUS_MCT_PIN_ST); |
728 | } |
729 | EXPORT_SYMBOL(menelaus_get_slot_pin_states); |
730 | |
731 | int menelaus_set_regulator_sleep(int enable, u32 val) |
732 | { |
733 | int t, ret; |
734 | struct i2c_client *c = the_menelaus->client; |
735 | |
736 | mutex_lock(&the_menelaus->lock); |
737 | ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, value: val); |
738 | if (ret < 0) |
739 | goto out; |
740 | |
741 | dev_dbg(&c->dev, "regulator sleep configuration: %02x\n" , val); |
742 | |
743 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
744 | if (ret < 0) |
745 | goto out; |
746 | t = (GPIO_CTRL_SLPCTLEN | GPIO3_DIR_INPUT); |
747 | if (enable) |
748 | ret |= t; |
749 | else |
750 | ret &= ~t; |
751 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, value: ret); |
752 | out: |
753 | mutex_unlock(lock: &the_menelaus->lock); |
754 | return ret; |
755 | } |
756 | |
757 | /*-----------------------------------------------------------------------*/ |
758 | |
759 | /* Handles Menelaus interrupts. Does not run in interrupt context */ |
760 | static void menelaus_work(struct work_struct *_menelaus) |
761 | { |
762 | struct menelaus_chip *menelaus = |
763 | container_of(_menelaus, struct menelaus_chip, work); |
764 | void (*handler)(struct menelaus_chip *menelaus); |
765 | |
766 | while (1) { |
767 | unsigned isr; |
768 | |
769 | isr = (menelaus_read_reg(MENELAUS_INT_STATUS2) |
770 | & ~menelaus->mask2) << 8; |
771 | isr |= menelaus_read_reg(MENELAUS_INT_STATUS1) |
772 | & ~menelaus->mask1; |
773 | if (!isr) |
774 | break; |
775 | |
776 | while (isr) { |
777 | int irq = fls(x: isr) - 1; |
778 | isr &= ~(1 << irq); |
779 | |
780 | mutex_lock(&menelaus->lock); |
781 | menelaus_disable_irq(irq); |
782 | menelaus_ack_irq(irq); |
783 | handler = menelaus->handlers[irq]; |
784 | if (handler) |
785 | handler(menelaus); |
786 | menelaus_enable_irq(irq); |
787 | mutex_unlock(lock: &menelaus->lock); |
788 | } |
789 | } |
790 | enable_irq(irq: menelaus->client->irq); |
791 | } |
792 | |
793 | /* |
794 | * We cannot use I2C in interrupt context, so we just schedule work. |
795 | */ |
796 | static irqreturn_t menelaus_irq(int irq, void *_menelaus) |
797 | { |
798 | struct menelaus_chip *menelaus = _menelaus; |
799 | |
800 | disable_irq_nosync(irq); |
801 | (void)schedule_work(work: &menelaus->work); |
802 | |
803 | return IRQ_HANDLED; |
804 | } |
805 | |
806 | /*-----------------------------------------------------------------------*/ |
807 | |
808 | /* |
809 | * The RTC needs to be set once, then it runs on backup battery power. |
810 | * It supports alarms, including system wake alarms (from some modes); |
811 | * and 1/second IRQs if requested. |
812 | */ |
813 | #ifdef CONFIG_RTC_DRV_TWL92330 |
814 | |
815 | #define RTC_CTRL_RTC_EN (1 << 0) |
816 | #define RTC_CTRL_AL_EN (1 << 1) |
817 | #define RTC_CTRL_MODE12 (1 << 2) |
818 | #define RTC_CTRL_EVERY_MASK (3 << 3) |
819 | #define RTC_CTRL_EVERY_SEC (0 << 3) |
820 | #define RTC_CTRL_EVERY_MIN (1 << 3) |
821 | #define RTC_CTRL_EVERY_HR (2 << 3) |
822 | #define RTC_CTRL_EVERY_DAY (3 << 3) |
823 | |
824 | #define RTC_UPDATE_EVERY 0x08 |
825 | |
826 | #define RTC_HR_PM (1 << 7) |
827 | |
828 | static void menelaus_to_time(char *regs, struct rtc_time *t) |
829 | { |
830 | t->tm_sec = bcd2bin(regs[0]); |
831 | t->tm_min = bcd2bin(regs[1]); |
832 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
833 | t->tm_hour = bcd2bin(regs[2] & 0x1f) - 1; |
834 | if (regs[2] & RTC_HR_PM) |
835 | t->tm_hour += 12; |
836 | } else |
837 | t->tm_hour = bcd2bin(regs[2] & 0x3f); |
838 | t->tm_mday = bcd2bin(regs[3]); |
839 | t->tm_mon = bcd2bin(regs[4]) - 1; |
840 | t->tm_year = bcd2bin(regs[5]) + 100; |
841 | } |
842 | |
843 | static int time_to_menelaus(struct rtc_time *t, int regnum) |
844 | { |
845 | int hour, status; |
846 | |
847 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_sec)); |
848 | if (status < 0) |
849 | goto fail; |
850 | |
851 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_min)); |
852 | if (status < 0) |
853 | goto fail; |
854 | |
855 | if (the_menelaus->rtc_control & RTC_CTRL_MODE12) { |
856 | hour = t->tm_hour + 1; |
857 | if (hour > 12) |
858 | hour = RTC_HR_PM | bin2bcd(hour - 12); |
859 | else |
860 | hour = bin2bcd(hour); |
861 | } else |
862 | hour = bin2bcd(t->tm_hour); |
863 | status = menelaus_write_reg(regnum++, hour); |
864 | if (status < 0) |
865 | goto fail; |
866 | |
867 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mday)); |
868 | if (status < 0) |
869 | goto fail; |
870 | |
871 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mon + 1)); |
872 | if (status < 0) |
873 | goto fail; |
874 | |
875 | status = menelaus_write_reg(regnum++, bin2bcd(t->tm_year - 100)); |
876 | if (status < 0) |
877 | goto fail; |
878 | |
879 | return 0; |
880 | fail: |
881 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x, err %d\n" , |
882 | --regnum, status); |
883 | return status; |
884 | } |
885 | |
886 | static int menelaus_read_time(struct device *dev, struct rtc_time *t) |
887 | { |
888 | struct i2c_msg msg[2]; |
889 | char regs[7]; |
890 | int status; |
891 | |
892 | /* block read date and time registers */ |
893 | regs[0] = MENELAUS_RTC_SEC; |
894 | |
895 | msg[0].addr = MENELAUS_I2C_ADDRESS; |
896 | msg[0].flags = 0; |
897 | msg[0].len = 1; |
898 | msg[0].buf = regs; |
899 | |
900 | msg[1].addr = MENELAUS_I2C_ADDRESS; |
901 | msg[1].flags = I2C_M_RD; |
902 | msg[1].len = sizeof(regs); |
903 | msg[1].buf = regs; |
904 | |
905 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); |
906 | if (status != 2) { |
907 | dev_err(dev, "%s error %d\n" , "read" , status); |
908 | return -EIO; |
909 | } |
910 | |
911 | menelaus_to_time(regs, t); |
912 | t->tm_wday = bcd2bin(regs[6]); |
913 | |
914 | return 0; |
915 | } |
916 | |
917 | static int menelaus_set_time(struct device *dev, struct rtc_time *t) |
918 | { |
919 | int status; |
920 | |
921 | /* write date and time registers */ |
922 | status = time_to_menelaus(t, MENELAUS_RTC_SEC); |
923 | if (status < 0) |
924 | return status; |
925 | status = menelaus_write_reg(MENELAUS_RTC_WKDAY, bin2bcd(t->tm_wday)); |
926 | if (status < 0) { |
927 | dev_err(&the_menelaus->client->dev, "rtc write reg %02x " |
928 | "err %d\n" , MENELAUS_RTC_WKDAY, status); |
929 | return status; |
930 | } |
931 | |
932 | /* now commit the write */ |
933 | status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY); |
934 | if (status < 0) |
935 | dev_err(&the_menelaus->client->dev, "rtc commit time, err %d\n" , |
936 | status); |
937 | |
938 | return 0; |
939 | } |
940 | |
941 | static int menelaus_read_alarm(struct device *dev, struct rtc_wkalrm *w) |
942 | { |
943 | struct i2c_msg msg[2]; |
944 | char regs[6]; |
945 | int status; |
946 | |
947 | /* block read alarm registers */ |
948 | regs[0] = MENELAUS_RTC_AL_SEC; |
949 | |
950 | msg[0].addr = MENELAUS_I2C_ADDRESS; |
951 | msg[0].flags = 0; |
952 | msg[0].len = 1; |
953 | msg[0].buf = regs; |
954 | |
955 | msg[1].addr = MENELAUS_I2C_ADDRESS; |
956 | msg[1].flags = I2C_M_RD; |
957 | msg[1].len = sizeof(regs); |
958 | msg[1].buf = regs; |
959 | |
960 | status = i2c_transfer(the_menelaus->client->adapter, msg, 2); |
961 | if (status != 2) { |
962 | dev_err(dev, "%s error %d\n" , "alarm read" , status); |
963 | return -EIO; |
964 | } |
965 | |
966 | menelaus_to_time(regs, &w->time); |
967 | |
968 | w->enabled = !!(the_menelaus->rtc_control & RTC_CTRL_AL_EN); |
969 | |
970 | /* NOTE we *could* check if actually pending... */ |
971 | w->pending = 0; |
972 | |
973 | return 0; |
974 | } |
975 | |
976 | static int menelaus_set_alarm(struct device *dev, struct rtc_wkalrm *w) |
977 | { |
978 | int status; |
979 | |
980 | if (the_menelaus->client->irq <= 0 && w->enabled) |
981 | return -ENODEV; |
982 | |
983 | /* clear previous alarm enable */ |
984 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) { |
985 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
986 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, |
987 | the_menelaus->rtc_control); |
988 | if (status < 0) |
989 | return status; |
990 | } |
991 | |
992 | /* write alarm registers */ |
993 | status = time_to_menelaus(&w->time, MENELAUS_RTC_AL_SEC); |
994 | if (status < 0) |
995 | return status; |
996 | |
997 | /* enable alarm if requested */ |
998 | if (w->enabled) { |
999 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; |
1000 | status = menelaus_write_reg(MENELAUS_RTC_CTRL, |
1001 | the_menelaus->rtc_control); |
1002 | } |
1003 | |
1004 | return status; |
1005 | } |
1006 | |
1007 | #ifdef CONFIG_RTC_INTF_DEV |
1008 | |
1009 | static void menelaus_rtc_update_work(struct menelaus_chip *m) |
1010 | { |
1011 | /* report 1/sec update */ |
1012 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_UF); |
1013 | } |
1014 | |
1015 | static int menelaus_ioctl(struct device *dev, unsigned cmd, unsigned long arg) |
1016 | { |
1017 | int status; |
1018 | |
1019 | if (the_menelaus->client->irq <= 0) |
1020 | return -ENOIOCTLCMD; |
1021 | |
1022 | switch (cmd) { |
1023 | /* alarm IRQ */ |
1024 | case RTC_AIE_ON: |
1025 | if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) |
1026 | return 0; |
1027 | the_menelaus->rtc_control |= RTC_CTRL_AL_EN; |
1028 | break; |
1029 | case RTC_AIE_OFF: |
1030 | if (!(the_menelaus->rtc_control & RTC_CTRL_AL_EN)) |
1031 | return 0; |
1032 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
1033 | break; |
1034 | /* 1/second "update" IRQ */ |
1035 | case RTC_UIE_ON: |
1036 | if (the_menelaus->uie) |
1037 | return 0; |
1038 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); |
1039 | status = menelaus_add_irq_work(MENELAUS_RTCTMR_IRQ, |
1040 | menelaus_rtc_update_work); |
1041 | if (status == 0) |
1042 | the_menelaus->uie = 1; |
1043 | return status; |
1044 | case RTC_UIE_OFF: |
1045 | if (!the_menelaus->uie) |
1046 | return 0; |
1047 | status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ); |
1048 | if (status == 0) |
1049 | the_menelaus->uie = 0; |
1050 | return status; |
1051 | default: |
1052 | return -ENOIOCTLCMD; |
1053 | } |
1054 | return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); |
1055 | } |
1056 | |
1057 | #else |
1058 | #define menelaus_ioctl NULL |
1059 | #endif |
1060 | |
1061 | /* REVISIT no compensation register support ... */ |
1062 | |
1063 | static const struct rtc_class_ops menelaus_rtc_ops = { |
1064 | .ioctl = menelaus_ioctl, |
1065 | .read_time = menelaus_read_time, |
1066 | .set_time = menelaus_set_time, |
1067 | .read_alarm = menelaus_read_alarm, |
1068 | .set_alarm = menelaus_set_alarm, |
1069 | }; |
1070 | |
1071 | static void menelaus_rtc_alarm_work(struct menelaus_chip *m) |
1072 | { |
1073 | /* report alarm */ |
1074 | rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_AF); |
1075 | |
1076 | /* then disable it; alarms are oneshot */ |
1077 | the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN; |
1078 | menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control); |
1079 | } |
1080 | |
1081 | static inline void menelaus_rtc_init(struct menelaus_chip *m) |
1082 | { |
1083 | int alarm = (m->client->irq > 0); |
1084 | int err; |
1085 | |
1086 | /* assume 32KDETEN pin is pulled high */ |
1087 | if (!(menelaus_read_reg(MENELAUS_OSC_CTRL) & 0x80)) { |
1088 | dev_dbg(&m->client->dev, "no 32k oscillator\n" ); |
1089 | return; |
1090 | } |
1091 | |
1092 | m->rtc = devm_rtc_allocate_device(&m->client->dev); |
1093 | if (IS_ERR(m->rtc)) |
1094 | return; |
1095 | |
1096 | m->rtc->ops = &menelaus_rtc_ops; |
1097 | |
1098 | /* support RTC alarm; it can issue wakeups */ |
1099 | if (alarm) { |
1100 | if (menelaus_add_irq_work(MENELAUS_RTCALM_IRQ, |
1101 | menelaus_rtc_alarm_work) < 0) { |
1102 | dev_err(&m->client->dev, "can't handle RTC alarm\n" ); |
1103 | return; |
1104 | } |
1105 | device_init_wakeup(&m->client->dev, 1); |
1106 | } |
1107 | |
1108 | /* be sure RTC is enabled; allow 1/sec irqs; leave 12hr mode alone */ |
1109 | m->rtc_control = menelaus_read_reg(MENELAUS_RTC_CTRL); |
1110 | if (!(m->rtc_control & RTC_CTRL_RTC_EN) |
1111 | || (m->rtc_control & RTC_CTRL_AL_EN) |
1112 | || (m->rtc_control & RTC_CTRL_EVERY_MASK)) { |
1113 | if (!(m->rtc_control & RTC_CTRL_RTC_EN)) { |
1114 | dev_warn(&m->client->dev, "rtc clock needs setting\n" ); |
1115 | m->rtc_control |= RTC_CTRL_RTC_EN; |
1116 | } |
1117 | m->rtc_control &= ~RTC_CTRL_EVERY_MASK; |
1118 | m->rtc_control &= ~RTC_CTRL_AL_EN; |
1119 | menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control); |
1120 | } |
1121 | |
1122 | err = devm_rtc_register_device(m->rtc); |
1123 | if (err) { |
1124 | if (alarm) { |
1125 | menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ); |
1126 | device_init_wakeup(&m->client->dev, 0); |
1127 | } |
1128 | the_menelaus->rtc = NULL; |
1129 | } |
1130 | } |
1131 | |
1132 | #else |
1133 | |
1134 | static inline void menelaus_rtc_init(struct menelaus_chip *m) |
1135 | { |
1136 | /* nothing */ |
1137 | } |
1138 | |
1139 | #endif |
1140 | |
1141 | /*-----------------------------------------------------------------------*/ |
1142 | |
1143 | static struct i2c_driver menelaus_i2c_driver; |
1144 | |
1145 | static int menelaus_probe(struct i2c_client *client) |
1146 | { |
1147 | struct menelaus_chip *menelaus; |
1148 | int rev = 0; |
1149 | int err = 0; |
1150 | struct menelaus_platform_data *menelaus_pdata = |
1151 | dev_get_platdata(dev: &client->dev); |
1152 | |
1153 | if (the_menelaus) { |
1154 | dev_dbg(&client->dev, "only one %s for now\n" , |
1155 | DRIVER_NAME); |
1156 | return -ENODEV; |
1157 | } |
1158 | |
1159 | menelaus = devm_kzalloc(dev: &client->dev, size: sizeof(*menelaus), GFP_KERNEL); |
1160 | if (!menelaus) |
1161 | return -ENOMEM; |
1162 | |
1163 | i2c_set_clientdata(client, data: menelaus); |
1164 | |
1165 | the_menelaus = menelaus; |
1166 | menelaus->client = client; |
1167 | |
1168 | /* If a true probe check the device */ |
1169 | rev = menelaus_read_reg(MENELAUS_REV); |
1170 | if (rev < 0) { |
1171 | pr_err(DRIVER_NAME ": device not found" ); |
1172 | return -ENODEV; |
1173 | } |
1174 | |
1175 | /* Ack and disable all Menelaus interrupts */ |
1176 | menelaus_write_reg(MENELAUS_INT_ACK1, value: 0xff); |
1177 | menelaus_write_reg(MENELAUS_INT_ACK2, value: 0xff); |
1178 | menelaus_write_reg(MENELAUS_INT_MASK1, value: 0xff); |
1179 | menelaus_write_reg(MENELAUS_INT_MASK2, value: 0xff); |
1180 | menelaus->mask1 = 0xff; |
1181 | menelaus->mask2 = 0xff; |
1182 | |
1183 | /* Set output buffer strengths */ |
1184 | menelaus_write_reg(MENELAUS_MCT_CTRL1, value: 0x73); |
1185 | |
1186 | if (client->irq > 0) { |
1187 | err = request_irq(irq: client->irq, handler: menelaus_irq, flags: 0, |
1188 | DRIVER_NAME, dev: menelaus); |
1189 | if (err) { |
1190 | dev_dbg(&client->dev, "can't get IRQ %d, err %d\n" , |
1191 | client->irq, err); |
1192 | return err; |
1193 | } |
1194 | } |
1195 | |
1196 | mutex_init(&menelaus->lock); |
1197 | INIT_WORK(&menelaus->work, menelaus_work); |
1198 | |
1199 | pr_info("Menelaus rev %d.%d\n" , rev >> 4, rev & 0x0f); |
1200 | |
1201 | err = menelaus_read_reg(MENELAUS_VCORE_CTRL1); |
1202 | if (err < 0) |
1203 | goto fail; |
1204 | if (err & VCORE_CTRL1_HW_NSW) |
1205 | menelaus->vcore_hw_mode = 1; |
1206 | else |
1207 | menelaus->vcore_hw_mode = 0; |
1208 | |
1209 | if (menelaus_pdata != NULL && menelaus_pdata->late_init != NULL) { |
1210 | err = menelaus_pdata->late_init(&client->dev); |
1211 | if (err < 0) |
1212 | goto fail; |
1213 | } |
1214 | |
1215 | menelaus_rtc_init(m: menelaus); |
1216 | |
1217 | return 0; |
1218 | fail: |
1219 | free_irq(client->irq, menelaus); |
1220 | flush_work(work: &menelaus->work); |
1221 | return err; |
1222 | } |
1223 | |
1224 | static void menelaus_remove(struct i2c_client *client) |
1225 | { |
1226 | struct menelaus_chip *menelaus = i2c_get_clientdata(client); |
1227 | |
1228 | free_irq(client->irq, menelaus); |
1229 | flush_work(work: &menelaus->work); |
1230 | the_menelaus = NULL; |
1231 | } |
1232 | |
1233 | static const struct i2c_device_id menelaus_id[] = { |
1234 | { "menelaus" , 0 }, |
1235 | { } |
1236 | }; |
1237 | MODULE_DEVICE_TABLE(i2c, menelaus_id); |
1238 | |
1239 | static struct i2c_driver menelaus_i2c_driver = { |
1240 | .driver = { |
1241 | .name = DRIVER_NAME, |
1242 | }, |
1243 | .probe = menelaus_probe, |
1244 | .remove = menelaus_remove, |
1245 | .id_table = menelaus_id, |
1246 | }; |
1247 | |
1248 | module_i2c_driver(menelaus_i2c_driver); |
1249 | |
1250 | MODULE_AUTHOR("Texas Instruments, Inc. (and others)" ); |
1251 | MODULE_DESCRIPTION("I2C interface for Menelaus." ); |
1252 | MODULE_LICENSE("GPL" ); |
1253 | |