1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Driver for the MMC / SD / SDIO cell found in: |
4 | * |
5 | * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 |
6 | * |
7 | * Copyright (C) 2015-19 Renesas Electronics Corporation |
8 | * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang |
9 | * Copyright (C) 2016-17 Horms Solutions, Simon Horman |
10 | * Copyright (C) 2007 Ian Molton |
11 | * Copyright (C) 2004 Ian Molton |
12 | */ |
13 | |
14 | #ifndef TMIO_MMC_H |
15 | #define TMIO_MMC_H |
16 | |
17 | #include <linux/dmaengine.h> |
18 | #include <linux/highmem.h> |
19 | #include <linux/mutex.h> |
20 | #include <linux/pagemap.h> |
21 | #include <linux/scatterlist.h> |
22 | #include <linux/spinlock.h> |
23 | #include <linux/interrupt.h> |
24 | |
25 | #define CTL_SD_CMD 0x00 |
26 | #define CTL_ARG_REG 0x04 |
27 | #define CTL_STOP_INTERNAL_ACTION 0x08 |
28 | #define CTL_XFER_BLK_COUNT 0xa |
29 | #define CTL_RESPONSE 0x0c |
30 | /* driver merges STATUS and following STATUS2 */ |
31 | #define CTL_STATUS 0x1c |
32 | /* driver merges IRQ_MASK and following IRQ_MASK2 */ |
33 | #define CTL_IRQ_MASK 0x20 |
34 | #define CTL_SD_CARD_CLK_CTL 0x24 |
35 | #define CTL_SD_XFER_LEN 0x26 |
36 | #define CTL_SD_MEM_CARD_OPT 0x28 |
37 | #define CTL_SD_ERROR_DETAIL_STATUS 0x2c |
38 | #define CTL_SD_DATA_PORT 0x30 |
39 | #define CTL_TRANSACTION_CTL 0x34 |
40 | #define CTL_SDIO_STATUS 0x36 |
41 | #define CTL_SDIO_IRQ_MASK 0x38 |
42 | #define CTL_DMA_ENABLE 0xd8 |
43 | #define CTL_RESET_SD 0xe0 |
44 | #define CTL_VERSION 0xe2 |
45 | #define CTL_SDIF_MODE 0xe6 /* only known on R-Car 2+ */ |
46 | |
47 | /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ |
48 | #define TMIO_STOP_STP BIT(0) |
49 | #define TMIO_STOP_SEC BIT(8) |
50 | |
51 | /* Definitions for values the CTL_STATUS register can take */ |
52 | #define TMIO_STAT_CMDRESPEND BIT(0) |
53 | #define TMIO_STAT_DATAEND BIT(2) |
54 | #define TMIO_STAT_CARD_REMOVE BIT(3) |
55 | #define TMIO_STAT_CARD_INSERT BIT(4) |
56 | #define TMIO_STAT_SIGSTATE BIT(5) |
57 | #define TMIO_STAT_WRPROTECT BIT(7) |
58 | #define TMIO_STAT_CARD_REMOVE_A BIT(8) |
59 | #define TMIO_STAT_CARD_INSERT_A BIT(9) |
60 | #define TMIO_STAT_SIGSTATE_A BIT(10) |
61 | |
62 | /* These belong technically to CTL_STATUS2, but the driver merges them */ |
63 | #define TMIO_STAT_CMD_IDX_ERR BIT(16) |
64 | #define TMIO_STAT_CRCFAIL BIT(17) |
65 | #define TMIO_STAT_STOPBIT_ERR BIT(18) |
66 | #define TMIO_STAT_DATATIMEOUT BIT(19) |
67 | #define TMIO_STAT_RXOVERFLOW BIT(20) |
68 | #define TMIO_STAT_TXUNDERRUN BIT(21) |
69 | #define TMIO_STAT_CMDTIMEOUT BIT(22) |
70 | #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */ |
71 | #define TMIO_STAT_RXRDY BIT(24) |
72 | #define TMIO_STAT_TXRQ BIT(25) |
73 | #define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */ |
74 | #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */ |
75 | #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */ |
76 | #define TMIO_STAT_CMD_BUSY BIT(30) |
77 | #define TMIO_STAT_ILL_ACCESS BIT(31) |
78 | |
79 | /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */ |
80 | #define CLK_CTL_DIV_MASK 0xff |
81 | #define CLK_CTL_SCLKEN BIT(8) |
82 | |
83 | /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */ |
84 | #define CARD_OPT_TOP_MASK 0xf0 |
85 | #define CARD_OPT_TOP_SHIFT 4 |
86 | #define CARD_OPT_EXTOP BIT(9) /* first appeared on R-Car Gen3 SDHI */ |
87 | #define CARD_OPT_WIDTH8 BIT(13) |
88 | #define CARD_OPT_ALWAYS1 BIT(14) |
89 | #define CARD_OPT_WIDTH BIT(15) |
90 | |
91 | /* Definitions for values the CTL_SDIO_STATUS register can take */ |
92 | #define TMIO_SDIO_STAT_IOIRQ 0x0001 |
93 | #define TMIO_SDIO_STAT_EXPUB52 0x4000 |
94 | #define TMIO_SDIO_STAT_EXWT 0x8000 |
95 | #define TMIO_SDIO_MASK_ALL 0xc007 |
96 | |
97 | #define TMIO_SDIO_SETBITS_MASK 0x0006 |
98 | |
99 | /* Definitions for values the CTL_DMA_ENABLE register can take */ |
100 | #define DMA_ENABLE_DMASDRW BIT(1) |
101 | |
102 | /* Definitions for values the CTL_SDIF_MODE register can take */ |
103 | #define SDIF_MODE_HS400 BIT(0) /* only known on R-Car 2+ */ |
104 | |
105 | /* Define some IRQ masks */ |
106 | /* This is the mask used at reset by the chip */ |
107 | #define TMIO_MASK_ALL 0x837f031d |
108 | #define TMIO_MASK_ALL_RCAR2 0x8b7f031d |
109 | #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) |
110 | #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) |
111 | #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ |
112 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) |
113 | #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) |
114 | |
115 | #define TMIO_MAX_BLK_SIZE 512 |
116 | |
117 | struct tmio_mmc_data; |
118 | struct tmio_mmc_host; |
119 | |
120 | struct tmio_mmc_dma_ops { |
121 | void (*start)(struct tmio_mmc_host *host, struct mmc_data *data); |
122 | void (*enable)(struct tmio_mmc_host *host, bool enable); |
123 | void (*request)(struct tmio_mmc_host *host, |
124 | struct tmio_mmc_data *pdata); |
125 | void (*release)(struct tmio_mmc_host *host); |
126 | void (*abort)(struct tmio_mmc_host *host); |
127 | void (*dataend)(struct tmio_mmc_host *host); |
128 | |
129 | /* optional */ |
130 | void (*end)(struct tmio_mmc_host *host); /* held host->lock */ |
131 | bool (*dma_irq)(struct tmio_mmc_host *host); |
132 | }; |
133 | |
134 | struct tmio_mmc_host { |
135 | void __iomem *ctl; |
136 | struct mmc_command *cmd; |
137 | struct mmc_request *mrq; |
138 | struct mmc_data *data; |
139 | struct mmc_host *mmc; |
140 | struct mmc_host_ops ops; |
141 | |
142 | /* Callbacks for clock / power control */ |
143 | void (*set_pwr)(struct platform_device *host, int state); |
144 | |
145 | /* pio related stuff */ |
146 | struct scatterlist *sg_ptr; |
147 | struct scatterlist *sg_orig; |
148 | unsigned int sg_len; |
149 | unsigned int sg_off; |
150 | unsigned int bus_shift; |
151 | |
152 | struct platform_device *pdev; |
153 | struct tmio_mmc_data *pdata; |
154 | |
155 | /* DMA support */ |
156 | bool dma_on; |
157 | struct dma_chan *chan_rx; |
158 | struct dma_chan *chan_tx; |
159 | struct tasklet_struct dma_issue; |
160 | struct scatterlist bounce_sg; |
161 | u8 *bounce_buf; |
162 | |
163 | /* Track lost interrupts */ |
164 | struct delayed_work delayed_reset_work; |
165 | struct work_struct done; |
166 | |
167 | /* Cache */ |
168 | u32 sdcard_irq_mask; |
169 | u32 sdio_irq_mask; |
170 | unsigned int clk_cache; |
171 | u32 sdcard_irq_setbit_mask; |
172 | u32 sdcard_irq_mask_all; |
173 | |
174 | spinlock_t lock; /* protect host private data */ |
175 | unsigned long last_req_ts; |
176 | struct mutex ios_lock; /* protect set_ios() context */ |
177 | bool native_hotplug; |
178 | bool sdio_irq_enabled; |
179 | |
180 | /* Mandatory callback */ |
181 | int (*clk_enable)(struct tmio_mmc_host *host); |
182 | void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock); |
183 | |
184 | /* Optional callbacks */ |
185 | void (*clk_disable)(struct tmio_mmc_host *host); |
186 | int (*multi_io_quirk)(struct mmc_card *card, |
187 | unsigned int direction, int blk_size); |
188 | int (*write16_hook)(struct tmio_mmc_host *host, int addr); |
189 | void (*reset)(struct tmio_mmc_host *host, bool preserve); |
190 | bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq); |
191 | void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq); |
192 | unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host); |
193 | |
194 | const struct tmio_mmc_dma_ops *dma_ops; |
195 | }; |
196 | |
197 | struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, |
198 | struct tmio_mmc_data *pdata); |
199 | void tmio_mmc_host_free(struct tmio_mmc_host *host); |
200 | int tmio_mmc_host_probe(struct tmio_mmc_host *host); |
201 | void tmio_mmc_host_remove(struct tmio_mmc_host *host); |
202 | void tmio_mmc_do_data_irq(struct tmio_mmc_host *host); |
203 | |
204 | void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); |
205 | void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); |
206 | irqreturn_t tmio_mmc_irq(int irq, void *devid); |
207 | |
208 | #ifdef CONFIG_PM |
209 | int tmio_mmc_host_runtime_suspend(struct device *dev); |
210 | int tmio_mmc_host_runtime_resume(struct device *dev); |
211 | #endif |
212 | |
213 | static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) |
214 | { |
215 | return ioread16(host->ctl + (addr << host->bus_shift)); |
216 | } |
217 | |
218 | static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, |
219 | u16 *buf, int count) |
220 | { |
221 | ioread16_rep(port: host->ctl + (addr << host->bus_shift), buf, count); |
222 | } |
223 | |
224 | static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, |
225 | int addr) |
226 | { |
227 | return ioread16(host->ctl + (addr << host->bus_shift)) | |
228 | ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16; |
229 | } |
230 | |
231 | static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr, |
232 | u32 *buf, int count) |
233 | { |
234 | ioread32_rep(port: host->ctl + (addr << host->bus_shift), buf, count); |
235 | } |
236 | |
237 | static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, |
238 | u16 val) |
239 | { |
240 | /* If there is a hook and it returns non-zero then there |
241 | * is an error and the write should be skipped |
242 | */ |
243 | if (host->write16_hook && host->write16_hook(host, addr)) |
244 | return; |
245 | iowrite16(val, host->ctl + (addr << host->bus_shift)); |
246 | } |
247 | |
248 | static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, |
249 | u16 *buf, int count) |
250 | { |
251 | iowrite16_rep(port: host->ctl + (addr << host->bus_shift), buf, count); |
252 | } |
253 | |
254 | static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, |
255 | int addr, u32 val) |
256 | { |
257 | if (addr == CTL_IRQ_MASK || addr == CTL_STATUS) |
258 | val |= host->sdcard_irq_setbit_mask; |
259 | |
260 | iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift)); |
261 | iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); |
262 | } |
263 | |
264 | static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) |
265 | { |
266 | iowrite32(val, host->ctl + (addr << host->bus_shift)); |
267 | } |
268 | |
269 | static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr, |
270 | const u32 *buf, int count) |
271 | { |
272 | iowrite32_rep(port: host->ctl + (addr << host->bus_shift), buf, count); |
273 | } |
274 | |
275 | #endif |
276 | |