| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * linux/drivers/mmc/host/wbsd.h - Winbond W83L51xD SD/MMC driver |
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| 4 | * |
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| 5 | * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved. |
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| 6 | */ |
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| 7 | |
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| 8 | #define LOCK_CODE 0xAA |
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| 9 | |
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| 10 | #define WBSD_CONF_SWRST 0x02 |
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| 11 | #define WBSD_CONF_DEVICE 0x07 |
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| 12 | #define WBSD_CONF_ID_HI 0x20 |
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| 13 | #define WBSD_CONF_ID_LO 0x21 |
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| 14 | #define WBSD_CONF_POWER 0x22 |
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| 15 | #define WBSD_CONF_PME 0x23 |
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| 16 | #define WBSD_CONF_PMES 0x24 |
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| 17 | |
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| 18 | #define WBSD_CONF_ENABLE 0x30 |
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| 19 | #define WBSD_CONF_PORT_HI 0x60 |
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| 20 | #define WBSD_CONF_PORT_LO 0x61 |
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| 21 | #define WBSD_CONF_IRQ 0x70 |
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| 22 | #define WBSD_CONF_DRQ 0x74 |
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| 23 | |
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| 24 | #define WBSD_CONF_PINS 0xF0 |
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| 25 | |
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| 26 | #define DEVICE_SD 0x03 |
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| 27 | |
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| 28 | #define WBSD_PINS_DAT3_HI 0x20 |
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| 29 | #define WBSD_PINS_DAT3_OUT 0x10 |
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| 30 | #define WBSD_PINS_GP11_HI 0x04 |
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| 31 | #define WBSD_PINS_DETECT_GP11 0x02 |
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| 32 | #define WBSD_PINS_DETECT_DAT3 0x01 |
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| 33 | |
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| 34 | #define WBSD_CMDR 0x00 |
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| 35 | #define WBSD_DFR 0x01 |
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| 36 | #define WBSD_EIR 0x02 |
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| 37 | #define WBSD_ISR 0x03 |
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| 38 | #define WBSD_FSR 0x04 |
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| 39 | #define WBSD_IDXR 0x05 |
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| 40 | #define WBSD_DATAR 0x06 |
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| 41 | #define WBSD_CSR 0x07 |
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| 42 | |
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| 43 | #define WBSD_EINT_CARD 0x40 |
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| 44 | #define WBSD_EINT_FIFO_THRE 0x20 |
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| 45 | #define WBSD_EINT_CRC 0x10 |
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| 46 | #define WBSD_EINT_TIMEOUT 0x08 |
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| 47 | #define WBSD_EINT_PROGEND 0x04 |
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| 48 | #define WBSD_EINT_BUSYEND 0x02 |
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| 49 | #define WBSD_EINT_TC 0x01 |
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| 50 | |
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| 51 | #define WBSD_INT_PENDING 0x80 |
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| 52 | #define WBSD_INT_CARD 0x40 |
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| 53 | #define WBSD_INT_FIFO_THRE 0x20 |
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| 54 | #define WBSD_INT_CRC 0x10 |
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| 55 | #define WBSD_INT_TIMEOUT 0x08 |
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| 56 | #define WBSD_INT_PROGEND 0x04 |
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| 57 | #define WBSD_INT_BUSYEND 0x02 |
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| 58 | #define WBSD_INT_TC 0x01 |
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| 59 | |
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| 60 | #define WBSD_FIFO_EMPTY 0x80 |
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| 61 | #define WBSD_FIFO_FULL 0x40 |
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| 62 | #define WBSD_FIFO_EMTHRE 0x20 |
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| 63 | #define WBSD_FIFO_FUTHRE 0x10 |
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| 64 | #define WBSD_FIFO_SZMASK 0x0F |
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| 65 | |
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| 66 | #define WBSD_MSLED 0x20 |
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| 67 | #define WBSD_POWER_N 0x10 |
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| 68 | #define WBSD_WRPT 0x04 |
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| 69 | #define WBSD_CARDPRESENT 0x01 |
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| 70 | |
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| 71 | #define WBSD_IDX_CLK 0x01 |
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| 72 | #define WBSD_IDX_PBSMSB 0x02 |
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| 73 | #define WBSD_IDX_TAAC 0x03 |
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| 74 | #define WBSD_IDX_NSAC 0x04 |
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| 75 | #define WBSD_IDX_PBSLSB 0x05 |
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| 76 | #define WBSD_IDX_SETUP 0x06 |
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| 77 | #define WBSD_IDX_DMA 0x07 |
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| 78 | #define WBSD_IDX_FIFOEN 0x08 |
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| 79 | #define WBSD_IDX_STATUS 0x10 |
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| 80 | #define WBSD_IDX_RSPLEN 0x1E |
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| 81 | #define WBSD_IDX_RESP0 0x1F |
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| 82 | #define WBSD_IDX_RESP1 0x20 |
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| 83 | #define WBSD_IDX_RESP2 0x21 |
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| 84 | #define WBSD_IDX_RESP3 0x22 |
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| 85 | #define WBSD_IDX_RESP4 0x23 |
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| 86 | #define WBSD_IDX_RESP5 0x24 |
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| 87 | #define WBSD_IDX_RESP6 0x25 |
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| 88 | #define WBSD_IDX_RESP7 0x26 |
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| 89 | #define WBSD_IDX_RESP8 0x27 |
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| 90 | #define WBSD_IDX_RESP9 0x28 |
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| 91 | #define WBSD_IDX_RESP10 0x29 |
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| 92 | #define WBSD_IDX_RESP11 0x2A |
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| 93 | #define WBSD_IDX_RESP12 0x2B |
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| 94 | #define WBSD_IDX_RESP13 0x2C |
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| 95 | #define WBSD_IDX_RESP14 0x2D |
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| 96 | #define WBSD_IDX_RESP15 0x2E |
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| 97 | #define WBSD_IDX_RESP16 0x2F |
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| 98 | #define WBSD_IDX_CRCSTATUS 0x30 |
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| 99 | #define WBSD_IDX_ISR 0x3F |
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| 100 | |
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| 101 | #define WBSD_CLK_375K 0x00 |
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| 102 | #define WBSD_CLK_12M 0x01 |
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| 103 | #define WBSD_CLK_16M 0x02 |
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| 104 | #define WBSD_CLK_24M 0x03 |
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| 105 | |
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| 106 | #define WBSD_DATA_WIDTH 0x01 |
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| 107 | |
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| 108 | #define WBSD_DAT3_H 0x08 |
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| 109 | #define WBSD_FIFO_RESET 0x04 |
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| 110 | #define WBSD_SOFT_RESET 0x02 |
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| 111 | #define WBSD_INC_INDEX 0x01 |
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| 112 | |
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| 113 | #define WBSD_DMA_SINGLE 0x02 |
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| 114 | #define WBSD_DMA_ENABLE 0x01 |
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| 115 | |
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| 116 | #define WBSD_FIFOEN_EMPTY 0x20 |
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| 117 | #define WBSD_FIFOEN_FULL 0x10 |
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| 118 | #define WBSD_FIFO_THREMASK 0x0F |
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| 119 | |
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| 120 | #define WBSD_BLOCK_READ 0x80 |
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| 121 | #define WBSD_BLOCK_WRITE 0x40 |
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| 122 | #define WBSD_BUSY 0x20 |
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| 123 | #define WBSD_CARDTRAFFIC 0x04 |
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| 124 | #define WBSD_SENDCMD 0x02 |
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| 125 | #define WBSD_RECVRES 0x01 |
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| 126 | |
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| 127 | #define WBSD_RSP_SHORT 0x00 |
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| 128 | #define WBSD_RSP_LONG 0x01 |
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| 129 | |
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| 130 | #define WBSD_CRC_MASK 0x1F |
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| 131 | #define WBSD_CRC_OK 0x05 /* S010E (00101) */ |
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| 132 | #define WBSD_CRC_FAIL 0x0B /* S101E (01011) */ |
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| 133 | |
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| 134 | #define WBSD_DMA_SIZE 65536 |
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| 135 | |
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| 136 | struct wbsd_host |
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| 137 | { |
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| 138 | struct mmc_host* mmc; /* MMC structure */ |
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| 139 | |
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| 140 | spinlock_t lock; /* Mutex */ |
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| 141 | |
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| 142 | int flags; /* Driver states */ |
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| 143 | |
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| 144 | #define WBSD_FCARD_PRESENT (1<<0) /* Card is present */ |
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| 145 | #define WBSD_FIGNORE_DETECT (1<<1) /* Ignore card detection */ |
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| 146 | |
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| 147 | struct mmc_request* mrq; /* Current request */ |
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| 148 | |
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| 149 | u8 isr; /* Accumulated ISR */ |
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| 150 | |
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| 151 | struct scatterlist* cur_sg; /* Current SG entry */ |
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| 152 | unsigned int num_sg; /* Number of entries left */ |
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| 153 | |
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| 154 | unsigned int offset; /* Offset into current entry */ |
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| 155 | unsigned int remain; /* Data left in curren entry */ |
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| 156 | |
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| 157 | char* dma_buffer; /* ISA DMA buffer */ |
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| 158 | dma_addr_t dma_addr; /* Physical address for same */ |
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| 159 | |
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| 160 | int firsterr; /* See fifo functions */ |
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| 161 | |
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| 162 | u8 clk; /* Current clock speed */ |
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| 163 | unsigned char bus_width; /* Current bus width */ |
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| 164 | |
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| 165 | int config; /* Config port */ |
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| 166 | u8 unlock_code; /* Code to unlock config */ |
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| 167 | |
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| 168 | int chip_id; /* ID of controller */ |
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| 169 | |
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| 170 | int base; /* I/O port base */ |
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| 171 | int irq; /* Interrupt */ |
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| 172 | int dma; /* DMA channel */ |
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| 173 | |
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| 174 | struct tasklet_struct card_tasklet; /* Tasklet structures */ |
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| 175 | struct tasklet_struct fifo_tasklet; |
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| 176 | struct tasklet_struct crc_tasklet; |
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| 177 | struct tasklet_struct timeout_tasklet; |
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| 178 | struct tasklet_struct finish_tasklet; |
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| 179 | |
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| 180 | struct timer_list ignore_timer; /* Ignore detection timer */ |
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| 181 | }; |
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| 182 | |
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