| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* Random defines and structures for the HP Lance driver. |
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| 3 | * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk> |
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| 4 | * Based on the Sun Lance driver and the NetBSD HP Lance driver |
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| 5 | */ |
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| 6 | |
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| 7 | /* Registers */ |
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| 8 | #define HPLANCE_ID 0x01 /* DIO register: ID byte */ |
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| 9 | #define HPLANCE_STATUS 0x03 /* DIO register: interrupt enable/status */ |
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| 10 | |
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| 11 | /* Control and status bits for the status register */ |
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| 12 | #define LE_IE 0x80 /* interrupt enable */ |
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| 13 | #define LE_IR 0x40 /* interrupt requested */ |
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| 14 | #define LE_LOCK 0x08 /* lock status register */ |
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| 15 | #define LE_ACK 0x04 /* ack of lock */ |
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| 16 | #define LE_JAB 0x02 /* loss of tx clock (???) */ |
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| 17 | /* We can also extract the IPL from the status register with the standard |
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| 18 | * DIO_IPL(hplance) macro, or using dio_scodetoipl() |
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| 19 | */ |
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| 20 | |
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| 21 | /* These are the offsets for the DIO regs (hplance_reg), lance_ioreg, |
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| 22 | * memory and NVRAM: |
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| 23 | */ |
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| 24 | #define HPLANCE_IDOFF 0 /* board baseaddr */ |
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| 25 | #define HPLANCE_REGOFF 0x4000 /* lance registers */ |
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| 26 | #define HPLANCE_MEMOFF 0x8000 /* struct lance_init_block */ |
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| 27 | #define HPLANCE_NVRAMOFF 0xC008 /* etheraddress as one *nibble* per byte */ |
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| 28 | |
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