1 | /* lance.c: An AMD LANCE/PCnet ethernet driver for Linux. */ |
2 | /* |
3 | Written/copyright 1993-1998 by Donald Becker. |
4 | |
5 | Copyright 1993 United States Government as represented by the |
6 | Director, National Security Agency. |
7 | This software may be used and distributed according to the terms |
8 | of the GNU General Public License, incorporated herein by reference. |
9 | |
10 | This driver is for the Allied Telesis AT1500 and HP J2405A, and should work |
11 | with most other LANCE-based bus-master (NE2100/NE2500) ethercards. |
12 | |
13 | The author may be reached as becker@scyld.com, or C/O |
14 | Scyld Computing Corporation |
15 | 410 Severn Ave., Suite 210 |
16 | Annapolis MD 21403 |
17 | |
18 | Andrey V. Savochkin: |
19 | - alignment problem with 1.3.* kernel and some minor changes. |
20 | Thomas Bogendoerfer (tsbogend@bigbug.franken.de): |
21 | - added support for Linux/Alpha, but removed most of it, because |
22 | it worked only for the PCI chip. |
23 | - added hook for the 32bit lance driver |
24 | - added PCnetPCI II (79C970A) to chip table |
25 | Paul Gortmaker (gpg109@rsphy1.anu.edu.au): |
26 | - hopefully fix above so Linux/Alpha can use ISA cards too. |
27 | 8/20/96 Fixed 7990 autoIRQ failure and reversed unneeded alignment -djb |
28 | v1.12 10/27/97 Module support -djb |
29 | v1.14 2/3/98 Module support modified, made PCI support optional -djb |
30 | v1.15 5/27/99 Fixed bug in the cleanup_module(). dev->priv was freed |
31 | before unregister_netdev() which caused NULL pointer |
32 | reference later in the chain (in rtnetlink_fill_ifinfo()) |
33 | -- Mika Kuoppala <miku@iki.fi> |
34 | |
35 | Forward ported v1.14 to 2.1.129, merged the PCI and misc changes from |
36 | the 2.1 version of the old driver - Alan Cox |
37 | |
38 | Get rid of check_region, check kmalloc return in lance_probe1 |
39 | Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001 |
40 | |
41 | Reworked detection, added support for Racal InterLan EtherBlaster cards |
42 | Vesselin Kostadinov <vesok at yahoo dot com > - 22/4/2004 |
43 | */ |
44 | |
45 | static const char version[] = "lance.c:v1.16 2006/11/09 dplatt@3do.com, becker@cesdis.gsfc.nasa.gov\n" ; |
46 | |
47 | #include <linux/module.h> |
48 | #include <linux/kernel.h> |
49 | #include <linux/string.h> |
50 | #include <linux/delay.h> |
51 | #include <linux/errno.h> |
52 | #include <linux/ioport.h> |
53 | #include <linux/slab.h> |
54 | #include <linux/interrupt.h> |
55 | #include <linux/pci.h> |
56 | #include <linux/init.h> |
57 | #include <linux/netdevice.h> |
58 | #include <linux/etherdevice.h> |
59 | #include <linux/skbuff.h> |
60 | #include <linux/mm.h> |
61 | #include <linux/bitops.h> |
62 | #include <net/Space.h> |
63 | |
64 | #include <asm/io.h> |
65 | #include <asm/dma.h> |
66 | |
67 | static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0}; |
68 | static int lance_probe1(struct net_device *dev, int ioaddr, int irq, int options); |
69 | static int __init do_lance_probe(struct net_device *dev); |
70 | |
71 | |
72 | static struct card { |
73 | char id_offset14; |
74 | char id_offset15; |
75 | } cards[] = { |
76 | { //"normal" |
77 | .id_offset14 = 0x57, |
78 | .id_offset15 = 0x57, |
79 | }, |
80 | { //NI6510EB |
81 | .id_offset14 = 0x52, |
82 | .id_offset15 = 0x44, |
83 | }, |
84 | { //Racal InterLan EtherBlaster |
85 | .id_offset14 = 0x52, |
86 | .id_offset15 = 0x49, |
87 | }, |
88 | }; |
89 | #define NUM_CARDS 3 |
90 | |
91 | #ifdef LANCE_DEBUG |
92 | static int lance_debug = LANCE_DEBUG; |
93 | #else |
94 | static int lance_debug = 1; |
95 | #endif |
96 | |
97 | /* |
98 | Theory of Operation |
99 | |
100 | I. Board Compatibility |
101 | |
102 | This device driver is designed for the AMD 79C960, the "PCnet-ISA |
103 | single-chip ethernet controller for ISA". This chip is used in a wide |
104 | variety of boards from vendors such as Allied Telesis, HP, Kingston, |
105 | and Boca. This driver is also intended to work with older AMD 7990 |
106 | designs, such as the NE1500 and NE2100, and newer 79C961. For convenience, |
107 | I use the name LANCE to refer to all of the AMD chips, even though it properly |
108 | refers only to the original 7990. |
109 | |
110 | II. Board-specific settings |
111 | |
112 | The driver is designed to work the boards that use the faster |
113 | bus-master mode, rather than in shared memory mode. (Only older designs |
114 | have on-board buffer memory needed to support the slower shared memory mode.) |
115 | |
116 | Most ISA boards have jumpered settings for the I/O base, IRQ line, and DMA |
117 | channel. This driver probes the likely base addresses: |
118 | {0x300, 0x320, 0x340, 0x360}. |
119 | After the board is found it generates a DMA-timeout interrupt and uses |
120 | autoIRQ to find the IRQ line. The DMA channel can be set with the low bits |
121 | of the otherwise-unused dev->mem_start value (aka PARAM1). If unset it is |
122 | probed for by enabling each free DMA channel in turn and checking if |
123 | initialization succeeds. |
124 | |
125 | The HP-J2405A board is an exception: with this board it is easy to read the |
126 | EEPROM-set values for the base, IRQ, and DMA. (Of course you must already |
127 | _know_ the base address -- that field is for writing the EEPROM.) |
128 | |
129 | III. Driver operation |
130 | |
131 | IIIa. Ring buffers |
132 | The LANCE uses ring buffers of Tx and Rx descriptors. Each entry describes |
133 | the base and length of the data buffer, along with status bits. The length |
134 | of these buffers is set by LANCE_LOG_{RX,TX}_BUFFERS, which is log_2() of |
135 | the buffer length (rather than being directly the buffer length) for |
136 | implementation ease. The current values are 2 (Tx) and 4 (Rx), which leads to |
137 | ring sizes of 4 (Tx) and 16 (Rx). Increasing the number of ring entries |
138 | needlessly uses extra space and reduces the chance that an upper layer will |
139 | be able to reorder queued Tx packets based on priority. Decreasing the number |
140 | of entries makes it more difficult to achieve back-to-back packet transmission |
141 | and increases the chance that Rx ring will overflow. (Consider the worst case |
142 | of receiving back-to-back minimum-sized packets.) |
143 | |
144 | The LANCE has the capability to "chain" both Rx and Tx buffers, but this driver |
145 | statically allocates full-sized (slightly oversized -- PKT_BUF_SZ) buffers to |
146 | avoid the administrative overhead. For the Rx side this avoids dynamically |
147 | allocating full-sized buffers "just in case", at the expense of a |
148 | memory-to-memory data copy for each packet received. For most systems this |
149 | is a good tradeoff: the Rx buffer will always be in low memory, the copy |
150 | is inexpensive, and it primes the cache for later packet processing. For Tx |
151 | the buffers are only used when needed as low-memory bounce buffers. |
152 | |
153 | IIIB. 16M memory limitations. |
154 | For the ISA bus master mode all structures used directly by the LANCE, |
155 | the initialization block, Rx and Tx rings, and data buffers, must be |
156 | accessible from the ISA bus, i.e. in the lower 16M of real memory. |
157 | This is a problem for current Linux kernels on >16M machines. The network |
158 | devices are initialized after memory initialization, and the kernel doles out |
159 | memory from the top of memory downward. The current solution is to have a |
160 | special network initialization routine that's called before memory |
161 | initialization; this will eventually be generalized for all network devices. |
162 | As mentioned before, low-memory "bounce-buffers" are used when needed. |
163 | |
164 | IIIC. Synchronization |
165 | The driver runs as two independent, single-threaded flows of control. One |
166 | is the send-packet routine, which enforces single-threaded use by the |
167 | dev->tbusy flag. The other thread is the interrupt handler, which is single |
168 | threaded by the hardware and other software. |
169 | |
170 | The send packet thread has partial control over the Tx ring and 'dev->tbusy' |
171 | flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next |
172 | queue slot is empty, it clears the tbusy flag when finished otherwise it sets |
173 | the 'lp->tx_full' flag. |
174 | |
175 | The interrupt handler has exclusive control over the Rx ring and records stats |
176 | from the Tx ring. (The Tx-done interrupt can't be selectively turned off, so |
177 | we can't avoid the interrupt overhead by having the Tx routine reap the Tx |
178 | stats.) After reaping the stats, it marks the queue entry as empty by setting |
179 | the 'base' to zero. Iff the 'lp->tx_full' flag is set, it clears both the |
180 | tx_full and tbusy flags. |
181 | |
182 | */ |
183 | |
184 | /* Set the number of Tx and Rx buffers, using Log_2(# buffers). |
185 | Reasonable default values are 16 Tx buffers, and 16 Rx buffers. |
186 | That translates to 4 and 4 (16 == 2^^4). |
187 | This is a compile-time option for efficiency. |
188 | */ |
189 | #ifndef LANCE_LOG_TX_BUFFERS |
190 | #define LANCE_LOG_TX_BUFFERS 4 |
191 | #define LANCE_LOG_RX_BUFFERS 4 |
192 | #endif |
193 | |
194 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) |
195 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
196 | #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) |
197 | |
198 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) |
199 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
200 | #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) |
201 | |
202 | #define PKT_BUF_SZ 1544 |
203 | |
204 | /* Offsets from base I/O address. */ |
205 | #define LANCE_DATA 0x10 |
206 | #define LANCE_ADDR 0x12 |
207 | #define LANCE_RESET 0x14 |
208 | #define LANCE_BUS_IF 0x16 |
209 | #define LANCE_TOTAL_SIZE 0x18 |
210 | |
211 | #define TX_TIMEOUT (HZ/5) |
212 | |
213 | /* The LANCE Rx and Tx ring descriptors. */ |
214 | struct lance_rx_head { |
215 | s32 base; |
216 | s16 buf_length; /* This length is 2s complement (negative)! */ |
217 | s16 msg_length; /* This length is "normal". */ |
218 | }; |
219 | |
220 | struct lance_tx_head { |
221 | s32 base; |
222 | s16 length; /* Length is 2s complement (negative)! */ |
223 | s16 misc; |
224 | }; |
225 | |
226 | /* The LANCE initialization block, described in databook. */ |
227 | struct lance_init_block { |
228 | u16 mode; /* Pre-set mode (reg. 15) */ |
229 | u8 phys_addr[6]; /* Physical ethernet address */ |
230 | u32 filter[2]; /* Multicast filter (unused). */ |
231 | /* Receive and transmit ring base, along with extra bits. */ |
232 | u32 rx_ring; /* Tx and Rx ring base pointers */ |
233 | u32 tx_ring; |
234 | }; |
235 | |
236 | struct lance_private { |
237 | /* The Tx and Rx ring entries must be aligned on 8-byte boundaries. */ |
238 | struct lance_rx_head rx_ring[RX_RING_SIZE]; |
239 | struct lance_tx_head tx_ring[TX_RING_SIZE]; |
240 | struct lance_init_block init_block; |
241 | const char *name; |
242 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
243 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; |
244 | /* The addresses of receive-in-place skbuffs. */ |
245 | struct sk_buff* rx_skbuff[RX_RING_SIZE]; |
246 | unsigned long rx_buffs; /* Address of Rx and Tx buffers. */ |
247 | /* Tx low-memory "bounce buffer" address. */ |
248 | char (*tx_bounce_buffs)[PKT_BUF_SZ]; |
249 | int cur_rx, cur_tx; /* The next free ring entry */ |
250 | int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ |
251 | int dma; |
252 | unsigned char chip_version; /* See lance_chip_type. */ |
253 | spinlock_t devlock; |
254 | }; |
255 | |
256 | #define LANCE_MUST_PAD 0x00000001 |
257 | #define LANCE_ENABLE_AUTOSELECT 0x00000002 |
258 | #define LANCE_MUST_REINIT_RING 0x00000004 |
259 | #define LANCE_MUST_UNRESET 0x00000008 |
260 | #define LANCE_HAS_MISSED_FRAME 0x00000010 |
261 | |
262 | /* A mapping from the chip ID number to the part number and features. |
263 | These are from the datasheets -- in real life the '970 version |
264 | reportedly has the same ID as the '965. */ |
265 | static struct lance_chip_type { |
266 | int id_number; |
267 | const char *name; |
268 | int flags; |
269 | } chip_table[] = { |
270 | {0x0000, "LANCE 7990" , /* Ancient lance chip. */ |
271 | LANCE_MUST_PAD + LANCE_MUST_UNRESET}, |
272 | {0x0003, "PCnet/ISA 79C960" , /* 79C960 PCnet/ISA. */ |
273 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
274 | LANCE_HAS_MISSED_FRAME}, |
275 | {0x2260, "PCnet/ISA+ 79C961" , /* 79C961 PCnet/ISA+, Plug-n-Play. */ |
276 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
277 | LANCE_HAS_MISSED_FRAME}, |
278 | {0x2420, "PCnet/PCI 79C970" , /* 79C970 or 79C974 PCnet-SCSI, PCI. */ |
279 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
280 | LANCE_HAS_MISSED_FRAME}, |
281 | /* Bug: the PCnet/PCI actually uses the PCnet/VLB ID number, so just call |
282 | it the PCnet32. */ |
283 | {0x2430, "PCnet32" , /* 79C965 PCnet for VL bus. */ |
284 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
285 | LANCE_HAS_MISSED_FRAME}, |
286 | {0x2621, "PCnet/PCI-II 79C970A" , /* 79C970A PCInetPCI II. */ |
287 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
288 | LANCE_HAS_MISSED_FRAME}, |
289 | {0x0, "PCnet (unknown)" , |
290 | LANCE_ENABLE_AUTOSELECT + LANCE_MUST_REINIT_RING + |
291 | LANCE_HAS_MISSED_FRAME}, |
292 | }; |
293 | |
294 | enum {OLD_LANCE = 0, PCNET_ISA=1, PCNET_ISAP=2, PCNET_PCI=3, PCNET_VLB=4, PCNET_PCI_II=5, LANCE_UNKNOWN=6}; |
295 | |
296 | |
297 | /* Non-zero if lance_probe1() needs to allocate low-memory bounce buffers. |
298 | Assume yes until we know the memory size. */ |
299 | static unsigned char lance_need_isa_bounce_buffers = 1; |
300 | |
301 | static int lance_open(struct net_device *dev); |
302 | static void lance_init_ring(struct net_device *dev, gfp_t mode); |
303 | static netdev_tx_t lance_start_xmit(struct sk_buff *skb, |
304 | struct net_device *dev); |
305 | static int lance_rx(struct net_device *dev); |
306 | static irqreturn_t lance_interrupt(int irq, void *dev_id); |
307 | static int lance_close(struct net_device *dev); |
308 | static struct net_device_stats *lance_get_stats(struct net_device *dev); |
309 | static void set_multicast_list(struct net_device *dev); |
310 | static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue); |
311 | |
312 | |
313 | |
314 | #ifdef MODULE |
315 | #define MAX_CARDS 8 /* Max number of interfaces (cards) per module */ |
316 | |
317 | static struct net_device *dev_lance[MAX_CARDS]; |
318 | static int io[MAX_CARDS]; |
319 | static int dma[MAX_CARDS]; |
320 | static int irq[MAX_CARDS]; |
321 | |
322 | module_param_hw_array(io, int, ioport, NULL, 0); |
323 | module_param_hw_array(dma, int, dma, NULL, 0); |
324 | module_param_hw_array(irq, int, irq, NULL, 0); |
325 | module_param(lance_debug, int, 0); |
326 | MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required" ); |
327 | MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)" ); |
328 | MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)" ); |
329 | MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)" ); |
330 | |
331 | static int __init lance_init_module(void) |
332 | { |
333 | struct net_device *dev; |
334 | int this_dev, found = 0; |
335 | |
336 | for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) { |
337 | if (io[this_dev] == 0) { |
338 | if (this_dev != 0) /* only complain once */ |
339 | break; |
340 | printk(KERN_NOTICE "lance.c: Module autoprobing not allowed. Append \"io=0xNNN\" value(s).\n" ); |
341 | return -EPERM; |
342 | } |
343 | dev = alloc_etherdev(0); |
344 | if (!dev) |
345 | break; |
346 | dev->irq = irq[this_dev]; |
347 | dev->base_addr = io[this_dev]; |
348 | dev->dma = dma[this_dev]; |
349 | if (do_lance_probe(dev) == 0) { |
350 | dev_lance[found++] = dev; |
351 | continue; |
352 | } |
353 | free_netdev(dev); |
354 | break; |
355 | } |
356 | if (found != 0) |
357 | return 0; |
358 | return -ENXIO; |
359 | } |
360 | module_init(lance_init_module); |
361 | |
362 | static void cleanup_card(struct net_device *dev) |
363 | { |
364 | struct lance_private *lp = dev->ml_priv; |
365 | if (dev->dma != 4) |
366 | free_dma(dev->dma); |
367 | release_region(dev->base_addr, LANCE_TOTAL_SIZE); |
368 | kfree(lp->tx_bounce_buffs); |
369 | kfree((void*)lp->rx_buffs); |
370 | kfree(lp); |
371 | } |
372 | |
373 | static void __exit lance_cleanup_module(void) |
374 | { |
375 | int this_dev; |
376 | |
377 | for (this_dev = 0; this_dev < MAX_CARDS; this_dev++) { |
378 | struct net_device *dev = dev_lance[this_dev]; |
379 | if (dev) { |
380 | unregister_netdev(dev); |
381 | cleanup_card(dev); |
382 | free_netdev(dev); |
383 | } |
384 | } |
385 | } |
386 | module_exit(lance_cleanup_module); |
387 | #endif /* MODULE */ |
388 | MODULE_LICENSE("GPL" ); |
389 | |
390 | |
391 | /* Starting in v2.1.*, the LANCE/PCnet probe is now similar to the other |
392 | board probes now that kmalloc() can allocate ISA DMA-able regions. |
393 | This also allows the LANCE driver to be used as a module. |
394 | */ |
395 | static int __init do_lance_probe(struct net_device *dev) |
396 | { |
397 | unsigned int *port; |
398 | int result; |
399 | |
400 | if (high_memory <= phys_to_virt(address: 16*1024*1024)) |
401 | lance_need_isa_bounce_buffers = 0; |
402 | |
403 | for (port = lance_portlist; *port; port++) { |
404 | int ioaddr = *port; |
405 | struct resource *r = request_region(ioaddr, LANCE_TOTAL_SIZE, |
406 | "lance-probe" ); |
407 | |
408 | if (r) { |
409 | /* Detect the card with minimal I/O reads */ |
410 | char offset14 = inb(port: ioaddr + 14); |
411 | int card; |
412 | for (card = 0; card < NUM_CARDS; ++card) |
413 | if (cards[card].id_offset14 == offset14) |
414 | break; |
415 | if (card < NUM_CARDS) {/*yes, the first byte matches*/ |
416 | char offset15 = inb(port: ioaddr + 15); |
417 | for (card = 0; card < NUM_CARDS; ++card) |
418 | if ((cards[card].id_offset14 == offset14) && |
419 | (cards[card].id_offset15 == offset15)) |
420 | break; |
421 | } |
422 | if (card < NUM_CARDS) { /*Signature OK*/ |
423 | result = lance_probe1(dev, ioaddr, irq: 0, options: 0); |
424 | if (!result) { |
425 | struct lance_private *lp = dev->ml_priv; |
426 | int ver = lp->chip_version; |
427 | |
428 | r->name = chip_table[ver].name; |
429 | return 0; |
430 | } |
431 | } |
432 | release_region(ioaddr, LANCE_TOTAL_SIZE); |
433 | } |
434 | } |
435 | return -ENODEV; |
436 | } |
437 | |
438 | #ifndef MODULE |
439 | struct net_device * __init lance_probe(int unit) |
440 | { |
441 | struct net_device *dev = alloc_etherdev(0); |
442 | int err; |
443 | |
444 | if (!dev) |
445 | return ERR_PTR(error: -ENODEV); |
446 | |
447 | sprintf(buf: dev->name, fmt: "eth%d" , unit); |
448 | netdev_boot_setup_check(dev); |
449 | |
450 | err = do_lance_probe(dev); |
451 | if (err) |
452 | goto out; |
453 | return dev; |
454 | out: |
455 | free_netdev(dev); |
456 | return ERR_PTR(error: err); |
457 | } |
458 | #endif |
459 | |
460 | static const struct net_device_ops lance_netdev_ops = { |
461 | .ndo_open = lance_open, |
462 | .ndo_start_xmit = lance_start_xmit, |
463 | .ndo_stop = lance_close, |
464 | .ndo_get_stats = lance_get_stats, |
465 | .ndo_set_rx_mode = set_multicast_list, |
466 | .ndo_tx_timeout = lance_tx_timeout, |
467 | .ndo_set_mac_address = eth_mac_addr, |
468 | .ndo_validate_addr = eth_validate_addr, |
469 | }; |
470 | |
471 | static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int options) |
472 | { |
473 | struct lance_private *lp; |
474 | unsigned long dma_channels; /* Mark spuriously-busy DMA channels */ |
475 | int i, reset_val, lance_version; |
476 | const char *chipname; |
477 | /* Flags for specific chips or boards. */ |
478 | unsigned char hpJ2405A = 0; /* HP ISA adaptor */ |
479 | int hp_builtin = 0; /* HP on-board ethernet. */ |
480 | static int did_version; /* Already printed version info. */ |
481 | unsigned long flags; |
482 | int err = -ENOMEM; |
483 | void __iomem *bios; |
484 | u8 addr[ETH_ALEN]; |
485 | |
486 | /* First we look for special cases. |
487 | Check for HP's on-board ethernet by looking for 'HP' in the BIOS. |
488 | There are two HP versions, check the BIOS for the configuration port. |
489 | This method provided by L. Julliard, Laurent_Julliard@grenoble.hp.com. |
490 | */ |
491 | bios = ioremap(offset: 0xf00f0, size: 0x14); |
492 | if (!bios) |
493 | return -ENOMEM; |
494 | if (readw(addr: bios + 0x12) == 0x5048) { |
495 | static const short ioaddr_table[] = { 0x300, 0x320, 0x340, 0x360}; |
496 | int hp_port = (readl(addr: bios + 1) & 1) ? 0x499 : 0x99; |
497 | /* We can have boards other than the built-in! Verify this is on-board. */ |
498 | if ((inb(port: hp_port) & 0xc0) == 0x80 && |
499 | ioaddr_table[inb(port: hp_port) & 3] == ioaddr) |
500 | hp_builtin = hp_port; |
501 | } |
502 | iounmap(addr: bios); |
503 | /* We also recognize the HP Vectra on-board here, but check below. */ |
504 | hpJ2405A = (inb(port: ioaddr) == 0x08 && inb(port: ioaddr+1) == 0x00 && |
505 | inb(port: ioaddr+2) == 0x09); |
506 | |
507 | /* Reset the LANCE. */ |
508 | reset_val = inw(port: ioaddr+LANCE_RESET); /* Reset the LANCE */ |
509 | |
510 | /* The Un-Reset needed is only needed for the real NE2100, and will |
511 | confuse the HP board. */ |
512 | if (!hpJ2405A) |
513 | outw(value: reset_val, port: ioaddr+LANCE_RESET); |
514 | |
515 | outw(value: 0x0000, port: ioaddr+LANCE_ADDR); /* Switch to window 0 */ |
516 | if (inw(port: ioaddr+LANCE_DATA) != 0x0004) |
517 | return -ENODEV; |
518 | |
519 | /* Get the version of the chip. */ |
520 | outw(value: 88, port: ioaddr+LANCE_ADDR); |
521 | if (inw(port: ioaddr+LANCE_ADDR) != 88) { |
522 | lance_version = 0; |
523 | } else { /* Good, it's a newer chip. */ |
524 | int chip_version = inw(port: ioaddr+LANCE_DATA); |
525 | outw(value: 89, port: ioaddr+LANCE_ADDR); |
526 | chip_version |= inw(port: ioaddr+LANCE_DATA) << 16; |
527 | if (lance_debug > 2) |
528 | printk(" LANCE chip version is %#x.\n" , chip_version); |
529 | if ((chip_version & 0xfff) != 0x003) |
530 | return -ENODEV; |
531 | chip_version = (chip_version >> 12) & 0xffff; |
532 | for (lance_version = 1; chip_table[lance_version].id_number; lance_version++) { |
533 | if (chip_table[lance_version].id_number == chip_version) |
534 | break; |
535 | } |
536 | } |
537 | |
538 | /* We can't allocate private data from alloc_etherdev() because it must |
539 | a ISA DMA-able region. */ |
540 | chipname = chip_table[lance_version].name; |
541 | printk("%s: %s at %#3x, " , dev->name, chipname, ioaddr); |
542 | |
543 | /* There is a 16 byte station address PROM at the base address. |
544 | The first six bytes are the station address. */ |
545 | for (i = 0; i < 6; i++) |
546 | addr[i] = inb(port: ioaddr + i); |
547 | eth_hw_addr_set(dev, addr); |
548 | printk("%pM" , dev->dev_addr); |
549 | |
550 | dev->base_addr = ioaddr; |
551 | /* Make certain the data structures used by the LANCE are aligned and DMAble. */ |
552 | |
553 | lp = kzalloc(size: sizeof(*lp), GFP_DMA | GFP_KERNEL); |
554 | if (!lp) |
555 | return -ENOMEM; |
556 | if (lance_debug > 6) printk(" (#0x%05lx)" , (unsigned long)lp); |
557 | dev->ml_priv = lp; |
558 | lp->name = chipname; |
559 | lp->rx_buffs = (unsigned long)kmalloc_array(RX_RING_SIZE, PKT_BUF_SZ, |
560 | GFP_DMA | GFP_KERNEL); |
561 | if (!lp->rx_buffs) |
562 | goto out_lp; |
563 | if (lance_need_isa_bounce_buffers) { |
564 | lp->tx_bounce_buffs = kmalloc_array(TX_RING_SIZE, PKT_BUF_SZ, |
565 | GFP_DMA | GFP_KERNEL); |
566 | if (!lp->tx_bounce_buffs) |
567 | goto out_rx; |
568 | } else |
569 | lp->tx_bounce_buffs = NULL; |
570 | |
571 | lp->chip_version = lance_version; |
572 | spin_lock_init(&lp->devlock); |
573 | |
574 | lp->init_block.mode = 0x0003; /* Disable Rx and Tx. */ |
575 | for (i = 0; i < 6; i++) |
576 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; |
577 | lp->init_block.filter[0] = 0x00000000; |
578 | lp->init_block.filter[1] = 0x00000000; |
579 | lp->init_block.rx_ring = ((u32)isa_virt_to_bus(address: lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS; |
580 | lp->init_block.tx_ring = ((u32)isa_virt_to_bus(address: lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS; |
581 | |
582 | outw(value: 0x0001, port: ioaddr+LANCE_ADDR); |
583 | inw(port: ioaddr+LANCE_ADDR); |
584 | outw(value: (short) (u32) isa_virt_to_bus(address: &lp->init_block), port: ioaddr+LANCE_DATA); |
585 | outw(value: 0x0002, port: ioaddr+LANCE_ADDR); |
586 | inw(port: ioaddr+LANCE_ADDR); |
587 | outw(value: ((u32)isa_virt_to_bus(address: &lp->init_block)) >> 16, port: ioaddr+LANCE_DATA); |
588 | outw(value: 0x0000, port: ioaddr+LANCE_ADDR); |
589 | inw(port: ioaddr+LANCE_ADDR); |
590 | |
591 | if (irq) { /* Set iff PCI card. */ |
592 | dev->dma = 4; /* Native bus-master, no DMA channel needed. */ |
593 | dev->irq = irq; |
594 | } else if (hp_builtin) { |
595 | static const char dma_tbl[4] = {3, 5, 6, 0}; |
596 | static const char irq_tbl[4] = {3, 4, 5, 9}; |
597 | unsigned char port_val = inb(port: hp_builtin); |
598 | dev->dma = dma_tbl[(port_val >> 4) & 3]; |
599 | dev->irq = irq_tbl[(port_val >> 2) & 3]; |
600 | printk(" HP Vectra IRQ %d DMA %d.\n" , dev->irq, dev->dma); |
601 | } else if (hpJ2405A) { |
602 | static const char dma_tbl[4] = {3, 5, 6, 7}; |
603 | static const char irq_tbl[8] = {3, 4, 5, 9, 10, 11, 12, 15}; |
604 | short reset_val = inw(port: ioaddr+LANCE_RESET); |
605 | dev->dma = dma_tbl[(reset_val >> 2) & 3]; |
606 | dev->irq = irq_tbl[(reset_val >> 4) & 7]; |
607 | printk(" HP J2405A IRQ %d DMA %d.\n" , dev->irq, dev->dma); |
608 | } else if (lance_version == PCNET_ISAP) { /* The plug-n-play version. */ |
609 | short bus_info; |
610 | outw(value: 8, port: ioaddr+LANCE_ADDR); |
611 | bus_info = inw(port: ioaddr+LANCE_BUS_IF); |
612 | dev->dma = bus_info & 0x07; |
613 | dev->irq = (bus_info >> 4) & 0x0F; |
614 | } else { |
615 | /* The DMA channel may be passed in PARAM1. */ |
616 | if (dev->mem_start & 0x07) |
617 | dev->dma = dev->mem_start & 0x07; |
618 | } |
619 | |
620 | if (dev->dma == 0) { |
621 | /* Read the DMA channel status register, so that we can avoid |
622 | stuck DMA channels in the DMA detection below. */ |
623 | dma_channels = ((inb(DMA1_STAT_REG) >> 4) & 0x0f) | |
624 | (inb(DMA2_STAT_REG) & 0xf0); |
625 | } |
626 | err = -ENODEV; |
627 | if (dev->irq >= 2) |
628 | printk(" assigned IRQ %d" , dev->irq); |
629 | else if (lance_version != 0) { /* 7990 boards need DMA detection first. */ |
630 | unsigned long irq_mask; |
631 | |
632 | /* To auto-IRQ we enable the initialization-done and DMA error |
633 | interrupts. For ISA boards we get a DMA error, but VLB and PCI |
634 | boards will work. */ |
635 | irq_mask = probe_irq_on(); |
636 | |
637 | /* Trigger an initialization just for the interrupt. */ |
638 | outw(value: 0x0041, port: ioaddr+LANCE_DATA); |
639 | |
640 | mdelay(20); |
641 | dev->irq = probe_irq_off(irq_mask); |
642 | if (dev->irq) |
643 | printk(", probed IRQ %d" , dev->irq); |
644 | else { |
645 | printk(", failed to detect IRQ line.\n" ); |
646 | goto out_tx; |
647 | } |
648 | |
649 | /* Check for the initialization done bit, 0x0100, which means |
650 | that we don't need a DMA channel. */ |
651 | if (inw(port: ioaddr+LANCE_DATA) & 0x0100) |
652 | dev->dma = 4; |
653 | } |
654 | |
655 | if (dev->dma == 4) { |
656 | printk(", no DMA needed.\n" ); |
657 | } else if (dev->dma) { |
658 | if (request_dma(dmanr: dev->dma, device_id: chipname)) { |
659 | printk("DMA %d allocation failed.\n" , dev->dma); |
660 | goto out_tx; |
661 | } else |
662 | printk(", assigned DMA %d.\n" , dev->dma); |
663 | } else { /* OK, we have to auto-DMA. */ |
664 | for (i = 0; i < 4; i++) { |
665 | static const char dmas[] = { 5, 6, 7, 3 }; |
666 | int dma = dmas[i]; |
667 | int boguscnt; |
668 | |
669 | /* Don't enable a permanently busy DMA channel, or the machine |
670 | will hang. */ |
671 | if (test_bit(dma, &dma_channels)) |
672 | continue; |
673 | outw(value: 0x7f04, port: ioaddr+LANCE_DATA); /* Clear the memory error bits. */ |
674 | if (request_dma(dmanr: dma, device_id: chipname)) |
675 | continue; |
676 | |
677 | flags=claim_dma_lock(); |
678 | set_dma_mode(dmanr: dma, DMA_MODE_CASCADE); |
679 | enable_dma(dmanr: dma); |
680 | release_dma_lock(flags); |
681 | |
682 | /* Trigger an initialization. */ |
683 | outw(value: 0x0001, port: ioaddr+LANCE_DATA); |
684 | for (boguscnt = 100; boguscnt > 0; --boguscnt) |
685 | if (inw(port: ioaddr+LANCE_DATA) & 0x0900) |
686 | break; |
687 | if (inw(port: ioaddr+LANCE_DATA) & 0x0100) { |
688 | dev->dma = dma; |
689 | printk(", DMA %d.\n" , dev->dma); |
690 | break; |
691 | } else { |
692 | flags=claim_dma_lock(); |
693 | disable_dma(dmanr: dma); |
694 | release_dma_lock(flags); |
695 | free_dma(dmanr: dma); |
696 | } |
697 | } |
698 | if (i == 4) { /* Failure: bail. */ |
699 | printk("DMA detection failed.\n" ); |
700 | goto out_tx; |
701 | } |
702 | } |
703 | |
704 | if (lance_version == 0 && dev->irq == 0) { |
705 | /* We may auto-IRQ now that we have a DMA channel. */ |
706 | /* Trigger an initialization just for the interrupt. */ |
707 | unsigned long irq_mask; |
708 | |
709 | irq_mask = probe_irq_on(); |
710 | outw(value: 0x0041, port: ioaddr+LANCE_DATA); |
711 | |
712 | mdelay(40); |
713 | dev->irq = probe_irq_off(irq_mask); |
714 | if (dev->irq == 0) { |
715 | printk(" Failed to detect the 7990 IRQ line.\n" ); |
716 | goto out_dma; |
717 | } |
718 | printk(" Auto-IRQ detected IRQ%d.\n" , dev->irq); |
719 | } |
720 | |
721 | if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) { |
722 | /* Turn on auto-select of media (10baseT or BNC) so that the user |
723 | can watch the LEDs even if the board isn't opened. */ |
724 | outw(value: 0x0002, port: ioaddr+LANCE_ADDR); |
725 | /* Don't touch 10base2 power bit. */ |
726 | outw(inw(port: ioaddr+LANCE_BUS_IF) | 0x0002, port: ioaddr+LANCE_BUS_IF); |
727 | } |
728 | |
729 | if (lance_debug > 0 && did_version++ == 0) |
730 | printk(version); |
731 | |
732 | /* The LANCE-specific entries in the device structure. */ |
733 | dev->netdev_ops = &lance_netdev_ops; |
734 | dev->watchdog_timeo = TX_TIMEOUT; |
735 | |
736 | err = register_netdev(dev); |
737 | if (err) |
738 | goto out_dma; |
739 | return 0; |
740 | out_dma: |
741 | if (dev->dma != 4) |
742 | free_dma(dmanr: dev->dma); |
743 | out_tx: |
744 | kfree(objp: lp->tx_bounce_buffs); |
745 | out_rx: |
746 | kfree(objp: (void*)lp->rx_buffs); |
747 | out_lp: |
748 | kfree(objp: lp); |
749 | return err; |
750 | } |
751 | |
752 | |
753 | static int |
754 | lance_open(struct net_device *dev) |
755 | { |
756 | struct lance_private *lp = dev->ml_priv; |
757 | int ioaddr = dev->base_addr; |
758 | int i; |
759 | |
760 | if (dev->irq == 0 || |
761 | request_irq(irq: dev->irq, handler: lance_interrupt, flags: 0, name: dev->name, dev)) { |
762 | return -EAGAIN; |
763 | } |
764 | |
765 | /* We used to allocate DMA here, but that was silly. |
766 | DMA lines can't be shared! We now permanently allocate them. */ |
767 | |
768 | /* Reset the LANCE */ |
769 | inw(port: ioaddr+LANCE_RESET); |
770 | |
771 | /* The DMA controller is used as a no-operation slave, "cascade mode". */ |
772 | if (dev->dma != 4) { |
773 | unsigned long flags=claim_dma_lock(); |
774 | enable_dma(dmanr: dev->dma); |
775 | set_dma_mode(dmanr: dev->dma, DMA_MODE_CASCADE); |
776 | release_dma_lock(flags); |
777 | } |
778 | |
779 | /* Un-Reset the LANCE, needed only for the NE2100. */ |
780 | if (chip_table[lp->chip_version].flags & LANCE_MUST_UNRESET) |
781 | outw(value: 0, port: ioaddr+LANCE_RESET); |
782 | |
783 | if (chip_table[lp->chip_version].flags & LANCE_ENABLE_AUTOSELECT) { |
784 | /* This is 79C960-specific: Turn on auto-select of media (AUI, BNC). */ |
785 | outw(value: 0x0002, port: ioaddr+LANCE_ADDR); |
786 | /* Only touch autoselect bit. */ |
787 | outw(inw(port: ioaddr+LANCE_BUS_IF) | 0x0002, port: ioaddr+LANCE_BUS_IF); |
788 | } |
789 | |
790 | if (lance_debug > 1) |
791 | printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n" , |
792 | dev->name, dev->irq, dev->dma, |
793 | (u32) isa_virt_to_bus(lp->tx_ring), |
794 | (u32) isa_virt_to_bus(lp->rx_ring), |
795 | (u32) isa_virt_to_bus(&lp->init_block)); |
796 | |
797 | lance_init_ring(dev, GFP_KERNEL); |
798 | /* Re-initialize the LANCE, and start it when done. */ |
799 | outw(value: 0x0001, port: ioaddr+LANCE_ADDR); |
800 | outw(value: (short) (u32) isa_virt_to_bus(address: &lp->init_block), port: ioaddr+LANCE_DATA); |
801 | outw(value: 0x0002, port: ioaddr+LANCE_ADDR); |
802 | outw(value: ((u32)isa_virt_to_bus(address: &lp->init_block)) >> 16, port: ioaddr+LANCE_DATA); |
803 | |
804 | outw(value: 0x0004, port: ioaddr+LANCE_ADDR); |
805 | outw(value: 0x0915, port: ioaddr+LANCE_DATA); |
806 | |
807 | outw(value: 0x0000, port: ioaddr+LANCE_ADDR); |
808 | outw(value: 0x0001, port: ioaddr+LANCE_DATA); |
809 | |
810 | netif_start_queue (dev); |
811 | |
812 | i = 0; |
813 | while (i++ < 100) |
814 | if (inw(port: ioaddr+LANCE_DATA) & 0x0100) |
815 | break; |
816 | /* |
817 | * We used to clear the InitDone bit, 0x0100, here but Mark Stockton |
818 | * reports that doing so triggers a bug in the '974. |
819 | */ |
820 | outw(value: 0x0042, port: ioaddr+LANCE_DATA); |
821 | |
822 | if (lance_debug > 2) |
823 | printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n" , |
824 | dev->name, i, (u32) isa_virt_to_bus(&lp->init_block), inw(ioaddr+LANCE_DATA)); |
825 | |
826 | return 0; /* Always succeed */ |
827 | } |
828 | |
829 | /* The LANCE has been halted for one reason or another (busmaster memory |
830 | arbitration error, Tx FIFO underflow, driver stopped it to reconfigure, |
831 | etc.). Modern LANCE variants always reload their ring-buffer |
832 | configuration when restarted, so we must reinitialize our ring |
833 | context before restarting. As part of this reinitialization, |
834 | find all packets still on the Tx ring and pretend that they had been |
835 | sent (in effect, drop the packets on the floor) - the higher-level |
836 | protocols will time out and retransmit. It'd be better to shuffle |
837 | these skbs to a temp list and then actually re-Tx them after |
838 | restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com |
839 | */ |
840 | |
841 | static void |
842 | lance_purge_ring(struct net_device *dev) |
843 | { |
844 | struct lance_private *lp = dev->ml_priv; |
845 | int i; |
846 | |
847 | /* Free all the skbuffs in the Rx and Tx queues. */ |
848 | for (i = 0; i < RX_RING_SIZE; i++) { |
849 | struct sk_buff *skb = lp->rx_skbuff[i]; |
850 | lp->rx_skbuff[i] = NULL; |
851 | lp->rx_ring[i].base = 0; /* Not owned by LANCE chip. */ |
852 | if (skb) |
853 | dev_kfree_skb_any(skb); |
854 | } |
855 | for (i = 0; i < TX_RING_SIZE; i++) { |
856 | if (lp->tx_skbuff[i]) { |
857 | dev_kfree_skb_any(skb: lp->tx_skbuff[i]); |
858 | lp->tx_skbuff[i] = NULL; |
859 | } |
860 | } |
861 | } |
862 | |
863 | |
864 | /* Initialize the LANCE Rx and Tx rings. */ |
865 | static void |
866 | lance_init_ring(struct net_device *dev, gfp_t gfp) |
867 | { |
868 | struct lance_private *lp = dev->ml_priv; |
869 | int i; |
870 | |
871 | lp->cur_rx = lp->cur_tx = 0; |
872 | lp->dirty_rx = lp->dirty_tx = 0; |
873 | |
874 | for (i = 0; i < RX_RING_SIZE; i++) { |
875 | struct sk_buff *skb; |
876 | void *rx_buff; |
877 | |
878 | skb = alloc_skb(PKT_BUF_SZ, GFP_DMA | gfp); |
879 | lp->rx_skbuff[i] = skb; |
880 | if (skb) |
881 | rx_buff = skb->data; |
882 | else |
883 | rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp); |
884 | if (!rx_buff) |
885 | lp->rx_ring[i].base = 0; |
886 | else |
887 | lp->rx_ring[i].base = (u32)isa_virt_to_bus(address: rx_buff) | 0x80000000; |
888 | lp->rx_ring[i].buf_length = -PKT_BUF_SZ; |
889 | } |
890 | /* The Tx buffer address is filled in as needed, but we do need to clear |
891 | the upper ownership bit. */ |
892 | for (i = 0; i < TX_RING_SIZE; i++) { |
893 | lp->tx_skbuff[i] = NULL; |
894 | lp->tx_ring[i].base = 0; |
895 | } |
896 | |
897 | lp->init_block.mode = 0x0000; |
898 | for (i = 0; i < 6; i++) |
899 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; |
900 | lp->init_block.filter[0] = 0x00000000; |
901 | lp->init_block.filter[1] = 0x00000000; |
902 | lp->init_block.rx_ring = ((u32)isa_virt_to_bus(address: lp->rx_ring) & 0xffffff) | RX_RING_LEN_BITS; |
903 | lp->init_block.tx_ring = ((u32)isa_virt_to_bus(address: lp->tx_ring) & 0xffffff) | TX_RING_LEN_BITS; |
904 | } |
905 | |
906 | static void |
907 | lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit) |
908 | { |
909 | struct lance_private *lp = dev->ml_priv; |
910 | |
911 | if (must_reinit || |
912 | (chip_table[lp->chip_version].flags & LANCE_MUST_REINIT_RING)) { |
913 | lance_purge_ring(dev); |
914 | lance_init_ring(dev, GFP_ATOMIC); |
915 | } |
916 | outw(value: 0x0000, port: dev->base_addr + LANCE_ADDR); |
917 | outw(value: csr0_bits, port: dev->base_addr + LANCE_DATA); |
918 | } |
919 | |
920 | |
921 | static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue) |
922 | { |
923 | struct lance_private *lp = (struct lance_private *) dev->ml_priv; |
924 | int ioaddr = dev->base_addr; |
925 | |
926 | outw (value: 0, port: ioaddr + LANCE_ADDR); |
927 | printk ("%s: transmit timed out, status %4.4x, resetting.\n" , |
928 | dev->name, inw (ioaddr + LANCE_DATA)); |
929 | outw (value: 0x0004, port: ioaddr + LANCE_DATA); |
930 | dev->stats.tx_errors++; |
931 | #ifndef final_version |
932 | if (lance_debug > 3) { |
933 | int i; |
934 | printk (" Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d." , |
935 | lp->dirty_tx, lp->cur_tx, netif_queue_stopped(dev) ? " (full)" : "" , |
936 | lp->cur_rx); |
937 | for (i = 0; i < RX_RING_SIZE; i++) |
938 | printk ("%s %08x %04x %04x" , i & 0x3 ? "" : "\n " , |
939 | lp->rx_ring[i].base, -lp->rx_ring[i].buf_length, |
940 | lp->rx_ring[i].msg_length); |
941 | for (i = 0; i < TX_RING_SIZE; i++) |
942 | printk ("%s %08x %04x %04x" , i & 0x3 ? "" : "\n " , |
943 | lp->tx_ring[i].base, -lp->tx_ring[i].length, |
944 | lp->tx_ring[i].misc); |
945 | printk ("\n" ); |
946 | } |
947 | #endif |
948 | lance_restart (dev, csr0_bits: 0x0043, must_reinit: 1); |
949 | |
950 | netif_trans_update(dev); /* prevent tx timeout */ |
951 | netif_wake_queue (dev); |
952 | } |
953 | |
954 | |
955 | static netdev_tx_t lance_start_xmit(struct sk_buff *skb, |
956 | struct net_device *dev) |
957 | { |
958 | struct lance_private *lp = dev->ml_priv; |
959 | int ioaddr = dev->base_addr; |
960 | int entry; |
961 | unsigned long flags; |
962 | |
963 | spin_lock_irqsave(&lp->devlock, flags); |
964 | |
965 | if (lance_debug > 3) { |
966 | outw(value: 0x0000, port: ioaddr+LANCE_ADDR); |
967 | printk("%s: lance_start_xmit() called, csr0 %4.4x.\n" , dev->name, |
968 | inw(ioaddr+LANCE_DATA)); |
969 | outw(value: 0x0000, port: ioaddr+LANCE_DATA); |
970 | } |
971 | |
972 | /* Fill in a Tx ring entry */ |
973 | |
974 | /* Mask to ring buffer boundary. */ |
975 | entry = lp->cur_tx & TX_RING_MOD_MASK; |
976 | |
977 | /* Caution: the write order is important here, set the base address |
978 | with the "ownership" bits last. */ |
979 | |
980 | /* The old LANCE chips doesn't automatically pad buffers to min. size. */ |
981 | if (chip_table[lp->chip_version].flags & LANCE_MUST_PAD) { |
982 | if (skb->len < ETH_ZLEN) { |
983 | if (skb_padto(skb, ETH_ZLEN)) |
984 | goto out; |
985 | lp->tx_ring[entry].length = -ETH_ZLEN; |
986 | } |
987 | else |
988 | lp->tx_ring[entry].length = -skb->len; |
989 | } else |
990 | lp->tx_ring[entry].length = -skb->len; |
991 | |
992 | lp->tx_ring[entry].misc = 0x0000; |
993 | |
994 | dev->stats.tx_bytes += skb->len; |
995 | |
996 | /* If any part of this buffer is >16M we must copy it to a low-memory |
997 | buffer. */ |
998 | if ((u32)isa_virt_to_bus(address: skb->data) + skb->len > 0x01000000) { |
999 | if (lance_debug > 5) |
1000 | printk("%s: bouncing a high-memory packet (%#x).\n" , |
1001 | dev->name, (u32)isa_virt_to_bus(skb->data)); |
1002 | skb_copy_from_linear_data(skb, to: &lp->tx_bounce_buffs[entry], len: skb->len); |
1003 | lp->tx_ring[entry].base = |
1004 | ((u32)isa_virt_to_bus(address: (lp->tx_bounce_buffs + entry)) & 0xffffff) | 0x83000000; |
1005 | dev_consume_skb_irq(skb); |
1006 | } else { |
1007 | lp->tx_skbuff[entry] = skb; |
1008 | lp->tx_ring[entry].base = ((u32)isa_virt_to_bus(address: skb->data) & 0xffffff) | 0x83000000; |
1009 | } |
1010 | lp->cur_tx++; |
1011 | |
1012 | /* Trigger an immediate send poll. */ |
1013 | outw(value: 0x0000, port: ioaddr+LANCE_ADDR); |
1014 | outw(value: 0x0048, port: ioaddr+LANCE_DATA); |
1015 | |
1016 | if ((lp->cur_tx - lp->dirty_tx) >= TX_RING_SIZE) |
1017 | netif_stop_queue(dev); |
1018 | |
1019 | out: |
1020 | spin_unlock_irqrestore(lock: &lp->devlock, flags); |
1021 | return NETDEV_TX_OK; |
1022 | } |
1023 | |
1024 | /* The LANCE interrupt handler. */ |
1025 | static irqreturn_t lance_interrupt(int irq, void *dev_id) |
1026 | { |
1027 | struct net_device *dev = dev_id; |
1028 | struct lance_private *lp; |
1029 | int csr0, ioaddr, boguscnt=10; |
1030 | int must_restart; |
1031 | |
1032 | ioaddr = dev->base_addr; |
1033 | lp = dev->ml_priv; |
1034 | |
1035 | spin_lock (lock: &lp->devlock); |
1036 | |
1037 | outw(value: 0x00, port: dev->base_addr + LANCE_ADDR); |
1038 | while ((csr0 = inw(port: dev->base_addr + LANCE_DATA)) & 0x8600 && |
1039 | --boguscnt >= 0) { |
1040 | /* Acknowledge all of the current interrupt sources ASAP. */ |
1041 | outw(value: csr0 & ~0x004f, port: dev->base_addr + LANCE_DATA); |
1042 | |
1043 | must_restart = 0; |
1044 | |
1045 | if (lance_debug > 5) |
1046 | printk("%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n" , |
1047 | dev->name, csr0, inw(dev->base_addr + LANCE_DATA)); |
1048 | |
1049 | if (csr0 & 0x0400) /* Rx interrupt */ |
1050 | lance_rx(dev); |
1051 | |
1052 | if (csr0 & 0x0200) { /* Tx-done interrupt */ |
1053 | int dirty_tx = lp->dirty_tx; |
1054 | |
1055 | while (dirty_tx < lp->cur_tx) { |
1056 | int entry = dirty_tx & TX_RING_MOD_MASK; |
1057 | int status = lp->tx_ring[entry].base; |
1058 | |
1059 | if (status < 0) |
1060 | break; /* It still hasn't been Txed */ |
1061 | |
1062 | lp->tx_ring[entry].base = 0; |
1063 | |
1064 | if (status & 0x40000000) { |
1065 | /* There was an major error, log it. */ |
1066 | int err_status = lp->tx_ring[entry].misc; |
1067 | dev->stats.tx_errors++; |
1068 | if (err_status & 0x0400) |
1069 | dev->stats.tx_aborted_errors++; |
1070 | if (err_status & 0x0800) |
1071 | dev->stats.tx_carrier_errors++; |
1072 | if (err_status & 0x1000) |
1073 | dev->stats.tx_window_errors++; |
1074 | if (err_status & 0x4000) { |
1075 | /* Ackk! On FIFO errors the Tx unit is turned off! */ |
1076 | dev->stats.tx_fifo_errors++; |
1077 | /* Remove this verbosity later! */ |
1078 | printk("%s: Tx FIFO error! Status %4.4x.\n" , |
1079 | dev->name, csr0); |
1080 | /* Restart the chip. */ |
1081 | must_restart = 1; |
1082 | } |
1083 | } else { |
1084 | if (status & 0x18000000) |
1085 | dev->stats.collisions++; |
1086 | dev->stats.tx_packets++; |
1087 | } |
1088 | |
1089 | /* We must free the original skb if it's not a data-only copy |
1090 | in the bounce buffer. */ |
1091 | if (lp->tx_skbuff[entry]) { |
1092 | dev_consume_skb_irq(skb: lp->tx_skbuff[entry]); |
1093 | lp->tx_skbuff[entry] = NULL; |
1094 | } |
1095 | dirty_tx++; |
1096 | } |
1097 | |
1098 | #ifndef final_version |
1099 | if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) { |
1100 | printk("out-of-sync dirty pointer, %d vs. %d, full=%s.\n" , |
1101 | dirty_tx, lp->cur_tx, |
1102 | netif_queue_stopped(dev) ? "yes" : "no" ); |
1103 | dirty_tx += TX_RING_SIZE; |
1104 | } |
1105 | #endif |
1106 | |
1107 | /* if the ring is no longer full, accept more packets */ |
1108 | if (netif_queue_stopped(dev) && |
1109 | dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) |
1110 | netif_wake_queue (dev); |
1111 | |
1112 | lp->dirty_tx = dirty_tx; |
1113 | } |
1114 | |
1115 | /* Log misc errors. */ |
1116 | if (csr0 & 0x4000) |
1117 | dev->stats.tx_errors++; /* Tx babble. */ |
1118 | if (csr0 & 0x1000) |
1119 | dev->stats.rx_errors++; /* Missed a Rx frame. */ |
1120 | if (csr0 & 0x0800) { |
1121 | printk("%s: Bus master arbitration failure, status %4.4x.\n" , |
1122 | dev->name, csr0); |
1123 | /* Restart the chip. */ |
1124 | must_restart = 1; |
1125 | } |
1126 | |
1127 | if (must_restart) { |
1128 | /* stop the chip to clear the error condition, then restart */ |
1129 | outw(value: 0x0000, port: dev->base_addr + LANCE_ADDR); |
1130 | outw(value: 0x0004, port: dev->base_addr + LANCE_DATA); |
1131 | lance_restart(dev, csr0_bits: 0x0002, must_reinit: 0); |
1132 | } |
1133 | } |
1134 | |
1135 | /* Clear any other interrupt, and set interrupt enable. */ |
1136 | outw(value: 0x0000, port: dev->base_addr + LANCE_ADDR); |
1137 | outw(value: 0x7940, port: dev->base_addr + LANCE_DATA); |
1138 | |
1139 | if (lance_debug > 4) |
1140 | printk("%s: exiting interrupt, csr%d=%#4.4x.\n" , |
1141 | dev->name, inw(ioaddr + LANCE_ADDR), |
1142 | inw(dev->base_addr + LANCE_DATA)); |
1143 | |
1144 | spin_unlock (lock: &lp->devlock); |
1145 | return IRQ_HANDLED; |
1146 | } |
1147 | |
1148 | static int |
1149 | lance_rx(struct net_device *dev) |
1150 | { |
1151 | struct lance_private *lp = dev->ml_priv; |
1152 | int entry = lp->cur_rx & RX_RING_MOD_MASK; |
1153 | int i; |
1154 | |
1155 | /* If we own the next entry, it's a new packet. Send it up. */ |
1156 | while (lp->rx_ring[entry].base >= 0) { |
1157 | int status = lp->rx_ring[entry].base >> 24; |
1158 | |
1159 | if (status != 0x03) { /* There was an error. */ |
1160 | /* There is a tricky error noted by John Murphy, |
1161 | <murf@perftech.com> to Russ Nelson: Even with full-sized |
1162 | buffers it's possible for a jabber packet to use two |
1163 | buffers, with only the last correctly noting the error. */ |
1164 | if (status & 0x01) /* Only count a general error at the */ |
1165 | dev->stats.rx_errors++; /* end of a packet.*/ |
1166 | if (status & 0x20) |
1167 | dev->stats.rx_frame_errors++; |
1168 | if (status & 0x10) |
1169 | dev->stats.rx_over_errors++; |
1170 | if (status & 0x08) |
1171 | dev->stats.rx_crc_errors++; |
1172 | if (status & 0x04) |
1173 | dev->stats.rx_fifo_errors++; |
1174 | lp->rx_ring[entry].base &= 0x03ffffff; |
1175 | } |
1176 | else |
1177 | { |
1178 | /* Malloc up new buffer, compatible with net3. */ |
1179 | short pkt_len = (lp->rx_ring[entry].msg_length & 0xfff)-4; |
1180 | struct sk_buff *skb; |
1181 | |
1182 | if(pkt_len<60) |
1183 | { |
1184 | printk("%s: Runt packet!\n" ,dev->name); |
1185 | dev->stats.rx_errors++; |
1186 | } |
1187 | else |
1188 | { |
1189 | skb = dev_alloc_skb(length: pkt_len+2); |
1190 | if (!skb) |
1191 | { |
1192 | printk("%s: Memory squeeze, deferring packet.\n" , dev->name); |
1193 | for (i=0; i < RX_RING_SIZE; i++) |
1194 | if (lp->rx_ring[(entry+i) & RX_RING_MOD_MASK].base < 0) |
1195 | break; |
1196 | |
1197 | if (i > RX_RING_SIZE -2) |
1198 | { |
1199 | dev->stats.rx_dropped++; |
1200 | lp->rx_ring[entry].base |= 0x80000000; |
1201 | lp->cur_rx++; |
1202 | } |
1203 | break; |
1204 | } |
1205 | skb_reserve(skb,len: 2); /* 16 byte align */ |
1206 | skb_put(skb,len: pkt_len); /* Make room */ |
1207 | skb_copy_to_linear_data(skb, |
1208 | from: (unsigned char *)isa_bus_to_virt(address: (lp->rx_ring[entry].base & 0x00ffffff)), |
1209 | len: pkt_len); |
1210 | skb->protocol=eth_type_trans(skb,dev); |
1211 | netif_rx(skb); |
1212 | dev->stats.rx_packets++; |
1213 | dev->stats.rx_bytes += pkt_len; |
1214 | } |
1215 | } |
1216 | /* The docs say that the buffer length isn't touched, but Andrew Boyd |
1217 | of QNX reports that some revs of the 79C965 clear it. */ |
1218 | lp->rx_ring[entry].buf_length = -PKT_BUF_SZ; |
1219 | lp->rx_ring[entry].base |= 0x80000000; |
1220 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; |
1221 | } |
1222 | |
1223 | /* We should check that at least two ring entries are free. If not, |
1224 | we should free one and mark stats->rx_dropped++. */ |
1225 | |
1226 | return 0; |
1227 | } |
1228 | |
1229 | static int |
1230 | lance_close(struct net_device *dev) |
1231 | { |
1232 | int ioaddr = dev->base_addr; |
1233 | struct lance_private *lp = dev->ml_priv; |
1234 | |
1235 | netif_stop_queue (dev); |
1236 | |
1237 | if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) { |
1238 | outw(value: 112, port: ioaddr+LANCE_ADDR); |
1239 | dev->stats.rx_missed_errors = inw(port: ioaddr+LANCE_DATA); |
1240 | } |
1241 | outw(value: 0, port: ioaddr+LANCE_ADDR); |
1242 | |
1243 | if (lance_debug > 1) |
1244 | printk("%s: Shutting down ethercard, status was %2.2x.\n" , |
1245 | dev->name, inw(ioaddr+LANCE_DATA)); |
1246 | |
1247 | /* We stop the LANCE here -- it occasionally polls |
1248 | memory if we don't. */ |
1249 | outw(value: 0x0004, port: ioaddr+LANCE_DATA); |
1250 | |
1251 | if (dev->dma != 4) |
1252 | { |
1253 | unsigned long flags=claim_dma_lock(); |
1254 | disable_dma(dmanr: dev->dma); |
1255 | release_dma_lock(flags); |
1256 | } |
1257 | free_irq(dev->irq, dev); |
1258 | |
1259 | lance_purge_ring(dev); |
1260 | |
1261 | return 0; |
1262 | } |
1263 | |
1264 | static struct net_device_stats *lance_get_stats(struct net_device *dev) |
1265 | { |
1266 | struct lance_private *lp = dev->ml_priv; |
1267 | |
1268 | if (chip_table[lp->chip_version].flags & LANCE_HAS_MISSED_FRAME) { |
1269 | short ioaddr = dev->base_addr; |
1270 | short saved_addr; |
1271 | unsigned long flags; |
1272 | |
1273 | spin_lock_irqsave(&lp->devlock, flags); |
1274 | saved_addr = inw(port: ioaddr+LANCE_ADDR); |
1275 | outw(value: 112, port: ioaddr+LANCE_ADDR); |
1276 | dev->stats.rx_missed_errors = inw(port: ioaddr+LANCE_DATA); |
1277 | outw(value: saved_addr, port: ioaddr+LANCE_ADDR); |
1278 | spin_unlock_irqrestore(lock: &lp->devlock, flags); |
1279 | } |
1280 | |
1281 | return &dev->stats; |
1282 | } |
1283 | |
1284 | /* Set or clear the multicast filter for this adaptor. |
1285 | */ |
1286 | |
1287 | static void set_multicast_list(struct net_device *dev) |
1288 | { |
1289 | short ioaddr = dev->base_addr; |
1290 | |
1291 | outw(value: 0, port: ioaddr+LANCE_ADDR); |
1292 | outw(value: 0x0004, port: ioaddr+LANCE_DATA); /* Temporarily stop the lance. */ |
1293 | |
1294 | if (dev->flags&IFF_PROMISC) { |
1295 | outw(value: 15, port: ioaddr+LANCE_ADDR); |
1296 | outw(value: 0x8000, port: ioaddr+LANCE_DATA); /* Set promiscuous mode */ |
1297 | } else { |
1298 | short multicast_table[4]; |
1299 | int i; |
1300 | int num_addrs=netdev_mc_count(dev); |
1301 | if(dev->flags&IFF_ALLMULTI) |
1302 | num_addrs=1; |
1303 | /* FIXIT: We don't use the multicast table, but rely on upper-layer filtering. */ |
1304 | memset(multicast_table, (num_addrs == 0) ? 0 : -1, sizeof(multicast_table)); |
1305 | for (i = 0; i < 4; i++) { |
1306 | outw(value: 8 + i, port: ioaddr+LANCE_ADDR); |
1307 | outw(value: multicast_table[i], port: ioaddr+LANCE_DATA); |
1308 | } |
1309 | outw(value: 15, port: ioaddr+LANCE_ADDR); |
1310 | outw(value: 0x0000, port: ioaddr+LANCE_DATA); /* Unset promiscuous mode */ |
1311 | } |
1312 | |
1313 | lance_restart(dev, csr0_bits: 0x0142, must_reinit: 0); /* Resume normal operation */ |
1314 | |
1315 | } |
1316 | |
1317 | |