1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * linux/drivers/acorn/net/ether1.h |
4 | * |
5 | * Copyright (C) 1996 Russell King |
6 | * |
7 | * Network driver for Acorn Ether1 cards. |
8 | */ |
9 | |
10 | #ifndef _LINUX_ether1_H |
11 | #define _LINUX_ether1_H |
12 | |
13 | #ifdef __ETHER1_C |
14 | /* use 0 for production, 1 for verification, >2 for debug */ |
15 | #ifndef NET_DEBUG |
16 | #define NET_DEBUG 0 |
17 | #endif |
18 | |
19 | #define priv(dev) ((struct ether1_priv *)netdev_priv(dev)) |
20 | |
21 | /* Page register */ |
22 | #define REG_PAGE (priv(dev)->base + 0x0000) |
23 | |
24 | /* Control register */ |
25 | #define REG_CONTROL (priv(dev)->base + 0x0004) |
26 | #define CTRL_RST 0x01 |
27 | #define CTRL_LOOPBACK 0x02 |
28 | #define CTRL_CA 0x04 |
29 | #define CTRL_ACK 0x08 |
30 | |
31 | #define ETHER1_RAM (priv(dev)->base + 0x2000) |
32 | |
33 | /* HW address */ |
34 | #define IDPROM_ADDRESS (priv(dev)->base + 0x0024) |
35 | |
36 | struct ether1_priv { |
37 | void __iomem *base; |
38 | unsigned int tx_link; |
39 | unsigned int tx_head; |
40 | volatile unsigned int tx_tail; |
41 | volatile unsigned int rx_head; |
42 | volatile unsigned int rx_tail; |
43 | unsigned char bus_type; |
44 | unsigned char resetting; |
45 | unsigned char initialising : 1; |
46 | unsigned char restart : 1; |
47 | }; |
48 | |
49 | #define I82586_NULL (-1) |
50 | |
51 | typedef struct { /* tdr */ |
52 | unsigned short tdr_status; |
53 | unsigned short tdr_command; |
54 | unsigned short tdr_link; |
55 | unsigned short tdr_result; |
56 | #define TDR_TIME (0x7ff) |
57 | #define TDR_SHORT (1 << 12) |
58 | #define TDR_OPEN (1 << 13) |
59 | #define TDR_XCVRPROB (1 << 14) |
60 | #define TDR_LNKOK (1 << 15) |
61 | } tdr_t; |
62 | |
63 | typedef struct { /* transmit */ |
64 | unsigned short tx_status; |
65 | unsigned short tx_command; |
66 | unsigned short tx_link; |
67 | unsigned short tx_tbdoffset; |
68 | } tx_t; |
69 | |
70 | typedef struct { /* tbd */ |
71 | unsigned short tbd_opts; |
72 | #define TBD_CNT (0x3fff) |
73 | #define TBD_EOL (1 << 15) |
74 | unsigned short tbd_link; |
75 | unsigned short tbd_bufl; |
76 | unsigned short tbd_bufh; |
77 | } tbd_t; |
78 | |
79 | typedef struct { /* rfd */ |
80 | unsigned short rfd_status; |
81 | #define RFD_NOEOF (1 << 6) |
82 | #define RFD_FRAMESHORT (1 << 7) |
83 | #define RFD_DMAOVRN (1 << 8) |
84 | #define RFD_NORESOURCES (1 << 9) |
85 | #define RFD_ALIGNERROR (1 << 10) |
86 | #define RFD_CRCERROR (1 << 11) |
87 | #define RFD_OK (1 << 13) |
88 | #define RFD_FDCONSUMED (1 << 14) |
89 | #define RFD_COMPLETE (1 << 15) |
90 | unsigned short rfd_command; |
91 | #define RFD_CMDSUSPEND (1 << 14) |
92 | #define RFD_CMDEL (1 << 15) |
93 | unsigned short rfd_link; |
94 | unsigned short rfd_rbdoffset; |
95 | unsigned char rfd_dest[6]; |
96 | unsigned char rfd_src[6]; |
97 | unsigned short rfd_len; |
98 | } rfd_t; |
99 | |
100 | typedef struct { /* rbd */ |
101 | unsigned short rbd_status; |
102 | #define RBD_ACNT (0x3fff) |
103 | #define RBD_ACNTVALID (1 << 14) |
104 | #define RBD_EOF (1 << 15) |
105 | unsigned short rbd_link; |
106 | unsigned short rbd_bufl; |
107 | unsigned short rbd_bufh; |
108 | unsigned short rbd_len; |
109 | } rbd_t; |
110 | |
111 | typedef struct { /* nop */ |
112 | unsigned short nop_status; |
113 | unsigned short nop_command; |
114 | unsigned short nop_link; |
115 | } nop_t; |
116 | |
117 | typedef struct { /* set multicast */ |
118 | unsigned short mc_status; |
119 | unsigned short mc_command; |
120 | unsigned short mc_link; |
121 | unsigned short mc_cnt; |
122 | unsigned char mc_addrs[1][6]; |
123 | } mc_t; |
124 | |
125 | typedef struct { /* set address */ |
126 | unsigned short sa_status; |
127 | unsigned short sa_command; |
128 | unsigned short sa_link; |
129 | unsigned char sa_addr[6]; |
130 | } sa_t; |
131 | |
132 | typedef struct { /* config command */ |
133 | unsigned short cfg_status; |
134 | unsigned short cfg_command; |
135 | unsigned short cfg_link; |
136 | unsigned char cfg_bytecnt; /* size foll data: 4 - 12 */ |
137 | unsigned char cfg_fifolim; /* FIFO threshold */ |
138 | unsigned char cfg_byte8; |
139 | #define CFG8_SRDY (1 << 6) |
140 | #define CFG8_SAVEBADF (1 << 7) |
141 | unsigned char cfg_byte9; |
142 | #define CFG9_ADDRLEN(x) (x) |
143 | #define CFG9_ADDRLENBUF (1 << 3) |
144 | #define CFG9_PREAMB2 (0 << 4) |
145 | #define CFG9_PREAMB4 (1 << 4) |
146 | #define CFG9_PREAMB8 (2 << 4) |
147 | #define CFG9_PREAMB16 (3 << 4) |
148 | #define CFG9_ILOOPBACK (1 << 6) |
149 | #define CFG9_ELOOPBACK (1 << 7) |
150 | unsigned char cfg_byte10; |
151 | #define CFG10_LINPRI(x) (x) |
152 | #define CFG10_ACR(x) (x << 4) |
153 | #define CFG10_BOFMET (1 << 7) |
154 | unsigned char cfg_ifs; |
155 | unsigned char cfg_slotl; |
156 | unsigned char cfg_byte13; |
157 | #define CFG13_SLOTH(x) (x) |
158 | #define CFG13_RETRY(x) (x << 4) |
159 | unsigned char cfg_byte14; |
160 | #define CFG14_PROMISC (1 << 0) |
161 | #define CFG14_DISBRD (1 << 1) |
162 | #define CFG14_MANCH (1 << 2) |
163 | #define CFG14_TNCRS (1 << 3) |
164 | #define CFG14_NOCRC (1 << 4) |
165 | #define CFG14_CRC16 (1 << 5) |
166 | #define CFG14_BTSTF (1 << 6) |
167 | #define CFG14_FLGPAD (1 << 7) |
168 | unsigned char cfg_byte15; |
169 | #define CFG15_CSTF(x) (x) |
170 | #define CFG15_ICSS (1 << 3) |
171 | #define CFG15_CDTF(x) (x << 4) |
172 | #define CFG15_ICDS (1 << 7) |
173 | unsigned short cfg_minfrmlen; |
174 | } cfg_t; |
175 | |
176 | typedef struct { /* scb */ |
177 | unsigned short scb_status; /* status of 82586 */ |
178 | #define SCB_STRXMASK (7 << 4) /* Receive unit status */ |
179 | #define SCB_STRXIDLE (0 << 4) /* Idle */ |
180 | #define SCB_STRXSUSP (1 << 4) /* Suspended */ |
181 | #define SCB_STRXNRES (2 << 4) /* No resources */ |
182 | #define SCB_STRXRDY (4 << 4) /* Ready */ |
183 | #define SCB_STCUMASK (7 << 8) /* Command unit status */ |
184 | #define SCB_STCUIDLE (0 << 8) /* Idle */ |
185 | #define SCB_STCUSUSP (1 << 8) /* Suspended */ |
186 | #define SCB_STCUACTV (2 << 8) /* Active */ |
187 | #define SCB_STRNR (1 << 12) /* Receive unit not ready */ |
188 | #define SCB_STCNA (1 << 13) /* Command unit not ready */ |
189 | #define SCB_STFR (1 << 14) /* Frame received */ |
190 | #define SCB_STCX (1 << 15) /* Command completed */ |
191 | unsigned short scb_command; /* Next command */ |
192 | #define SCB_CMDRXSTART (1 << 4) /* Start (at rfa_offset) */ |
193 | #define SCB_CMDRXRESUME (2 << 4) /* Resume reception */ |
194 | #define SCB_CMDRXSUSPEND (3 << 4) /* Suspend reception */ |
195 | #define SCB_CMDRXABORT (4 << 4) /* Abort reception */ |
196 | #define SCB_CMDCUCSTART (1 << 8) /* Start (at cbl_offset) */ |
197 | #define SCB_CMDCUCRESUME (2 << 8) /* Resume execution */ |
198 | #define SCB_CMDCUCSUSPEND (3 << 8) /* Suspend execution */ |
199 | #define SCB_CMDCUCABORT (4 << 8) /* Abort execution */ |
200 | #define SCB_CMDACKRNR (1 << 12) /* Ack RU not ready */ |
201 | #define SCB_CMDACKCNA (1 << 13) /* Ack CU not ready */ |
202 | #define SCB_CMDACKFR (1 << 14) /* Ack Frame received */ |
203 | #define SCB_CMDACKCX (1 << 15) /* Ack Command complete */ |
204 | unsigned short scb_cbl_offset; /* Offset of first command unit */ |
205 | unsigned short scb_rfa_offset; /* Offset of first receive frame area */ |
206 | unsigned short scb_crc_errors; /* Properly aligned frame with CRC error*/ |
207 | unsigned short scb_aln_errors; /* Misaligned frames */ |
208 | unsigned short scb_rsc_errors; /* Frames lost due to no space */ |
209 | unsigned short scb_ovn_errors; /* Frames lost due to slow bus */ |
210 | } scb_t; |
211 | |
212 | typedef struct { /* iscp */ |
213 | unsigned short iscp_busy; /* set by CPU before CA */ |
214 | unsigned short iscp_offset; /* offset of SCB */ |
215 | unsigned short iscp_basel; /* base of SCB */ |
216 | unsigned short iscp_baseh; |
217 | } iscp_t; |
218 | |
219 | /* this address must be 0xfff6 */ |
220 | typedef struct { /* scp */ |
221 | unsigned short scp_sysbus; /* bus size */ |
222 | #define SCP_SY_16BBUS 0x00 |
223 | #define SCP_SY_8BBUS 0x01 |
224 | unsigned short scp_junk[2]; /* junk */ |
225 | unsigned short scp_iscpl; /* lower 16 bits of iscp */ |
226 | unsigned short scp_iscph; /* upper 16 bits of iscp */ |
227 | } scp_t; |
228 | |
229 | /* commands */ |
230 | #define CMD_NOP 0 |
231 | #define CMD_SETADDRESS 1 |
232 | #define CMD_CONFIG 2 |
233 | #define CMD_SETMULTICAST 3 |
234 | #define CMD_TX 4 |
235 | #define CMD_TDR 5 |
236 | #define CMD_DUMP 6 |
237 | #define CMD_DIAGNOSE 7 |
238 | |
239 | #define CMD_MASK 7 |
240 | |
241 | #define CMD_INTR (1 << 13) |
242 | #define CMD_SUSP (1 << 14) |
243 | #define CMD_EOL (1 << 15) |
244 | |
245 | #define STAT_COLLISIONS (15) |
246 | #define STAT_COLLEXCESSIVE (1 << 5) |
247 | #define STAT_COLLAFTERTX (1 << 6) |
248 | #define STAT_TXDEFERRED (1 << 7) |
249 | #define STAT_TXSLOWDMA (1 << 8) |
250 | #define STAT_TXLOSTCTS (1 << 9) |
251 | #define STAT_NOCARRIER (1 << 10) |
252 | #define STAT_FAIL (1 << 11) |
253 | #define STAT_ABORTED (1 << 12) |
254 | #define STAT_OK (1 << 13) |
255 | #define STAT_BUSY (1 << 14) |
256 | #define STAT_COMPLETE (1 << 15) |
257 | #endif |
258 | #endif |
259 | |
260 | /* |
261 | * Ether1 card definitions: |
262 | * |
263 | * FAST accesses: |
264 | * +0 Page register |
265 | * 16 pages |
266 | * +4 Control |
267 | * '1' = reset |
268 | * '2' = loopback |
269 | * '4' = CA |
270 | * '8' = int ack |
271 | * |
272 | * RAM at address + 0x2000 |
273 | * Pod. Prod id = 3 |
274 | * Words after ID block [base + 8 words] |
275 | * +0 pcb issue (0x0c and 0xf3 invalid) |
276 | * +1 - +6 eth hw address |
277 | */ |
278 | |