1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /******************************************************************************* |
3 | Copyright (C) 2007-2009 STMicroelectronics Ltd |
4 | |
5 | |
6 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> |
7 | *******************************************************************************/ |
8 | |
9 | #ifndef __STMMAC_H__ |
10 | #define __STMMAC_H__ |
11 | |
12 | #define STMMAC_RESOURCE_NAME "stmmaceth" |
13 | |
14 | #include <linux/clk.h> |
15 | #include <linux/hrtimer.h> |
16 | #include <linux/if_vlan.h> |
17 | #include <linux/stmmac.h> |
18 | #include <linux/phylink.h> |
19 | #include <linux/pci.h> |
20 | #include "common.h" |
21 | #include <linux/ptp_clock_kernel.h> |
22 | #include <linux/net_tstamp.h> |
23 | #include <linux/reset.h> |
24 | #include <net/page_pool/types.h> |
25 | #include <net/xdp.h> |
26 | #include <uapi/linux/bpf.h> |
27 | |
28 | struct stmmac_resources { |
29 | void __iomem *addr; |
30 | u8 mac[ETH_ALEN]; |
31 | int wol_irq; |
32 | int lpi_irq; |
33 | int irq; |
34 | int sfty_ce_irq; |
35 | int sfty_ue_irq; |
36 | int rx_irq[MTL_MAX_RX_QUEUES]; |
37 | int tx_irq[MTL_MAX_TX_QUEUES]; |
38 | }; |
39 | |
40 | enum stmmac_txbuf_type { |
41 | STMMAC_TXBUF_T_SKB, |
42 | STMMAC_TXBUF_T_XDP_TX, |
43 | STMMAC_TXBUF_T_XDP_NDO, |
44 | STMMAC_TXBUF_T_XSK_TX, |
45 | }; |
46 | |
47 | struct stmmac_tx_info { |
48 | dma_addr_t buf; |
49 | bool map_as_page; |
50 | unsigned len; |
51 | bool last_segment; |
52 | bool is_jumbo; |
53 | enum stmmac_txbuf_type buf_type; |
54 | }; |
55 | |
56 | #define STMMAC_TBS_AVAIL BIT(0) |
57 | #define STMMAC_TBS_EN BIT(1) |
58 | |
59 | /* Frequently used values are kept adjacent for cache effect */ |
60 | struct stmmac_tx_queue { |
61 | u32 tx_count_frames; |
62 | int tbs; |
63 | struct hrtimer txtimer; |
64 | u32 queue_index; |
65 | struct stmmac_priv *priv_data; |
66 | struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; |
67 | struct dma_edesc *dma_entx; |
68 | struct dma_desc *dma_tx; |
69 | union { |
70 | struct sk_buff **tx_skbuff; |
71 | struct xdp_frame **xdpf; |
72 | }; |
73 | struct stmmac_tx_info *tx_skbuff_dma; |
74 | struct xsk_buff_pool *xsk_pool; |
75 | u32 xsk_frames_done; |
76 | unsigned int cur_tx; |
77 | unsigned int dirty_tx; |
78 | dma_addr_t dma_tx_phy; |
79 | dma_addr_t tx_tail_addr; |
80 | u32 mss; |
81 | }; |
82 | |
83 | struct stmmac_rx_buffer { |
84 | union { |
85 | struct { |
86 | struct page *page; |
87 | dma_addr_t addr; |
88 | __u32 page_offset; |
89 | }; |
90 | struct xdp_buff *xdp; |
91 | }; |
92 | struct page *sec_page; |
93 | dma_addr_t sec_addr; |
94 | }; |
95 | |
96 | struct stmmac_xdp_buff { |
97 | struct xdp_buff xdp; |
98 | struct stmmac_priv *priv; |
99 | struct dma_desc *desc; |
100 | struct dma_desc *ndesc; |
101 | }; |
102 | |
103 | struct stmmac_rx_queue { |
104 | u32 rx_count_frames; |
105 | u32 queue_index; |
106 | struct xdp_rxq_info xdp_rxq; |
107 | struct xsk_buff_pool *xsk_pool; |
108 | struct page_pool *page_pool; |
109 | struct stmmac_rx_buffer *buf_pool; |
110 | struct stmmac_priv *priv_data; |
111 | struct dma_extended_desc *dma_erx; |
112 | struct dma_desc *dma_rx ____cacheline_aligned_in_smp; |
113 | unsigned int cur_rx; |
114 | unsigned int dirty_rx; |
115 | unsigned int buf_alloc_num; |
116 | u32 rx_zeroc_thresh; |
117 | dma_addr_t dma_rx_phy; |
118 | u32 rx_tail_addr; |
119 | unsigned int state_saved; |
120 | struct { |
121 | struct sk_buff *skb; |
122 | unsigned int len; |
123 | unsigned int error; |
124 | } state; |
125 | }; |
126 | |
127 | struct stmmac_channel { |
128 | struct napi_struct rx_napi ____cacheline_aligned_in_smp; |
129 | struct napi_struct tx_napi ____cacheline_aligned_in_smp; |
130 | struct napi_struct rxtx_napi ____cacheline_aligned_in_smp; |
131 | struct stmmac_priv *priv_data; |
132 | spinlock_t lock; |
133 | u32 index; |
134 | }; |
135 | |
136 | struct stmmac_tc_entry { |
137 | bool in_use; |
138 | bool in_hw; |
139 | bool is_last; |
140 | bool is_frag; |
141 | void *frag_ptr; |
142 | unsigned int table_pos; |
143 | u32 handle; |
144 | u32 prio; |
145 | struct { |
146 | u32 match_data; |
147 | u32 match_en; |
148 | u8 af:1; |
149 | u8 rf:1; |
150 | u8 im:1; |
151 | u8 nc:1; |
152 | u8 res1:4; |
153 | u8 frame_offset; |
154 | u8 ok_index; |
155 | u8 dma_ch_no; |
156 | u32 res2; |
157 | } __packed val; |
158 | }; |
159 | |
160 | #define STMMAC_PPS_MAX 4 |
161 | struct stmmac_pps_cfg { |
162 | bool available; |
163 | struct timespec64 start; |
164 | struct timespec64 period; |
165 | }; |
166 | |
167 | struct { |
168 | int ; |
169 | u8 [STMMAC_RSS_HASH_KEY_SIZE]; |
170 | u32 [STMMAC_RSS_MAX_TABLE_SIZE]; |
171 | }; |
172 | |
173 | #define STMMAC_FLOW_ACTION_DROP BIT(0) |
174 | struct stmmac_flow_entry { |
175 | unsigned long cookie; |
176 | unsigned long action; |
177 | u8 ip_proto; |
178 | int in_use; |
179 | int idx; |
180 | int is_l4; |
181 | }; |
182 | |
183 | /* Rx Frame Steering */ |
184 | enum stmmac_rfs_type { |
185 | STMMAC_RFS_T_VLAN, |
186 | STMMAC_RFS_T_LLDP, |
187 | STMMAC_RFS_T_1588, |
188 | STMMAC_RFS_T_MAX, |
189 | }; |
190 | |
191 | struct stmmac_rfs_entry { |
192 | unsigned long cookie; |
193 | u16 etype; |
194 | int in_use; |
195 | int type; |
196 | int tc; |
197 | }; |
198 | |
199 | struct stmmac_dma_conf { |
200 | unsigned int dma_buf_sz; |
201 | |
202 | /* RX Queue */ |
203 | struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES]; |
204 | unsigned int dma_rx_size; |
205 | |
206 | /* TX Queue */ |
207 | struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES]; |
208 | unsigned int dma_tx_size; |
209 | }; |
210 | |
211 | struct stmmac_priv { |
212 | /* Frequently used values are kept adjacent for cache effect */ |
213 | u32 tx_coal_frames[MTL_MAX_TX_QUEUES]; |
214 | u32 tx_coal_timer[MTL_MAX_TX_QUEUES]; |
215 | u32 rx_coal_frames[MTL_MAX_TX_QUEUES]; |
216 | |
217 | int hwts_tx_en; |
218 | bool tx_path_in_lpi_mode; |
219 | bool tso; |
220 | int sph; |
221 | int sph_cap; |
222 | u32 sarc_type; |
223 | |
224 | unsigned int rx_copybreak; |
225 | u32 rx_riwt[MTL_MAX_TX_QUEUES]; |
226 | int hwts_rx_en; |
227 | |
228 | void __iomem *ioaddr; |
229 | struct net_device *dev; |
230 | struct device *device; |
231 | struct mac_device_info *hw; |
232 | int (*hwif_quirks)(struct stmmac_priv *priv); |
233 | struct mutex lock; |
234 | |
235 | struct stmmac_dma_conf dma_conf; |
236 | |
237 | /* Generic channel for NAPI */ |
238 | struct stmmac_channel channel[STMMAC_CH_MAX]; |
239 | |
240 | int speed; |
241 | unsigned int flow_ctrl; |
242 | unsigned int pause; |
243 | struct mii_bus *mii; |
244 | |
245 | struct phylink_config phylink_config; |
246 | struct phylink *phylink; |
247 | |
248 | struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; |
249 | struct stmmac_safety_stats sstats; |
250 | struct plat_stmmacenet_data *plat; |
251 | struct dma_features dma_cap; |
252 | struct stmmac_counters mmc; |
253 | int hw_cap_support; |
254 | int synopsys_id; |
255 | u32 msg_enable; |
256 | int wolopts; |
257 | int wol_irq; |
258 | int clk_csr; |
259 | struct timer_list eee_ctrl_timer; |
260 | int lpi_irq; |
261 | int eee_enabled; |
262 | int eee_active; |
263 | int tx_lpi_timer; |
264 | int tx_lpi_enabled; |
265 | int eee_tw_timer; |
266 | bool eee_sw_timer_en; |
267 | unsigned int mode; |
268 | unsigned int chain_mode; |
269 | int extend_desc; |
270 | struct hwtstamp_config tstamp_config; |
271 | struct ptp_clock *ptp_clock; |
272 | struct ptp_clock_info ptp_clock_ops; |
273 | unsigned int default_addend; |
274 | u32 sub_second_inc; |
275 | u32 systime_flags; |
276 | u32 adv_ts; |
277 | int use_riwt; |
278 | int irq_wake; |
279 | rwlock_t ptp_lock; |
280 | /* Protects auxiliary snapshot registers from concurrent access. */ |
281 | struct mutex aux_ts_lock; |
282 | wait_queue_head_t tstamp_busy_wait; |
283 | |
284 | void __iomem *mmcaddr; |
285 | void __iomem *ptpaddr; |
286 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
287 | int sfty_ce_irq; |
288 | int sfty_ue_irq; |
289 | int rx_irq[MTL_MAX_RX_QUEUES]; |
290 | int tx_irq[MTL_MAX_TX_QUEUES]; |
291 | /*irq name */ |
292 | char int_name_mac[IFNAMSIZ + 9]; |
293 | char int_name_wol[IFNAMSIZ + 9]; |
294 | char int_name_lpi[IFNAMSIZ + 9]; |
295 | char int_name_sfty_ce[IFNAMSIZ + 10]; |
296 | char int_name_sfty_ue[IFNAMSIZ + 10]; |
297 | char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14]; |
298 | char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18]; |
299 | |
300 | #ifdef CONFIG_DEBUG_FS |
301 | struct dentry *dbgfs_dir; |
302 | #endif |
303 | |
304 | unsigned long state; |
305 | struct workqueue_struct *wq; |
306 | struct work_struct service_task; |
307 | |
308 | /* Workqueue for handling FPE hand-shaking */ |
309 | unsigned long fpe_task_state; |
310 | struct workqueue_struct *fpe_wq; |
311 | struct work_struct fpe_task; |
312 | char wq_name[IFNAMSIZ + 4]; |
313 | |
314 | /* TC Handling */ |
315 | unsigned int tc_entries_max; |
316 | unsigned int tc_off_max; |
317 | struct stmmac_tc_entry *tc_entries; |
318 | unsigned int flow_entries_max; |
319 | struct stmmac_flow_entry *flow_entries; |
320 | unsigned int rfs_entries_max[STMMAC_RFS_T_MAX]; |
321 | unsigned int rfs_entries_cnt[STMMAC_RFS_T_MAX]; |
322 | unsigned int rfs_entries_total; |
323 | struct stmmac_rfs_entry *rfs_entries; |
324 | |
325 | /* Pulse Per Second output */ |
326 | struct stmmac_pps_cfg pps[STMMAC_PPS_MAX]; |
327 | |
328 | /* Receive Side Scaling */ |
329 | struct stmmac_rss ; |
330 | |
331 | /* XDP BPF Program */ |
332 | unsigned long *af_xdp_zc_qps; |
333 | struct bpf_prog *xdp_prog; |
334 | }; |
335 | |
336 | enum stmmac_state { |
337 | STMMAC_DOWN, |
338 | STMMAC_RESET_REQUESTED, |
339 | STMMAC_RESETING, |
340 | STMMAC_SERVICE_SCHED, |
341 | }; |
342 | |
343 | int stmmac_mdio_unregister(struct net_device *ndev); |
344 | int stmmac_mdio_register(struct net_device *ndev); |
345 | int stmmac_mdio_reset(struct mii_bus *mii); |
346 | int stmmac_xpcs_setup(struct mii_bus *mii); |
347 | void stmmac_set_ethtool_ops(struct net_device *netdev); |
348 | |
349 | int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags); |
350 | void stmmac_ptp_register(struct stmmac_priv *priv); |
351 | void stmmac_ptp_unregister(struct stmmac_priv *priv); |
352 | int stmmac_xdp_open(struct net_device *dev); |
353 | void stmmac_xdp_release(struct net_device *dev); |
354 | int stmmac_resume(struct device *dev); |
355 | int stmmac_suspend(struct device *dev); |
356 | void stmmac_dvr_remove(struct device *dev); |
357 | int stmmac_dvr_probe(struct device *device, |
358 | struct plat_stmmacenet_data *plat_dat, |
359 | struct stmmac_resources *res); |
360 | void stmmac_disable_eee_mode(struct stmmac_priv *priv); |
361 | bool stmmac_eee_init(struct stmmac_priv *priv); |
362 | int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); |
363 | int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); |
364 | int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); |
365 | void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable); |
366 | |
367 | static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) |
368 | { |
369 | return !!priv->xdp_prog; |
370 | } |
371 | |
372 | static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv) |
373 | { |
374 | if (stmmac_xdp_is_enabled(priv)) |
375 | return XDP_PACKET_HEADROOM; |
376 | |
377 | return 0; |
378 | } |
379 | |
380 | void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue); |
381 | void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue); |
382 | void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue); |
383 | void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue); |
384 | int stmmac_xsk_wakeup(struct net_device *dev, u32 queue, u32 flags); |
385 | struct timespec64 stmmac_calc_tas_basetime(ktime_t old_base_time, |
386 | ktime_t current_time, |
387 | u64 cycle_time); |
388 | |
389 | #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS) |
390 | void stmmac_selftest_run(struct net_device *dev, |
391 | struct ethtool_test *etest, u64 *buf); |
392 | void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data); |
393 | int stmmac_selftest_get_count(struct stmmac_priv *priv); |
394 | #else |
395 | static inline void stmmac_selftest_run(struct net_device *dev, |
396 | struct ethtool_test *etest, u64 *buf) |
397 | { |
398 | /* Not enabled */ |
399 | } |
400 | static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv, |
401 | u8 *data) |
402 | { |
403 | /* Not enabled */ |
404 | } |
405 | static inline int stmmac_selftest_get_count(struct stmmac_priv *priv) |
406 | { |
407 | return -EOPNOTSUPP; |
408 | } |
409 | #endif /* CONFIG_STMMAC_SELFTESTS */ |
410 | |
411 | #endif /* __STMMAC_H__ */ |
412 | |