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1/*
2 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
3 *
4 * Copyright (c) 2005 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/errno.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/slab.h>
20
21#include <pcmcia/ss.h>
22
23#include <mach/hardware.h>
24#include <asm/io.h>
25#include <asm/sizes.h>
26
27#include <mach/mux.h>
28#include <mach/tc.h>
29
30
31/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
32 * hard-wired timings to support Compact Flash memory cards; they won't work
33 * with various other devices (like WLAN adapters) without some external
34 * logic to help out.
35 *
36 * NOTE: CF controller docs disagree with address space docs as to where
37 * CF_BASE really lives; this is a doc erratum.
38 */
39#define CF_BASE 0xfffe2800
40
41/* status; read after IRQ */
42#define CF_STATUS (CF_BASE + 0x00)
43# define CF_STATUS_BAD_READ (1 << 2)
44# define CF_STATUS_BAD_WRITE (1 << 1)
45# define CF_STATUS_CARD_DETECT (1 << 0)
46
47/* which chipselect (CS0..CS3) is used for CF (active low) */
48#define CF_CFG (CF_BASE + 0x02)
49
50/* card reset */
51#define CF_CONTROL (CF_BASE + 0x04)
52# define CF_CONTROL_RESET (1 << 0)
53
54#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
55
56/*--------------------------------------------------------------------------*/
57
58static const char driver_name[] = "omap_cf";
59
60struct omap_cf_socket {
61 struct pcmcia_socket socket;
62
63 struct timer_list timer;
64 unsigned present:1;
65 unsigned active:1;
66
67 struct platform_device *pdev;
68 unsigned long phys_cf;
69 u_int irq;
70 struct resource iomem;
71};
72
73#define POLL_INTERVAL (2 * HZ)
74
75/*--------------------------------------------------------------------------*/
76
77static int omap_cf_ss_init(struct pcmcia_socket *s)
78{
79 return 0;
80}
81
82/* the timer is primarily to kick this socket's pccardd */
83static void omap_cf_timer(struct timer_list *t)
84{
85 struct omap_cf_socket *cf = from_timer(cf, t, timer);
86 unsigned present = omap_cf_present();
87
88 if (present != cf->present) {
89 cf->present = present;
90 pr_debug("%s: card %s\n", driver_name,
91 present ? "present" : "gone");
92 pcmcia_parse_events(&cf->socket, SS_DETECT);
93 }
94
95 if (cf->active)
96 mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
97}
98
99/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
100 * claim the card's IRQ. It may also detect some card insertions, but
101 * not removals; it can't always eliminate timer irqs.
102 */
103static irqreturn_t omap_cf_irq(int irq, void *_cf)
104{
105 struct omap_cf_socket *cf = (struct omap_cf_socket *)_cf;
106
107 omap_cf_timer(&cf->timer);
108 return IRQ_HANDLED;
109}
110
111static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
112{
113 if (!sp)
114 return -EINVAL;
115
116 /* NOTE CF is always 3VCARD */
117 if (omap_cf_present()) {
118 struct omap_cf_socket *cf;
119
120 *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
121 cf = container_of(s, struct omap_cf_socket, socket);
122 s->pcmcia_irq = 0;
123 s->pci_irq = cf->irq;
124 } else
125 *sp = 0;
126 return 0;
127}
128
129static int
130omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
131{
132 u16 control;
133
134 /* REVISIT some non-OSK boards may support power switching */
135 switch (s->Vcc) {
136 case 0:
137 case 33:
138 break;
139 default:
140 return -EINVAL;
141 }
142
143 control = omap_readw(CF_CONTROL);
144 if (s->flags & SS_RESET)
145 omap_writew(CF_CONTROL_RESET, CF_CONTROL);
146 else
147 omap_writew(0, CF_CONTROL);
148
149 pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
150 driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
151
152 return 0;
153}
154
155static int omap_cf_ss_suspend(struct pcmcia_socket *s)
156{
157 pr_debug("%s: %s\n", driver_name, __func__);
158 return omap_cf_set_socket(s, &dead_socket);
159}
160
161/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
162
163static int
164omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
165{
166 struct omap_cf_socket *cf;
167
168 cf = container_of(s, struct omap_cf_socket, socket);
169 io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
170 io->start = cf->phys_cf + SZ_4K;
171 io->stop = io->start + SZ_2K - 1;
172 return 0;
173}
174
175static int
176omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
177{
178 struct omap_cf_socket *cf;
179
180 if (map->card_start)
181 return -EINVAL;
182 cf = container_of(s, struct omap_cf_socket, socket);
183 map->static_start = cf->phys_cf;
184 map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
185 if (map->flags & MAP_ATTRIB)
186 map->static_start += SZ_2K;
187 return 0;
188}
189
190static struct pccard_operations omap_cf_ops = {
191 .init = omap_cf_ss_init,
192 .suspend = omap_cf_ss_suspend,
193 .get_status = omap_cf_get_status,
194 .set_socket = omap_cf_set_socket,
195 .set_io_map = omap_cf_set_io_map,
196 .set_mem_map = omap_cf_set_mem_map,
197};
198
199/*--------------------------------------------------------------------------*/
200
201/*
202 * NOTE: right now the only board-specific platform_data is
203 * "what chipselect is used". Boards could want more.
204 */
205
206static int __init omap_cf_probe(struct platform_device *pdev)
207{
208 unsigned seg;
209 struct omap_cf_socket *cf;
210 int irq;
211 int status;
212
213 seg = (int) pdev->dev.platform_data;
214 if (seg == 0 || seg > 3)
215 return -ENODEV;
216
217 /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
218 irq = platform_get_irq(pdev, 0);
219 if (irq < 0)
220 return -EINVAL;
221
222 cf = kzalloc(sizeof *cf, GFP_KERNEL);
223 if (!cf)
224 return -ENOMEM;
225 timer_setup(&cf->timer, omap_cf_timer, 0);
226
227 cf->pdev = pdev;
228 platform_set_drvdata(pdev, cf);
229
230 /* this primarily just shuts up irq handling noise */
231 status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
232 driver_name, cf);
233 if (status < 0)
234 goto fail0;
235 cf->irq = irq;
236 cf->socket.pci_irq = irq;
237
238 switch (seg) {
239 /* NOTE: CS0 could be configured too ... */
240 case 1:
241 cf->phys_cf = OMAP_CS1_PHYS;
242 break;
243 case 2:
244 cf->phys_cf = OMAP_CS2_PHYS;
245 break;
246 case 3:
247 cf->phys_cf = omap_cs3_phys();
248 break;
249 default:
250 goto fail1;
251 }
252 cf->iomem.start = cf->phys_cf;
253 cf->iomem.end = cf->iomem.end + SZ_8K - 1;
254 cf->iomem.flags = IORESOURCE_MEM;
255
256 /* pcmcia layer only remaps "real" memory */
257 cf->socket.io_offset = (unsigned long)
258 ioremap(cf->phys_cf + SZ_4K, SZ_2K);
259 if (!cf->socket.io_offset)
260 goto fail1;
261
262 if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
263 goto fail1;
264
265 /* NOTE: CF conflicts with MMC1 */
266 omap_cfg_reg(W11_1610_CF_CD1);
267 omap_cfg_reg(P11_1610_CF_CD2);
268 omap_cfg_reg(R11_1610_CF_IOIS16);
269 omap_cfg_reg(V10_1610_CF_IREQ);
270 omap_cfg_reg(W10_1610_CF_RESET);
271
272 omap_writew(~(1 << seg), CF_CFG);
273
274 pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
275
276 /* NOTE: better EMIFS setup might support more cards; but the
277 * TRM only shows how to affect regular flash signals, not their
278 * CF/PCMCIA variants...
279 */
280 pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
281 seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
282 omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
283 omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
284
285 /* CF uses armxor_ck, which is "always" available */
286
287 pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
288 omap_readw(CF_STATUS), omap_readw(CF_CFG),
289 omap_readw(CF_CONTROL),
290 omap_cf_present() ? "present" : "(not present)");
291
292 cf->socket.owner = THIS_MODULE;
293 cf->socket.dev.parent = &pdev->dev;
294 cf->socket.ops = &omap_cf_ops;
295 cf->socket.resource_ops = &pccard_static_ops;
296 cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
297 | SS_CAP_MEM_ALIGN;
298 cf->socket.map_size = SZ_2K;
299 cf->socket.io[0].res = &cf->iomem;
300
301 status = pcmcia_register_socket(&cf->socket);
302 if (status < 0)
303 goto fail2;
304
305 cf->active = 1;
306 mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
307 return 0;
308
309fail2:
310 release_mem_region(cf->phys_cf, SZ_8K);
311fail1:
312 if (cf->socket.io_offset)
313 iounmap((void __iomem *) cf->socket.io_offset);
314 free_irq(irq, cf);
315fail0:
316 kfree(cf);
317 return status;
318}
319
320static int __exit omap_cf_remove(struct platform_device *pdev)
321{
322 struct omap_cf_socket *cf = platform_get_drvdata(pdev);
323
324 cf->active = 0;
325 pcmcia_unregister_socket(&cf->socket);
326 del_timer_sync(&cf->timer);
327 iounmap((void __iomem *) cf->socket.io_offset);
328 release_mem_region(cf->phys_cf, SZ_8K);
329 free_irq(cf->irq, cf);
330 kfree(cf);
331 return 0;
332}
333
334static struct platform_driver omap_cf_driver = {
335 .driver = {
336 .name = (char *) driver_name,
337 },
338 .remove = __exit_p(omap_cf_remove),
339};
340
341static int __init omap_cf_init(void)
342{
343 if (cpu_is_omap16xx())
344 return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
345 return -ENODEV;
346}
347
348static void __exit omap_cf_exit(void)
349{
350 if (cpu_is_omap16xx())
351 platform_driver_unregister(&omap_cf_driver);
352}
353
354module_init(omap_cf_init);
355module_exit(omap_cf_exit);
356
357MODULE_DESCRIPTION("OMAP CF Driver");
358MODULE_LICENSE("GPL");
359MODULE_ALIAS("platform:omap_cf");
360

Warning: That file was not part of the compilation database. It may have many parsing errors.