| 1 | /* |
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| 2 | * vg468.h 1.11 1999/10/25 20:03:34 |
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| 3 | * |
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| 4 | * The contents of this file are subject to the Mozilla Public License |
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| 5 | * Version 1.1 (the "License"); you may not use this file except in |
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| 6 | * compliance with the License. You may obtain a copy of the License |
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| 7 | * at http://www.mozilla.org/MPL/ |
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| 8 | * |
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| 9 | * Software distributed under the License is distributed on an "AS IS" |
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| 10 | * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See |
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| 11 | * the License for the specific language governing rights and |
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| 12 | * limitations under the License. |
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| 13 | * |
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| 14 | * The initial developer of the original code is David A. Hinds |
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| 15 | * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds |
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| 16 | * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. |
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| 17 | * |
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| 18 | * Alternatively, the contents of this file may be used under the |
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| 19 | * terms of the GNU General Public License version 2 (the "GPL"), in which |
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| 20 | * case the provisions of the GPL are applicable instead of the |
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| 21 | * above. If you wish to allow the use of your version of this file |
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| 22 | * only under the terms of the GPL and not to allow others to use |
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| 23 | * your version of this file under the MPL, indicate your decision by |
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| 24 | * deleting the provisions above and replace them with the notice and |
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| 25 | * other provisions required by the GPL. If you do not delete the |
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| 26 | * provisions above, a recipient may use your version of this file |
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| 27 | * under either the MPL or the GPL. |
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| 28 | */ |
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| 29 | |
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| 30 | #ifndef _LINUX_VG468_H |
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| 31 | #define _LINUX_VG468_H |
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| 32 | |
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| 33 | /* Special bit in I365_IDENT used for Vadem chip detection */ |
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| 34 | #define I365_IDENT_VADEM 0x08 |
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| 35 | |
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| 36 | /* Special definitions in I365_POWER */ |
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| 37 | #define VG468_VPP2_MASK 0x0c |
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| 38 | #define VG468_VPP2_5V 0x04 |
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| 39 | #define VG468_VPP2_12V 0x08 |
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| 40 | |
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| 41 | /* Unique Vadem registers */ |
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| 42 | #define VG469_VSENSE 0x1f /* Card voltage sense */ |
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| 43 | #define VG469_VSELECT 0x2f /* Card voltage select */ |
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| 44 | #define VG468_CTL 0x38 /* Control register */ |
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| 45 | #define VG468_TIMER 0x39 /* Timer control */ |
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| 46 | #define VG468_MISC 0x3a /* Miscellaneous */ |
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| 47 | #define VG468_GPIO_CFG 0x3b /* GPIO configuration */ |
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| 48 | #define VG469_EXT_MODE 0x3c /* Extended mode register */ |
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| 49 | #define VG468_SELECT 0x3d /* Programmable chip select */ |
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| 50 | #define VG468_SELECT_CFG 0x3e /* Chip select configuration */ |
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| 51 | #define VG468_ATA 0x3f /* ATA control */ |
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| 52 | |
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| 53 | /* Flags for VG469_VSENSE */ |
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| 54 | #define VG469_VSENSE_A_VS1 0x01 |
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| 55 | #define VG469_VSENSE_A_VS2 0x02 |
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| 56 | #define VG469_VSENSE_B_VS1 0x04 |
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| 57 | #define VG469_VSENSE_B_VS2 0x08 |
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| 58 | |
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| 59 | /* Flags for VG469_VSELECT */ |
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| 60 | #define VG469_VSEL_VCC 0x03 |
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| 61 | #define VG469_VSEL_5V 0x00 |
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| 62 | #define VG469_VSEL_3V 0x03 |
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| 63 | #define VG469_VSEL_MAX 0x0c |
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| 64 | #define VG469_VSEL_EXT_STAT 0x10 |
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| 65 | #define VG469_VSEL_EXT_BUS 0x20 |
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| 66 | #define VG469_VSEL_MIXED 0x40 |
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| 67 | #define VG469_VSEL_ISA 0x80 |
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| 68 | |
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| 69 | /* Flags for VG468_CTL */ |
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| 70 | #define VG468_CTL_SLOW 0x01 /* 600ns memory timing */ |
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| 71 | #define VG468_CTL_ASYNC 0x02 /* Asynchronous bus clocking */ |
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| 72 | #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */ |
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| 73 | #define VG468_CTL_DELAY 0x10 /* Card detect debounce */ |
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| 74 | #define VG468_CTL_INPACK 0x20 /* Obey INPACK signal? */ |
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| 75 | #define VG468_CTL_POLARITY 0x40 /* VCCEN polarity */ |
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| 76 | #define VG468_CTL_COMPAT 0x80 /* Compatibility stuff */ |
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| 77 | |
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| 78 | #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */ |
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| 79 | #define VG469_CTL_STRETCH 0x10 /* LED stretch */ |
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| 80 | |
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| 81 | /* Flags for VG468_TIMER */ |
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| 82 | #define VG468_TIMER_ZEROPWR 0x10 /* Zero power control */ |
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| 83 | #define VG468_TIMER_SIGEN 0x20 /* Power up */ |
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| 84 | #define VG468_TIMER_STATUS 0x40 /* Activity timer status */ |
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| 85 | #define VG468_TIMER_RES 0x80 /* Timer resolution */ |
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| 86 | #define VG468_TIMER_MASK 0x0f /* Activity timer timeout */ |
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| 87 | |
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| 88 | /* Flags for VG468_MISC */ |
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| 89 | #define VG468_MISC_GPIO 0x04 /* General-purpose IO */ |
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| 90 | #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */ |
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| 91 | #define VG469_MISC_LEDENA 0x10 /* LED enable */ |
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| 92 | #define VG468_MISC_VADEMREV 0x40 /* Vadem revision control */ |
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| 93 | #define VG468_MISC_UNLOCK 0x80 /* Unique register lock */ |
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| 94 | |
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| 95 | /* Flags for VG469_EXT_MODE_A */ |
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| 96 | #define VG469_MODE_VPPST 0x03 /* Vpp steering control */ |
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| 97 | #define VG469_MODE_INT_SENSE 0x04 /* Internal voltage sense */ |
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| 98 | #define VG469_MODE_CABLE 0x08 |
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| 99 | #define VG469_MODE_COMPAT 0x10 /* i82365sl B or DF step */ |
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| 100 | #define VG469_MODE_TEST 0x20 |
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| 101 | #define VG469_MODE_RIO 0x40 /* Steer RIO to INTR? */ |
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| 102 | |
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| 103 | /* Flags for VG469_EXT_MODE_B */ |
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| 104 | #define VG469_MODE_B_3V 0x01 /* 3.3v for socket B */ |
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| 105 | |
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| 106 | #endif /* _LINUX_VG468_H */ |
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| 107 | |
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