1/*
2 * Linear Technology LTC3589,LTC3589-1 regulator support
3 *
4 * Copyright (c) 2014 Philipp Zabel <p.zabel@pengutronix.de>, Pengutronix
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2
11 * as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19#include <linux/i2c.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/regmap.h>
27#include <linux/regulator/driver.h>
28#include <linux/regulator/of_regulator.h>
29
30#define DRIVER_NAME "ltc3589"
31
32#define LTC3589_IRQSTAT 0x02
33#define LTC3589_SCR1 0x07
34#define LTC3589_OVEN 0x10
35#define LTC3589_SCR2 0x12
36#define LTC3589_PGSTAT 0x13
37#define LTC3589_VCCR 0x20
38#define LTC3589_CLIRQ 0x21
39#define LTC3589_B1DTV1 0x23
40#define LTC3589_B1DTV2 0x24
41#define LTC3589_VRRCR 0x25
42#define LTC3589_B2DTV1 0x26
43#define LTC3589_B2DTV2 0x27
44#define LTC3589_B3DTV1 0x29
45#define LTC3589_B3DTV2 0x2a
46#define LTC3589_L2DTV1 0x32
47#define LTC3589_L2DTV2 0x33
48
49#define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3)
50#define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4)
51#define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5)
52#define LTC3589_IRQSTAT_THERMAL_WARN BIT(6)
53#define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7)
54
55#define LTC3589_OVEN_SW1 BIT(0)
56#define LTC3589_OVEN_SW2 BIT(1)
57#define LTC3589_OVEN_SW3 BIT(2)
58#define LTC3589_OVEN_BB_OUT BIT(3)
59#define LTC3589_OVEN_LDO2 BIT(4)
60#define LTC3589_OVEN_LDO3 BIT(5)
61#define LTC3589_OVEN_LDO4 BIT(6)
62#define LTC3589_OVEN_SW_CTRL BIT(7)
63
64#define LTC3589_VCCR_SW1_GO BIT(0)
65#define LTC3589_VCCR_SW2_GO BIT(2)
66#define LTC3589_VCCR_SW3_GO BIT(4)
67#define LTC3589_VCCR_LDO2_GO BIT(6)
68
69enum ltc3589_variant {
70 LTC3589,
71 LTC3589_1,
72 LTC3589_2,
73};
74
75enum ltc3589_reg {
76 LTC3589_SW1,
77 LTC3589_SW2,
78 LTC3589_SW3,
79 LTC3589_BB_OUT,
80 LTC3589_LDO1,
81 LTC3589_LDO2,
82 LTC3589_LDO3,
83 LTC3589_LDO4,
84 LTC3589_NUM_REGULATORS,
85};
86
87struct ltc3589_regulator {
88 struct regulator_desc desc;
89
90 /* External feedback voltage divider */
91 unsigned int r1;
92 unsigned int r2;
93};
94
95struct ltc3589 {
96 struct regmap *regmap;
97 struct device *dev;
98 enum ltc3589_variant variant;
99 struct ltc3589_regulator regulator_descs[LTC3589_NUM_REGULATORS];
100 struct regulator_dev *regulators[LTC3589_NUM_REGULATORS];
101};
102
103static const int ltc3589_ldo4[] = {
104 2800000, 2500000, 1800000, 3300000,
105};
106
107static const int ltc3589_12_ldo4[] = {
108 1200000, 1800000, 2500000, 3200000,
109};
110
111static int ltc3589_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
112{
113 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
114 int sel, shift;
115
116 if (unlikely(ramp_delay <= 0))
117 return -EINVAL;
118
119 /* VRRCR slew rate offsets are the same as VCCR go bit offsets */
120 shift = ffs(rdev->desc->apply_bit) - 1;
121
122 /* The slew rate can be set to 0.88, 1.75, 3.5, or 7 mV/uS */
123 for (sel = 0; sel < 4; sel++) {
124 if ((880 << sel) >= ramp_delay) {
125 return regmap_update_bits(ltc3589->regmap,
126 LTC3589_VRRCR,
127 0x3 << shift, sel << shift);
128 }
129 }
130 return -EINVAL;
131}
132
133static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV)
134{
135 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
136 int sel;
137
138 sel = regulator_map_voltage_linear(rdev, uV, uV);
139 if (sel < 0)
140 return sel;
141
142 /* DTV2 register follows right after the corresponding DTV1 register */
143 return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1,
144 rdev->desc->vsel_mask, sel);
145}
146
147static int ltc3589_set_suspend_mode(struct regulator_dev *rdev,
148 unsigned int mode)
149{
150 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev);
151 int mask, bit = 0;
152
153 /* VCCR reference selects are right next to the VCCR go bits */
154 mask = rdev->desc->apply_bit << 1;
155
156 if (mode == REGULATOR_MODE_STANDBY)
157 bit = mask; /* Select DTV2 */
158
159 mask |= rdev->desc->apply_bit;
160 bit |= rdev->desc->apply_bit;
161 return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit);
162}
163
164/* SW1, SW2, SW3, LDO2 */
165static const struct regulator_ops ltc3589_linear_regulator_ops = {
166 .enable = regulator_enable_regmap,
167 .disable = regulator_disable_regmap,
168 .is_enabled = regulator_is_enabled_regmap,
169 .list_voltage = regulator_list_voltage_linear,
170 .set_voltage_sel = regulator_set_voltage_sel_regmap,
171 .get_voltage_sel = regulator_get_voltage_sel_regmap,
172 .set_ramp_delay = ltc3589_set_ramp_delay,
173 .set_voltage_time_sel = regulator_set_voltage_time_sel,
174 .set_suspend_voltage = ltc3589_set_suspend_voltage,
175 .set_suspend_mode = ltc3589_set_suspend_mode,
176};
177
178/* BB_OUT, LDO3 */
179static const struct regulator_ops ltc3589_fixed_regulator_ops = {
180 .enable = regulator_enable_regmap,
181 .disable = regulator_disable_regmap,
182 .is_enabled = regulator_is_enabled_regmap,
183};
184
185/* LDO1 */
186static const struct regulator_ops ltc3589_fixed_standby_regulator_ops = {
187};
188
189/* LDO4 */
190static const struct regulator_ops ltc3589_table_regulator_ops = {
191 .enable = regulator_enable_regmap,
192 .disable = regulator_disable_regmap,
193 .is_enabled = regulator_is_enabled_regmap,
194 .list_voltage = regulator_list_voltage_table,
195 .set_voltage_sel = regulator_set_voltage_sel_regmap,
196 .get_voltage_sel = regulator_get_voltage_sel_regmap,
197};
198
199
200#define LTC3589_REG(_name, _ops, en_bit, dtv1_reg, dtv_mask, go_bit) \
201 [LTC3589_ ## _name] = { \
202 .desc = { \
203 .name = #_name, \
204 .n_voltages = (dtv_mask) + 1, \
205 .min_uV = (go_bit) ? 362500 : 0, \
206 .uV_step = (go_bit) ? 12500 : 0, \
207 .ramp_delay = (go_bit) ? 1750 : 0, \
208 .fixed_uV = (dtv_mask) ? 0 : 800000, \
209 .ops = &ltc3589_ ## _ops ## _regulator_ops, \
210 .type = REGULATOR_VOLTAGE, \
211 .id = LTC3589_ ## _name, \
212 .owner = THIS_MODULE, \
213 .vsel_reg = (dtv1_reg), \
214 .vsel_mask = (dtv_mask), \
215 .apply_reg = (go_bit) ? LTC3589_VCCR : 0, \
216 .apply_bit = (go_bit), \
217 .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \
218 .enable_mask = (en_bit), \
219 }, \
220 }
221
222#define LTC3589_LINEAR_REG(_name, _dtv1) \
223 LTC3589_REG(_name, linear, LTC3589_OVEN_ ## _name, \
224 LTC3589_ ## _dtv1, 0x1f, \
225 LTC3589_VCCR_ ## _name ## _GO)
226
227#define LTC3589_FIXED_REG(_name) \
228 LTC3589_REG(_name, fixed, LTC3589_OVEN_ ## _name, 0, 0, 0)
229
230static struct ltc3589_regulator ltc3589_regulators[LTC3589_NUM_REGULATORS] = {
231 LTC3589_LINEAR_REG(SW1, B1DTV1),
232 LTC3589_LINEAR_REG(SW2, B2DTV1),
233 LTC3589_LINEAR_REG(SW3, B3DTV1),
234 LTC3589_FIXED_REG(BB_OUT),
235 LTC3589_REG(LDO1, fixed_standby, 0, 0, 0, 0),
236 LTC3589_LINEAR_REG(LDO2, L2DTV1),
237 LTC3589_FIXED_REG(LDO3),
238 LTC3589_REG(LDO4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60, 0),
239};
240
241#ifdef CONFIG_OF
242static struct of_regulator_match ltc3589_matches[LTC3589_NUM_REGULATORS] = {
243 { .name = "sw1", },
244 { .name = "sw2", },
245 { .name = "sw3", },
246 { .name = "bb-out", },
247 { .name = "ldo1", }, /* standby */
248 { .name = "ldo2", },
249 { .name = "ldo3", },
250 { .name = "ldo4", },
251};
252
253static int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589)
254{
255 struct device *dev = ltc3589->dev;
256 struct device_node *node;
257 int i, ret;
258
259 node = of_get_child_by_name(dev->of_node, "regulators");
260 if (!node) {
261 dev_err(dev, "regulators node not found\n");
262 return -EINVAL;
263 }
264
265 ret = of_regulator_match(dev, node, ltc3589_matches,
266 ARRAY_SIZE(ltc3589_matches));
267 of_node_put(node);
268 if (ret < 0) {
269 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
270 return ret;
271 }
272 if (ret != LTC3589_NUM_REGULATORS) {
273 dev_err(dev, "Only %d regulators described in device tree\n",
274 ret);
275 return -EINVAL;
276 }
277
278 /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */
279 for (i = 0; i < LTC3589_LDO3; i++) {
280 struct ltc3589_regulator *desc = &ltc3589->regulator_descs[i];
281 struct device_node *np = ltc3589_matches[i].of_node;
282 u32 vdiv[2];
283
284 ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider",
285 vdiv, 2);
286 if (ret) {
287 dev_err(dev, "Failed to parse voltage divider: %d\n",
288 ret);
289 return ret;
290 }
291
292 desc->r1 = vdiv[0];
293 desc->r2 = vdiv[1];
294 }
295
296 return 0;
297}
298
299static inline struct regulator_init_data *match_init_data(int index)
300{
301 return ltc3589_matches[index].init_data;
302}
303
304static inline struct device_node *match_of_node(int index)
305{
306 return ltc3589_matches[index].of_node;
307}
308#else
309static inline int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589)
310{
311 return 0;
312}
313
314static inline struct regulator_init_data *match_init_data(int index)
315{
316 return NULL;
317}
318
319static inline struct device_node *match_of_node(int index)
320{
321 return NULL;
322}
323#endif
324
325static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg)
326{
327 switch (reg) {
328 case LTC3589_IRQSTAT:
329 case LTC3589_SCR1:
330 case LTC3589_OVEN:
331 case LTC3589_SCR2:
332 case LTC3589_VCCR:
333 case LTC3589_CLIRQ:
334 case LTC3589_B1DTV1:
335 case LTC3589_B1DTV2:
336 case LTC3589_VRRCR:
337 case LTC3589_B2DTV1:
338 case LTC3589_B2DTV2:
339 case LTC3589_B3DTV1:
340 case LTC3589_B3DTV2:
341 case LTC3589_L2DTV1:
342 case LTC3589_L2DTV2:
343 return true;
344 }
345 return false;
346}
347
348static bool ltc3589_readable_reg(struct device *dev, unsigned int reg)
349{
350 switch (reg) {
351 case LTC3589_IRQSTAT:
352 case LTC3589_SCR1:
353 case LTC3589_OVEN:
354 case LTC3589_SCR2:
355 case LTC3589_PGSTAT:
356 case LTC3589_VCCR:
357 case LTC3589_B1DTV1:
358 case LTC3589_B1DTV2:
359 case LTC3589_VRRCR:
360 case LTC3589_B2DTV1:
361 case LTC3589_B2DTV2:
362 case LTC3589_B3DTV1:
363 case LTC3589_B3DTV2:
364 case LTC3589_L2DTV1:
365 case LTC3589_L2DTV2:
366 return true;
367 }
368 return false;
369}
370
371static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg)
372{
373 switch (reg) {
374 case LTC3589_IRQSTAT:
375 case LTC3589_PGSTAT:
376 case LTC3589_VCCR:
377 return true;
378 }
379 return false;
380}
381
382static const struct reg_default ltc3589_reg_defaults[] = {
383 { LTC3589_SCR1, 0x00 },
384 { LTC3589_OVEN, 0x00 },
385 { LTC3589_SCR2, 0x00 },
386 { LTC3589_VCCR, 0x00 },
387 { LTC3589_B1DTV1, 0x19 },
388 { LTC3589_B1DTV2, 0x19 },
389 { LTC3589_VRRCR, 0xff },
390 { LTC3589_B2DTV1, 0x19 },
391 { LTC3589_B2DTV2, 0x19 },
392 { LTC3589_B3DTV1, 0x19 },
393 { LTC3589_B3DTV2, 0x19 },
394 { LTC3589_L2DTV1, 0x19 },
395 { LTC3589_L2DTV2, 0x19 },
396};
397
398static const struct regmap_config ltc3589_regmap_config = {
399 .reg_bits = 8,
400 .val_bits = 8,
401 .writeable_reg = ltc3589_writeable_reg,
402 .readable_reg = ltc3589_readable_reg,
403 .volatile_reg = ltc3589_volatile_reg,
404 .max_register = LTC3589_L2DTV2,
405 .reg_defaults = ltc3589_reg_defaults,
406 .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults),
407 .use_single_read = true,
408 .use_single_write = true,
409 .cache_type = REGCACHE_RBTREE,
410};
411
412
413static irqreturn_t ltc3589_isr(int irq, void *dev_id)
414{
415 struct ltc3589 *ltc3589 = dev_id;
416 unsigned int i, irqstat, event;
417
418 regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat);
419
420 if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) {
421 event = REGULATOR_EVENT_OVER_TEMP;
422 for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
423 regulator_notifier_call_chain(ltc3589->regulators[i],
424 event, NULL);
425 }
426
427 if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) {
428 event = REGULATOR_EVENT_UNDER_VOLTAGE;
429 for (i = 0; i < LTC3589_NUM_REGULATORS; i++)
430 regulator_notifier_call_chain(ltc3589->regulators[i],
431 event, NULL);
432 }
433
434 /* Clear warning condition */
435 regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0);
436
437 return IRQ_HANDLED;
438}
439
440static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2)
441{
442 uint64_t tmp;
443 if (uV == 0)
444 return 0;
445 tmp = (uint64_t)uV * r1;
446 do_div(tmp, r2);
447 return uV + (unsigned int)tmp;
448}
449
450static void ltc3589_apply_fb_voltage_divider(struct ltc3589_regulator *rdesc)
451{
452 struct regulator_desc *desc = &rdesc->desc;
453
454 if (!rdesc->r1 || !rdesc->r2)
455 return;
456
457 desc->min_uV = ltc3589_scale(desc->min_uV, rdesc->r1, rdesc->r2);
458 desc->uV_step = ltc3589_scale(desc->uV_step, rdesc->r1, rdesc->r2);
459 desc->fixed_uV = ltc3589_scale(desc->fixed_uV, rdesc->r1, rdesc->r2);
460}
461
462static int ltc3589_probe(struct i2c_client *client,
463 const struct i2c_device_id *id)
464{
465 struct device *dev = &client->dev;
466 struct ltc3589_regulator *descs;
467 struct ltc3589 *ltc3589;
468 int i, ret;
469
470 ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL);
471 if (!ltc3589)
472 return -ENOMEM;
473
474 i2c_set_clientdata(client, ltc3589);
475 if (client->dev.of_node)
476 ltc3589->variant = (enum ltc3589_variant)
477 of_device_get_match_data(&client->dev);
478 else
479 ltc3589->variant = id->driver_data;
480 ltc3589->dev = dev;
481
482 descs = ltc3589->regulator_descs;
483 memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators));
484 if (ltc3589->variant == LTC3589) {
485 descs[LTC3589_LDO3].desc.fixed_uV = 1800000;
486 descs[LTC3589_LDO4].desc.volt_table = ltc3589_ldo4;
487 } else {
488 descs[LTC3589_LDO3].desc.fixed_uV = 2800000;
489 descs[LTC3589_LDO4].desc.volt_table = ltc3589_12_ldo4;
490 }
491
492 ltc3589->regmap = devm_regmap_init_i2c(client, &ltc3589_regmap_config);
493 if (IS_ERR(ltc3589->regmap)) {
494 ret = PTR_ERR(ltc3589->regmap);
495 dev_err(dev, "failed to initialize regmap: %d\n", ret);
496 return ret;
497 }
498
499 ret = ltc3589_parse_regulators_dt(ltc3589);
500 if (ret)
501 return ret;
502
503 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) {
504 struct ltc3589_regulator *rdesc = &ltc3589->regulator_descs[i];
505 struct regulator_desc *desc = &rdesc->desc;
506 struct regulator_init_data *init_data;
507 struct regulator_config config = { };
508
509 init_data = match_init_data(i);
510
511 if (i < LTC3589_LDO3)
512 ltc3589_apply_fb_voltage_divider(rdesc);
513
514 config.dev = dev;
515 config.init_data = init_data;
516 config.driver_data = ltc3589;
517 config.of_node = match_of_node(i);
518
519 ltc3589->regulators[i] = devm_regulator_register(dev, desc,
520 &config);
521 if (IS_ERR(ltc3589->regulators[i])) {
522 ret = PTR_ERR(ltc3589->regulators[i]);
523 dev_err(dev, "failed to register regulator %s: %d\n",
524 desc->name, ret);
525 return ret;
526 }
527 }
528
529 if (client->irq) {
530 ret = devm_request_threaded_irq(dev, client->irq, NULL,
531 ltc3589_isr,
532 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
533 client->name, ltc3589);
534 if (ret) {
535 dev_err(dev, "Failed to request IRQ: %d\n", ret);
536 return ret;
537 }
538 }
539
540 return 0;
541}
542
543static const struct i2c_device_id ltc3589_i2c_id[] = {
544 { "ltc3589", LTC3589 },
545 { "ltc3589-1", LTC3589_1 },
546 { "ltc3589-2", LTC3589_2 },
547 { }
548};
549MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id);
550
551static const struct of_device_id ltc3589_of_match[] = {
552 {
553 .compatible = "lltc,ltc3589",
554 .data = (void *)LTC3589,
555 },
556 {
557 .compatible = "lltc,ltc3589-1",
558 .data = (void *)LTC3589_1,
559 },
560 {
561 .compatible = "lltc,ltc3589-2",
562 .data = (void *)LTC3589_2,
563 },
564 { },
565};
566MODULE_DEVICE_TABLE(of, ltc3589_of_match);
567
568static struct i2c_driver ltc3589_driver = {
569 .driver = {
570 .name = DRIVER_NAME,
571 .of_match_table = of_match_ptr(ltc3589_of_match),
572 },
573 .probe = ltc3589_probe,
574 .id_table = ltc3589_i2c_id,
575};
576module_i2c_driver(ltc3589_driver);
577
578MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
579MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)");
580MODULE_LICENSE("GPL v2");
581