1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 *
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
7 */
8
9/*
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
16 *
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
22 *
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/spinlock.h>
35#include <linux/platform_device.h>
36#include <linux/log2.h>
37#include <linux/pm.h>
38#include <linux/of.h>
39#include <linux/of_platform.h>
40#ifdef CONFIG_X86
41#include <asm/i8259.h>
42#include <asm/processor.h>
43#include <linux/dmi.h>
44#endif
45
46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47#include <linux/mc146818rtc.h>
48
49#ifdef CONFIG_ACPI
50/*
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 *
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
54 *
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 */
57
58static bool use_acpi_alarm;
59module_param(use_acpi_alarm, bool, 0444);
60
61static inline int cmos_use_acpi_alarm(void)
62{
63 return use_acpi_alarm;
64}
65#else /* !CONFIG_ACPI */
66
67static inline int cmos_use_acpi_alarm(void)
68{
69 return 0;
70}
71#endif
72
73struct cmos_rtc {
74 struct rtc_device *rtc;
75 struct device *dev;
76 int irq;
77 struct resource *iomem;
78 time64_t alarm_expires;
79
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
82
83 u8 enabled_wake;
84 u8 suspend_ctrl;
85
86 /* newer hardware extends the original register set */
87 u8 day_alrm;
88 u8 mon_alrm;
89 u8 century;
90
91 struct rtc_wkalrm saved_wkalrm;
92};
93
94/* both platform and pnp busses use negative numbers for invalid irqs */
95#define is_valid_irq(n) ((n) > 0)
96
97static const char driver_name[] = "rtc_cmos";
98
99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 */
103#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104
105static inline int is_intr(u8 rtc_intr)
106{
107 if (!(rtc_intr & RTC_IRQF))
108 return 0;
109 return rtc_intr & RTC_IRQMASK;
110}
111
112/*----------------------------------------------------------------*/
113
114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
119 *
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
123 */
124#ifdef CONFIG_HPET_EMULATE_RTC
125#include <asm/hpet.h>
126#else
127
128static inline int is_hpet_enabled(void)
129{
130 return 0;
131}
132
133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134{
135 return 0;
136}
137
138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139{
140 return 0;
141}
142
143static inline int
144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145{
146 return 0;
147}
148
149static inline int hpet_set_periodic_freq(unsigned long freq)
150{
151 return 0;
152}
153
154static inline int hpet_rtc_dropped_irq(void)
155{
156 return 0;
157}
158
159static inline int hpet_rtc_timer_init(void)
160{
161 return 0;
162}
163
164extern irq_handler_t hpet_rtc_interrupt;
165
166static inline int hpet_register_irq_handler(irq_handler_t handler)
167{
168 return 0;
169}
170
171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172{
173 return 0;
174}
175
176#endif
177
178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179static inline int use_hpet_alarm(void)
180{
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
182}
183
184/*----------------------------------------------------------------*/
185
186#ifdef RTC_PORT
187
188/* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
191 */
192#define can_bank2 true
193
194static inline unsigned char cmos_read_bank2(unsigned char addr)
195{
196 outb(value: addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
198}
199
200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201{
202 outb(value: addr, RTC_PORT(2));
203 outb(value: val, RTC_PORT(3));
204}
205
206#else
207
208#define can_bank2 false
209
210static inline unsigned char cmos_read_bank2(unsigned char addr)
211{
212 return 0;
213}
214
215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216{
217}
218
219#endif
220
221/*----------------------------------------------------------------*/
222
223static int cmos_read_time(struct device *dev, struct rtc_time *t)
224{
225 int ret;
226
227 /*
228 * If pm_trace abused the RTC for storage, set the timespec to 0,
229 * which tells the caller that this RTC value is unusable.
230 */
231 if (!pm_trace_rtc_valid())
232 return -EIO;
233
234 ret = mc146818_get_time(time: t);
235 if (ret < 0) {
236 dev_err_ratelimited(dev, "unable to read current time\n");
237 return ret;
238 }
239
240 return 0;
241}
242
243static int cmos_set_time(struct device *dev, struct rtc_time *t)
244{
245 /* NOTE: this ignores the issue whereby updating the seconds
246 * takes effect exactly 500ms after we write the register.
247 * (Also queueing and other delays before we get this far.)
248 */
249 return mc146818_set_time(time: t);
250}
251
252struct cmos_read_alarm_callback_param {
253 struct cmos_rtc *cmos;
254 struct rtc_time *time;
255 unsigned char rtc_control;
256};
257
258static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
259 void *param_in)
260{
261 struct cmos_read_alarm_callback_param *p =
262 (struct cmos_read_alarm_callback_param *)param_in;
263 struct rtc_time *time = p->time;
264
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
268
269 if (p->cmos->day_alrm) {
270 /* ignore upper bits on readback per ACPI spec */
271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
272 if (!time->tm_mday)
273 time->tm_mday = -1;
274
275 if (p->cmos->mon_alrm) {
276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
277 if (!time->tm_mon)
278 time->tm_mon = -1;
279 }
280 }
281
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
283}
284
285static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286{
287 struct cmos_rtc *cmos = dev_get_drvdata(dev);
288 struct cmos_read_alarm_callback_param p = {
289 .cmos = cmos,
290 .time = &t->time,
291 };
292
293 /* This not only a rtc_op, but also called directly */
294 if (!is_valid_irq(cmos->irq))
295 return -EIO;
296
297 /* Basic alarms only support hour, minute, and seconds fields.
298 * Some also support day and month, for alarms up to a year in
299 * the future.
300 */
301
302 /* Some Intel chipsets disconnect the alarm registers when the clock
303 * update is in progress - during this time reads return bogus values
304 * and writes may fail silently. See for example "7th Generation Intel®
305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
306 * 27.7.1
307 *
308 * Use the mc146818_avoid_UIP() function to avoid this.
309 */
310 if (!mc146818_avoid_UIP(callback: cmos_read_alarm_callback, param: &p))
311 return -EIO;
312
313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314 if (((unsigned)t->time.tm_sec) < 0x60)
315 t->time.tm_sec = bcd2bin(t->time.tm_sec);
316 else
317 t->time.tm_sec = -1;
318 if (((unsigned)t->time.tm_min) < 0x60)
319 t->time.tm_min = bcd2bin(t->time.tm_min);
320 else
321 t->time.tm_min = -1;
322 if (((unsigned)t->time.tm_hour) < 0x24)
323 t->time.tm_hour = bcd2bin(t->time.tm_hour);
324 else
325 t->time.tm_hour = -1;
326
327 if (cmos->day_alrm) {
328 if (((unsigned)t->time.tm_mday) <= 0x31)
329 t->time.tm_mday = bcd2bin(t->time.tm_mday);
330 else
331 t->time.tm_mday = -1;
332
333 if (cmos->mon_alrm) {
334 if (((unsigned)t->time.tm_mon) <= 0x12)
335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
336 else
337 t->time.tm_mon = -1;
338 }
339 }
340 }
341
342 t->enabled = !!(p.rtc_control & RTC_AIE);
343 t->pending = 0;
344
345 return 0;
346}
347
348static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
349{
350 unsigned char rtc_intr;
351
352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353 * allegedly some older rtcs need that to handle irqs properly
354 */
355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
356
357 if (use_hpet_alarm())
358 return;
359
360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361 if (is_intr(rtc_intr))
362 rtc_update_irq(rtc: cmos->rtc, num: 1, events: rtc_intr);
363}
364
365static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
366{
367 unsigned char rtc_control;
368
369 /* flush any pending IRQ status, notably for update irqs,
370 * before we enable new IRQs
371 */
372 rtc_control = CMOS_READ(RTC_CONTROL);
373 cmos_checkintr(cmos, rtc_control);
374
375 rtc_control |= mask;
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
377 if (use_hpet_alarm())
378 hpet_set_rtc_irq_bit(bit_mask: mask);
379
380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
381 if (cmos->wake_on)
382 cmos->wake_on(cmos->dev);
383 }
384
385 cmos_checkintr(cmos, rtc_control);
386}
387
388static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
389{
390 unsigned char rtc_control;
391
392 rtc_control = CMOS_READ(RTC_CONTROL);
393 rtc_control &= ~mask;
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
395 if (use_hpet_alarm())
396 hpet_mask_rtc_irq_bit(bit_mask: mask);
397
398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
399 if (cmos->wake_off)
400 cmos->wake_off(cmos->dev);
401 }
402
403 cmos_checkintr(cmos, rtc_control);
404}
405
406static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
407{
408 struct cmos_rtc *cmos = dev_get_drvdata(dev);
409 struct rtc_time now;
410
411 cmos_read_time(dev, t: &now);
412
413 if (!cmos->day_alrm) {
414 time64_t t_max_date;
415 time64_t t_alrm;
416
417 t_max_date = rtc_tm_to_time64(tm: &now);
418 t_max_date += 24 * 60 * 60 - 1;
419 t_alrm = rtc_tm_to_time64(tm: &t->time);
420 if (t_alrm > t_max_date) {
421 dev_err(dev,
422 "Alarms can be up to one day in the future\n");
423 return -EINVAL;
424 }
425 } else if (!cmos->mon_alrm) {
426 struct rtc_time max_date = now;
427 time64_t t_max_date;
428 time64_t t_alrm;
429 int max_mday;
430
431 if (max_date.tm_mon == 11) {
432 max_date.tm_mon = 0;
433 max_date.tm_year += 1;
434 } else {
435 max_date.tm_mon += 1;
436 }
437 max_mday = rtc_month_days(month: max_date.tm_mon, year: max_date.tm_year);
438 if (max_date.tm_mday > max_mday)
439 max_date.tm_mday = max_mday;
440
441 t_max_date = rtc_tm_to_time64(tm: &max_date);
442 t_max_date -= 1;
443 t_alrm = rtc_tm_to_time64(tm: &t->time);
444 if (t_alrm > t_max_date) {
445 dev_err(dev,
446 "Alarms can be up to one month in the future\n");
447 return -EINVAL;
448 }
449 } else {
450 struct rtc_time max_date = now;
451 time64_t t_max_date;
452 time64_t t_alrm;
453 int max_mday;
454
455 max_date.tm_year += 1;
456 max_mday = rtc_month_days(month: max_date.tm_mon, year: max_date.tm_year);
457 if (max_date.tm_mday > max_mday)
458 max_date.tm_mday = max_mday;
459
460 t_max_date = rtc_tm_to_time64(tm: &max_date);
461 t_max_date -= 1;
462 t_alrm = rtc_tm_to_time64(tm: &t->time);
463 if (t_alrm > t_max_date) {
464 dev_err(dev,
465 "Alarms can be up to one year in the future\n");
466 return -EINVAL;
467 }
468 }
469
470 return 0;
471}
472
473struct cmos_set_alarm_callback_param {
474 struct cmos_rtc *cmos;
475 unsigned char mon, mday, hrs, min, sec;
476 struct rtc_wkalrm *t;
477};
478
479/* Note: this function may be executed by mc146818_avoid_UIP() more then
480 * once
481 */
482static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
483 void *param_in)
484{
485 struct cmos_set_alarm_callback_param *p =
486 (struct cmos_set_alarm_callback_param *)param_in;
487
488 /* next rtc irq must not be from previous alarm setting */
489 cmos_irq_disable(cmos: p->cmos, RTC_AIE);
490
491 /* update alarm */
492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
495
496 /* the system may support an "enhanced" alarm */
497 if (p->cmos->day_alrm) {
498 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499 if (p->cmos->mon_alrm)
500 CMOS_WRITE(p->mon, p->cmos->mon_alrm);
501 }
502
503 if (use_hpet_alarm()) {
504 /*
505 * FIXME the HPET alarm glue currently ignores day_alrm
506 * and mon_alrm ...
507 */
508 hpet_set_alarm_time(hrs: p->t->time.tm_hour, min: p->t->time.tm_min,
509 sec: p->t->time.tm_sec);
510 }
511
512 if (p->t->enabled)
513 cmos_irq_enable(cmos: p->cmos, RTC_AIE);
514}
515
516static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
517{
518 struct cmos_rtc *cmos = dev_get_drvdata(dev);
519 struct cmos_set_alarm_callback_param p = {
520 .cmos = cmos,
521 .t = t
522 };
523 unsigned char rtc_control;
524 int ret;
525
526 /* This not only a rtc_op, but also called directly */
527 if (!is_valid_irq(cmos->irq))
528 return -EIO;
529
530 ret = cmos_validate_alarm(dev, t);
531 if (ret < 0)
532 return ret;
533
534 p.mon = t->time.tm_mon + 1;
535 p.mday = t->time.tm_mday;
536 p.hrs = t->time.tm_hour;
537 p.min = t->time.tm_min;
538 p.sec = t->time.tm_sec;
539
540 spin_lock_irq(lock: &rtc_lock);
541 rtc_control = CMOS_READ(RTC_CONTROL);
542 spin_unlock_irq(lock: &rtc_lock);
543
544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545 /* Writing 0xff means "don't care" or "match all". */
546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
551 }
552
553 /*
554 * Some Intel chipsets disconnect the alarm registers when the clock
555 * update is in progress - during this time writes fail silently.
556 *
557 * Use mc146818_avoid_UIP() to avoid this.
558 */
559 if (!mc146818_avoid_UIP(callback: cmos_set_alarm_callback, param: &p))
560 return -EIO;
561
562 cmos->alarm_expires = rtc_tm_to_time64(tm: &t->time);
563
564 return 0;
565}
566
567static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
568{
569 struct cmos_rtc *cmos = dev_get_drvdata(dev);
570 unsigned long flags;
571
572 spin_lock_irqsave(&rtc_lock, flags);
573
574 if (enabled)
575 cmos_irq_enable(cmos, RTC_AIE);
576 else
577 cmos_irq_disable(cmos, RTC_AIE);
578
579 spin_unlock_irqrestore(lock: &rtc_lock, flags);
580 return 0;
581}
582
583#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
584
585static int cmos_procfs(struct device *dev, struct seq_file *seq)
586{
587 struct cmos_rtc *cmos = dev_get_drvdata(dev);
588 unsigned char rtc_control, valid;
589
590 spin_lock_irq(lock: &rtc_lock);
591 rtc_control = CMOS_READ(RTC_CONTROL);
592 valid = CMOS_READ(RTC_VALID);
593 spin_unlock_irq(lock: &rtc_lock);
594
595 /* NOTE: at least ICH6 reports battery status using a different
596 * (non-RTC) bit; and SQWE is ignored on many current systems.
597 */
598 seq_printf(m: seq,
599 fmt: "periodic_IRQ\t: %s\n"
600 "update_IRQ\t: %s\n"
601 "HPET_emulated\t: %s\n"
602 // "square_wave\t: %s\n"
603 "BCD\t\t: %s\n"
604 "DST_enable\t: %s\n"
605 "periodic_freq\t: %d\n"
606 "batt_status\t: %s\n",
607 (rtc_control & RTC_PIE) ? "yes" : "no",
608 (rtc_control & RTC_UIE) ? "yes" : "no",
609 use_hpet_alarm() ? "yes" : "no",
610 // (rtc_control & RTC_SQWE) ? "yes" : "no",
611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612 (rtc_control & RTC_DST_EN) ? "yes" : "no",
613 cmos->rtc->irq_freq,
614 (valid & RTC_VRT) ? "okay" : "dead");
615
616 return 0;
617}
618
619#else
620#define cmos_procfs NULL
621#endif
622
623static const struct rtc_class_ops cmos_rtc_ops = {
624 .read_time = cmos_read_time,
625 .set_time = cmos_set_time,
626 .read_alarm = cmos_read_alarm,
627 .set_alarm = cmos_set_alarm,
628 .proc = cmos_procfs,
629 .alarm_irq_enable = cmos_alarm_irq_enable,
630};
631
632/*----------------------------------------------------------------*/
633
634/*
635 * All these chips have at least 64 bytes of address space, shared by
636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
637 * by boot firmware. Modern chips have 128 or 256 bytes.
638 */
639
640#define NVRAM_OFFSET (RTC_REG_D + 1)
641
642static int cmos_nvram_read(void *priv, unsigned int off, void *val,
643 size_t count)
644{
645 unsigned char *buf = val;
646 int retval;
647
648 off += NVRAM_OFFSET;
649 spin_lock_irq(lock: &rtc_lock);
650 for (retval = 0; count; count--, off++, retval++) {
651 if (off < 128)
652 *buf++ = CMOS_READ(off);
653 else if (can_bank2)
654 *buf++ = cmos_read_bank2(addr: off);
655 else
656 break;
657 }
658 spin_unlock_irq(lock: &rtc_lock);
659
660 return retval;
661}
662
663static int cmos_nvram_write(void *priv, unsigned int off, void *val,
664 size_t count)
665{
666 struct cmos_rtc *cmos = priv;
667 unsigned char *buf = val;
668 int retval;
669
670 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
671 * checksum on part of the NVRAM data. That's currently ignored
672 * here. If userspace is smart enough to know what fields of
673 * NVRAM to update, updating checksums is also part of its job.
674 */
675 off += NVRAM_OFFSET;
676 spin_lock_irq(lock: &rtc_lock);
677 for (retval = 0; count; count--, off++, retval++) {
678 /* don't trash RTC registers */
679 if (off == cmos->day_alrm
680 || off == cmos->mon_alrm
681 || off == cmos->century)
682 buf++;
683 else if (off < 128)
684 CMOS_WRITE(*buf++, off);
685 else if (can_bank2)
686 cmos_write_bank2(val: *buf++, addr: off);
687 else
688 break;
689 }
690 spin_unlock_irq(lock: &rtc_lock);
691
692 return retval;
693}
694
695/*----------------------------------------------------------------*/
696
697static struct cmos_rtc cmos_rtc;
698
699static irqreturn_t cmos_interrupt(int irq, void *p)
700{
701 u8 irqstat;
702 u8 rtc_control;
703
704 spin_lock(lock: &rtc_lock);
705
706 /* When the HPET interrupt handler calls us, the interrupt
707 * status is passed as arg1 instead of the irq number. But
708 * always clear irq status, even when HPET is in the way.
709 *
710 * Note that HPET and RTC are almost certainly out of phase,
711 * giving different IRQ status ...
712 */
713 irqstat = CMOS_READ(RTC_INTR_FLAGS);
714 rtc_control = CMOS_READ(RTC_CONTROL);
715 if (use_hpet_alarm())
716 irqstat = (unsigned long)irq & 0xF0;
717
718 /* If we were suspended, RTC_CONTROL may not be accurate since the
719 * bios may have cleared it.
720 */
721 if (!cmos_rtc.suspend_ctrl)
722 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
723 else
724 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
725
726 /* All Linux RTC alarms should be treated as if they were oneshot.
727 * Similar code may be needed in system wakeup paths, in case the
728 * alarm woke the system.
729 */
730 if (irqstat & RTC_AIE) {
731 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
732 rtc_control &= ~RTC_AIE;
733 CMOS_WRITE(rtc_control, RTC_CONTROL);
734 if (use_hpet_alarm())
735 hpet_mask_rtc_irq_bit(RTC_AIE);
736 CMOS_READ(RTC_INTR_FLAGS);
737 }
738 spin_unlock(lock: &rtc_lock);
739
740 if (is_intr(rtc_intr: irqstat)) {
741 rtc_update_irq(rtc: p, num: 1, events: irqstat);
742 return IRQ_HANDLED;
743 } else
744 return IRQ_NONE;
745}
746
747#ifdef CONFIG_ACPI
748
749#include <linux/acpi.h>
750
751static u32 rtc_handler(void *context)
752{
753 struct device *dev = context;
754 struct cmos_rtc *cmos = dev_get_drvdata(dev);
755 unsigned char rtc_control = 0;
756 unsigned char rtc_intr;
757 unsigned long flags;
758
759
760 /*
761 * Always update rtc irq when ACPI is used as RTC Alarm.
762 * Or else, ACPI SCI is enabled during suspend/resume only,
763 * update rtc irq in that case.
764 */
765 if (cmos_use_acpi_alarm())
766 cmos_interrupt(irq: 0, p: (void *)cmos->rtc);
767 else {
768 /* Fix me: can we use cmos_interrupt() here as well? */
769 spin_lock_irqsave(&rtc_lock, flags);
770 if (cmos_rtc.suspend_ctrl)
771 rtc_control = CMOS_READ(RTC_CONTROL);
772 if (rtc_control & RTC_AIE) {
773 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
774 CMOS_WRITE(rtc_control, RTC_CONTROL);
775 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
776 rtc_update_irq(rtc: cmos->rtc, num: 1, events: rtc_intr);
777 }
778 spin_unlock_irqrestore(lock: &rtc_lock, flags);
779 }
780
781 pm_wakeup_hard_event(dev);
782 acpi_clear_event(ACPI_EVENT_RTC);
783 acpi_disable_event(ACPI_EVENT_RTC, flags: 0);
784 return ACPI_INTERRUPT_HANDLED;
785}
786
787static void acpi_rtc_event_setup(struct device *dev)
788{
789 if (acpi_disabled)
790 return;
791
792 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, handler: rtc_handler, context: dev);
793 /*
794 * After the RTC handler is installed, the Fixed_RTC event should
795 * be disabled. Only when the RTC alarm is set will it be enabled.
796 */
797 acpi_clear_event(ACPI_EVENT_RTC);
798 acpi_disable_event(ACPI_EVENT_RTC, flags: 0);
799}
800
801static void acpi_rtc_event_cleanup(void)
802{
803 if (acpi_disabled)
804 return;
805
806 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, handler: rtc_handler);
807}
808
809static void rtc_wake_on(struct device *dev)
810{
811 acpi_clear_event(ACPI_EVENT_RTC);
812 acpi_enable_event(ACPI_EVENT_RTC, flags: 0);
813}
814
815static void rtc_wake_off(struct device *dev)
816{
817 acpi_disable_event(ACPI_EVENT_RTC, flags: 0);
818}
819
820#ifdef CONFIG_X86
821/* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
822static void use_acpi_alarm_quirks(void)
823{
824 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
825 return;
826
827 if (!is_hpet_enabled())
828 return;
829
830 if (dmi_get_bios_year() < 2015)
831 return;
832
833 use_acpi_alarm = true;
834}
835#else
836static inline void use_acpi_alarm_quirks(void) { }
837#endif
838
839static void acpi_cmos_wake_setup(struct device *dev)
840{
841 if (acpi_disabled)
842 return;
843
844 use_acpi_alarm_quirks();
845
846 cmos_rtc.wake_on = rtc_wake_on;
847 cmos_rtc.wake_off = rtc_wake_off;
848
849 /* ACPI tables bug workaround. */
850 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
851 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
852 acpi_gbl_FADT.month_alarm);
853 acpi_gbl_FADT.month_alarm = 0;
854 }
855
856 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
857 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
858 cmos_rtc.century = acpi_gbl_FADT.century;
859
860 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
861 dev_info(dev, "RTC can wake from S4\n");
862
863 /* RTC always wakes from S1/S2/S3, and often S4/STD */
864 device_init_wakeup(dev, enable: 1);
865}
866
867static void cmos_check_acpi_rtc_status(struct device *dev,
868 unsigned char *rtc_control)
869{
870 struct cmos_rtc *cmos = dev_get_drvdata(dev);
871 acpi_event_status rtc_status;
872 acpi_status status;
873
874 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
875 return;
876
877 status = acpi_get_event_status(ACPI_EVENT_RTC, event_status: &rtc_status);
878 if (ACPI_FAILURE(status)) {
879 dev_err(dev, "Could not get RTC status\n");
880 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
881 unsigned char mask;
882 *rtc_control &= ~RTC_AIE;
883 CMOS_WRITE(*rtc_control, RTC_CONTROL);
884 mask = CMOS_READ(RTC_INTR_FLAGS);
885 rtc_update_irq(rtc: cmos->rtc, num: 1, events: mask);
886 }
887}
888
889#else /* !CONFIG_ACPI */
890
891static inline void acpi_rtc_event_setup(struct device *dev)
892{
893}
894
895static inline void acpi_rtc_event_cleanup(void)
896{
897}
898
899static inline void acpi_cmos_wake_setup(struct device *dev)
900{
901}
902
903static inline void cmos_check_acpi_rtc_status(struct device *dev,
904 unsigned char *rtc_control)
905{
906}
907#endif /* CONFIG_ACPI */
908
909#ifdef CONFIG_PNP
910#define INITSECTION
911
912#else
913#define INITSECTION __init
914#endif
915
916#define SECS_PER_DAY (24 * 60 * 60)
917#define SECS_PER_MONTH (28 * SECS_PER_DAY)
918#define SECS_PER_YEAR (365 * SECS_PER_DAY)
919
920static int INITSECTION
921cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
922{
923 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
924 int retval = 0;
925 unsigned char rtc_control;
926 unsigned address_space;
927 u32 flags = 0;
928 struct nvmem_config nvmem_cfg = {
929 .name = "cmos_nvram",
930 .word_size = 1,
931 .stride = 1,
932 .reg_read = cmos_nvram_read,
933 .reg_write = cmos_nvram_write,
934 .priv = &cmos_rtc,
935 };
936
937 /* there can be only one ... */
938 if (cmos_rtc.dev)
939 return -EBUSY;
940
941 if (!ports)
942 return -ENODEV;
943
944 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
945 *
946 * REVISIT non-x86 systems may instead use memory space resources
947 * (needing ioremap etc), not i/o space resources like this ...
948 */
949 if (RTC_IOMAPPED)
950 ports = request_region(ports->start, resource_size(ports),
951 driver_name);
952 else
953 ports = request_mem_region(ports->start, resource_size(ports),
954 driver_name);
955 if (!ports) {
956 dev_dbg(dev, "i/o registers already in use\n");
957 return -EBUSY;
958 }
959
960 cmos_rtc.irq = rtc_irq;
961 cmos_rtc.iomem = ports;
962
963 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
964 * driver did, but don't reject unknown configs. Old hardware
965 * won't address 128 bytes. Newer chips have multiple banks,
966 * though they may not be listed in one I/O resource.
967 */
968#if defined(CONFIG_ATARI)
969 address_space = 64;
970#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
971 || defined(__sparc__) || defined(__mips__) \
972 || defined(__powerpc__)
973 address_space = 128;
974#else
975#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
976 address_space = 128;
977#endif
978 if (can_bank2 && ports->end > (ports->start + 1))
979 address_space = 256;
980
981 /* For ACPI systems extension info comes from the FADT. On others,
982 * board specific setup provides it as appropriate. Systems where
983 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
984 * some almost-clones) can provide hooks to make that behave.
985 *
986 * Note that ACPI doesn't preclude putting these registers into
987 * "extended" areas of the chip, including some that we won't yet
988 * expect CMOS_READ and friends to handle.
989 */
990 if (info) {
991 if (info->flags)
992 flags = info->flags;
993 if (info->address_space)
994 address_space = info->address_space;
995
996 cmos_rtc.day_alrm = info->rtc_day_alarm;
997 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
998 cmos_rtc.century = info->rtc_century;
999
1000 if (info->wake_on && info->wake_off) {
1001 cmos_rtc.wake_on = info->wake_on;
1002 cmos_rtc.wake_off = info->wake_off;
1003 }
1004 } else {
1005 acpi_cmos_wake_setup(dev);
1006 }
1007
1008 if (cmos_rtc.day_alrm >= 128)
1009 cmos_rtc.day_alrm = 0;
1010
1011 if (cmos_rtc.mon_alrm >= 128)
1012 cmos_rtc.mon_alrm = 0;
1013
1014 if (cmos_rtc.century >= 128)
1015 cmos_rtc.century = 0;
1016
1017 cmos_rtc.dev = dev;
1018 dev_set_drvdata(dev, data: &cmos_rtc);
1019
1020 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1021 if (IS_ERR(ptr: cmos_rtc.rtc)) {
1022 retval = PTR_ERR(ptr: cmos_rtc.rtc);
1023 goto cleanup0;
1024 }
1025
1026 if (cmos_rtc.mon_alrm)
1027 cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1;
1028 else if (cmos_rtc.day_alrm)
1029 cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1;
1030 else
1031 cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1;
1032
1033 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1034
1035 if (!mc146818_does_rtc_work()) {
1036 dev_warn(dev, "broken or not accessible\n");
1037 retval = -ENXIO;
1038 goto cleanup1;
1039 }
1040
1041 spin_lock_irq(lock: &rtc_lock);
1042
1043 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1044 /* force periodic irq to CMOS reset default of 1024Hz;
1045 *
1046 * REVISIT it's been reported that at least one x86_64 ALI
1047 * mobo doesn't use 32KHz here ... for portability we might
1048 * need to do something about other clock frequencies.
1049 */
1050 cmos_rtc.rtc->irq_freq = 1024;
1051 if (use_hpet_alarm())
1052 hpet_set_periodic_freq(freq: cmos_rtc.rtc->irq_freq);
1053 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1054 }
1055
1056 /* disable irqs */
1057 if (is_valid_irq(rtc_irq))
1058 cmos_irq_disable(cmos: &cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1059
1060 rtc_control = CMOS_READ(RTC_CONTROL);
1061
1062 spin_unlock_irq(lock: &rtc_lock);
1063
1064 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1065 dev_warn(dev, "only 24-hr supported\n");
1066 retval = -ENXIO;
1067 goto cleanup1;
1068 }
1069
1070 if (use_hpet_alarm())
1071 hpet_rtc_timer_init();
1072
1073 if (is_valid_irq(rtc_irq)) {
1074 irq_handler_t rtc_cmos_int_handler;
1075
1076 if (use_hpet_alarm()) {
1077 rtc_cmos_int_handler = hpet_rtc_interrupt;
1078 retval = hpet_register_irq_handler(handler: cmos_interrupt);
1079 if (retval) {
1080 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1081 dev_warn(dev, "hpet_register_irq_handler "
1082 " failed in rtc_init().");
1083 goto cleanup1;
1084 }
1085 } else
1086 rtc_cmos_int_handler = cmos_interrupt;
1087
1088 retval = request_irq(irq: rtc_irq, handler: rtc_cmos_int_handler,
1089 flags: 0, name: dev_name(dev: &cmos_rtc.rtc->dev),
1090 dev: cmos_rtc.rtc);
1091 if (retval < 0) {
1092 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1093 goto cleanup1;
1094 }
1095 } else {
1096 clear_bit(RTC_FEATURE_ALARM, addr: cmos_rtc.rtc->features);
1097 }
1098
1099 cmos_rtc.rtc->ops = &cmos_rtc_ops;
1100
1101 retval = devm_rtc_register_device(cmos_rtc.rtc);
1102 if (retval)
1103 goto cleanup2;
1104
1105 /* Set the sync offset for the periodic 11min update correct */
1106 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1107
1108 /* export at least the first block of NVRAM */
1109 nvmem_cfg.size = address_space - NVRAM_OFFSET;
1110 devm_rtc_nvmem_register(rtc: cmos_rtc.rtc, nvmem_config: &nvmem_cfg);
1111
1112 /*
1113 * Everything has gone well so far, so by default register a handler for
1114 * the ACPI RTC fixed event.
1115 */
1116 if (!info)
1117 acpi_rtc_event_setup(dev);
1118
1119 dev_info(dev, "%s%s, %d bytes nvram%s\n",
1120 !is_valid_irq(rtc_irq) ? "no alarms" :
1121 cmos_rtc.mon_alrm ? "alarms up to one year" :
1122 cmos_rtc.day_alrm ? "alarms up to one month" :
1123 "alarms up to one day",
1124 cmos_rtc.century ? ", y3k" : "",
1125 nvmem_cfg.size,
1126 use_hpet_alarm() ? ", hpet irqs" : "");
1127
1128 return 0;
1129
1130cleanup2:
1131 if (is_valid_irq(rtc_irq))
1132 free_irq(rtc_irq, cmos_rtc.rtc);
1133cleanup1:
1134 cmos_rtc.dev = NULL;
1135cleanup0:
1136 if (RTC_IOMAPPED)
1137 release_region(ports->start, resource_size(ports));
1138 else
1139 release_mem_region(ports->start, resource_size(ports));
1140 return retval;
1141}
1142
1143static void cmos_do_shutdown(int rtc_irq)
1144{
1145 spin_lock_irq(lock: &rtc_lock);
1146 if (is_valid_irq(rtc_irq))
1147 cmos_irq_disable(cmos: &cmos_rtc, RTC_IRQMASK);
1148 spin_unlock_irq(lock: &rtc_lock);
1149}
1150
1151static void cmos_do_remove(struct device *dev)
1152{
1153 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1154 struct resource *ports;
1155
1156 cmos_do_shutdown(rtc_irq: cmos->irq);
1157
1158 if (is_valid_irq(cmos->irq)) {
1159 free_irq(cmos->irq, cmos->rtc);
1160 if (use_hpet_alarm())
1161 hpet_unregister_irq_handler(handler: cmos_interrupt);
1162 }
1163
1164 if (!dev_get_platdata(dev))
1165 acpi_rtc_event_cleanup();
1166
1167 cmos->rtc = NULL;
1168
1169 ports = cmos->iomem;
1170 if (RTC_IOMAPPED)
1171 release_region(ports->start, resource_size(ports));
1172 else
1173 release_mem_region(ports->start, resource_size(ports));
1174 cmos->iomem = NULL;
1175
1176 cmos->dev = NULL;
1177}
1178
1179static int cmos_aie_poweroff(struct device *dev)
1180{
1181 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1182 struct rtc_time now;
1183 time64_t t_now;
1184 int retval = 0;
1185 unsigned char rtc_control;
1186
1187 if (!cmos->alarm_expires)
1188 return -EINVAL;
1189
1190 spin_lock_irq(lock: &rtc_lock);
1191 rtc_control = CMOS_READ(RTC_CONTROL);
1192 spin_unlock_irq(lock: &rtc_lock);
1193
1194 /* We only care about the situation where AIE is disabled. */
1195 if (rtc_control & RTC_AIE)
1196 return -EBUSY;
1197
1198 cmos_read_time(dev, t: &now);
1199 t_now = rtc_tm_to_time64(tm: &now);
1200
1201 /*
1202 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1203 * automatically right after shutdown on some buggy boxes.
1204 * This automatic rebooting issue won't happen when the alarm
1205 * time is larger than now+1 seconds.
1206 *
1207 * If the alarm time is equal to now+1 seconds, the issue can be
1208 * prevented by cancelling the alarm.
1209 */
1210 if (cmos->alarm_expires == t_now + 1) {
1211 struct rtc_wkalrm alarm;
1212
1213 /* Cancel the AIE timer by configuring the past time. */
1214 rtc_time64_to_tm(time: t_now - 1, tm: &alarm.time);
1215 alarm.enabled = 0;
1216 retval = cmos_set_alarm(dev, t: &alarm);
1217 } else if (cmos->alarm_expires > t_now + 1) {
1218 retval = -EBUSY;
1219 }
1220
1221 return retval;
1222}
1223
1224static int cmos_suspend(struct device *dev)
1225{
1226 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1227 unsigned char tmp;
1228
1229 /* only the alarm might be a wakeup event source */
1230 spin_lock_irq(lock: &rtc_lock);
1231 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1232 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1233 unsigned char mask;
1234
1235 if (device_may_wakeup(dev))
1236 mask = RTC_IRQMASK & ~RTC_AIE;
1237 else
1238 mask = RTC_IRQMASK;
1239 tmp &= ~mask;
1240 CMOS_WRITE(tmp, RTC_CONTROL);
1241 if (use_hpet_alarm())
1242 hpet_mask_rtc_irq_bit(bit_mask: mask);
1243 cmos_checkintr(cmos, rtc_control: tmp);
1244 }
1245 spin_unlock_irq(lock: &rtc_lock);
1246
1247 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1248 cmos->enabled_wake = 1;
1249 if (cmos->wake_on)
1250 cmos->wake_on(dev);
1251 else
1252 enable_irq_wake(irq: cmos->irq);
1253 }
1254
1255 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1256 cmos_read_alarm(dev, t: &cmos->saved_wkalrm);
1257
1258 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1259 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1260 tmp);
1261
1262 return 0;
1263}
1264
1265/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1266 * after a detour through G3 "mechanical off", although the ACPI spec
1267 * says wakeup should only work from G1/S4 "hibernate". To most users,
1268 * distinctions between S4 and S5 are pointless. So when the hardware
1269 * allows, don't draw that distinction.
1270 */
1271static inline int cmos_poweroff(struct device *dev)
1272{
1273 if (!IS_ENABLED(CONFIG_PM))
1274 return -ENOSYS;
1275
1276 return cmos_suspend(dev);
1277}
1278
1279static void cmos_check_wkalrm(struct device *dev)
1280{
1281 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1282 struct rtc_wkalrm current_alarm;
1283 time64_t t_now;
1284 time64_t t_current_expires;
1285 time64_t t_saved_expires;
1286 struct rtc_time now;
1287
1288 /* Check if we have RTC Alarm armed */
1289 if (!(cmos->suspend_ctrl & RTC_AIE))
1290 return;
1291
1292 cmos_read_time(dev, t: &now);
1293 t_now = rtc_tm_to_time64(tm: &now);
1294
1295 /*
1296 * ACPI RTC wake event is cleared after resume from STR,
1297 * ACK the rtc irq here
1298 */
1299 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1300 local_irq_disable();
1301 cmos_interrupt(irq: 0, p: (void *)cmos->rtc);
1302 local_irq_enable();
1303 return;
1304 }
1305
1306 memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
1307 cmos_read_alarm(dev, t: &current_alarm);
1308 t_current_expires = rtc_tm_to_time64(tm: &current_alarm.time);
1309 t_saved_expires = rtc_tm_to_time64(tm: &cmos->saved_wkalrm.time);
1310 if (t_current_expires != t_saved_expires ||
1311 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1312 cmos_set_alarm(dev, t: &cmos->saved_wkalrm);
1313 }
1314}
1315
1316static int __maybe_unused cmos_resume(struct device *dev)
1317{
1318 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1319 unsigned char tmp;
1320
1321 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1322 if (cmos->wake_off)
1323 cmos->wake_off(dev);
1324 else
1325 disable_irq_wake(irq: cmos->irq);
1326 cmos->enabled_wake = 0;
1327 }
1328
1329 /* The BIOS might have changed the alarm, restore it */
1330 cmos_check_wkalrm(dev);
1331
1332 spin_lock_irq(lock: &rtc_lock);
1333 tmp = cmos->suspend_ctrl;
1334 cmos->suspend_ctrl = 0;
1335 /* re-enable any irqs previously active */
1336 if (tmp & RTC_IRQMASK) {
1337 unsigned char mask;
1338
1339 if (device_may_wakeup(dev) && use_hpet_alarm())
1340 hpet_rtc_timer_init();
1341
1342 do {
1343 CMOS_WRITE(tmp, RTC_CONTROL);
1344 if (use_hpet_alarm())
1345 hpet_set_rtc_irq_bit(bit_mask: tmp & RTC_IRQMASK);
1346
1347 mask = CMOS_READ(RTC_INTR_FLAGS);
1348 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1349 if (!use_hpet_alarm() || !is_intr(rtc_intr: mask))
1350 break;
1351
1352 /* force one-shot behavior if HPET blocked
1353 * the wake alarm's irq
1354 */
1355 rtc_update_irq(rtc: cmos->rtc, num: 1, events: mask);
1356 tmp &= ~RTC_AIE;
1357 hpet_mask_rtc_irq_bit(RTC_AIE);
1358 } while (mask & RTC_AIE);
1359
1360 if (tmp & RTC_AIE)
1361 cmos_check_acpi_rtc_status(dev, rtc_control: &tmp);
1362 }
1363 spin_unlock_irq(lock: &rtc_lock);
1364
1365 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1366
1367 return 0;
1368}
1369
1370static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1371
1372/*----------------------------------------------------------------*/
1373
1374/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1375 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1376 * probably list them in similar PNPBIOS tables; so PNP is more common.
1377 *
1378 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1379 * predate even PNPBIOS should set up platform_bus devices.
1380 */
1381
1382#ifdef CONFIG_PNP
1383
1384#include <linux/pnp.h>
1385
1386static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1387{
1388 int irq;
1389
1390 if (pnp_port_start(dev: pnp, bar: 0) == 0x70 && !pnp_irq_valid(dev: pnp, bar: 0)) {
1391 irq = 0;
1392#ifdef CONFIG_X86
1393 /* Some machines contain a PNP entry for the RTC, but
1394 * don't define the IRQ. It should always be safe to
1395 * hardcode it on systems with a legacy PIC.
1396 */
1397 if (nr_legacy_irqs())
1398 irq = RTC_IRQ;
1399#endif
1400 } else {
1401 irq = pnp_irq(dev: pnp, bar: 0);
1402 }
1403
1404 return cmos_do_probe(dev: &pnp->dev, ports: pnp_get_resource(dev: pnp, IORESOURCE_IO, num: 0), rtc_irq: irq);
1405}
1406
1407static void cmos_pnp_remove(struct pnp_dev *pnp)
1408{
1409 cmos_do_remove(dev: &pnp->dev);
1410}
1411
1412static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1413{
1414 struct device *dev = &pnp->dev;
1415 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1416
1417 if (system_state == SYSTEM_POWER_OFF) {
1418 int retval = cmos_poweroff(dev);
1419
1420 if (cmos_aie_poweroff(dev) < 0 && !retval)
1421 return;
1422 }
1423
1424 cmos_do_shutdown(rtc_irq: cmos->irq);
1425}
1426
1427static const struct pnp_device_id rtc_ids[] = {
1428 { .id = "PNP0b00", },
1429 { .id = "PNP0b01", },
1430 { .id = "PNP0b02", },
1431 { },
1432};
1433MODULE_DEVICE_TABLE(pnp, rtc_ids);
1434
1435static struct pnp_driver cmos_pnp_driver = {
1436 .name = driver_name,
1437 .id_table = rtc_ids,
1438 .probe = cmos_pnp_probe,
1439 .remove = cmos_pnp_remove,
1440 .shutdown = cmos_pnp_shutdown,
1441
1442 /* flag ensures resume() gets called, and stops syslog spam */
1443 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1444 .driver = {
1445 .pm = &cmos_pm_ops,
1446 },
1447};
1448
1449#endif /* CONFIG_PNP */
1450
1451#ifdef CONFIG_OF
1452static const struct of_device_id of_cmos_match[] = {
1453 {
1454 .compatible = "motorola,mc146818",
1455 },
1456 { },
1457};
1458MODULE_DEVICE_TABLE(of, of_cmos_match);
1459
1460static __init void cmos_of_init(struct platform_device *pdev)
1461{
1462 struct device_node *node = pdev->dev.of_node;
1463 const __be32 *val;
1464
1465 if (!node)
1466 return;
1467
1468 val = of_get_property(node, name: "ctrl-reg", NULL);
1469 if (val)
1470 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1471
1472 val = of_get_property(node, name: "freq-reg", NULL);
1473 if (val)
1474 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1475}
1476#else
1477static inline void cmos_of_init(struct platform_device *pdev) {}
1478#endif
1479/*----------------------------------------------------------------*/
1480
1481/* Platform setup should have set up an RTC device, when PNP is
1482 * unavailable ... this could happen even on (older) PCs.
1483 */
1484
1485static int __init cmos_platform_probe(struct platform_device *pdev)
1486{
1487 struct resource *resource;
1488 int irq;
1489
1490 cmos_of_init(pdev);
1491
1492 if (RTC_IOMAPPED)
1493 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1494 else
1495 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1496 irq = platform_get_irq(pdev, 0);
1497 if (irq < 0)
1498 irq = -1;
1499
1500 return cmos_do_probe(dev: &pdev->dev, ports: resource, rtc_irq: irq);
1501}
1502
1503static void cmos_platform_remove(struct platform_device *pdev)
1504{
1505 cmos_do_remove(dev: &pdev->dev);
1506}
1507
1508static void cmos_platform_shutdown(struct platform_device *pdev)
1509{
1510 struct device *dev = &pdev->dev;
1511 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1512
1513 if (system_state == SYSTEM_POWER_OFF) {
1514 int retval = cmos_poweroff(dev);
1515
1516 if (cmos_aie_poweroff(dev) < 0 && !retval)
1517 return;
1518 }
1519
1520 cmos_do_shutdown(rtc_irq: cmos->irq);
1521}
1522
1523/* work with hotplug and coldplug */
1524MODULE_ALIAS("platform:rtc_cmos");
1525
1526static struct platform_driver cmos_platform_driver = {
1527 .remove_new = cmos_platform_remove,
1528 .shutdown = cmos_platform_shutdown,
1529 .driver = {
1530 .name = driver_name,
1531 .pm = &cmos_pm_ops,
1532 .of_match_table = of_match_ptr(of_cmos_match),
1533 }
1534};
1535
1536#ifdef CONFIG_PNP
1537static bool pnp_driver_registered;
1538#endif
1539static bool platform_driver_registered;
1540
1541static int __init cmos_init(void)
1542{
1543 int retval = 0;
1544
1545#ifdef CONFIG_PNP
1546 retval = pnp_register_driver(drv: &cmos_pnp_driver);
1547 if (retval == 0)
1548 pnp_driver_registered = true;
1549#endif
1550
1551 if (!cmos_rtc.dev) {
1552 retval = platform_driver_probe(&cmos_platform_driver,
1553 cmos_platform_probe);
1554 if (retval == 0)
1555 platform_driver_registered = true;
1556 }
1557
1558 if (retval == 0)
1559 return 0;
1560
1561#ifdef CONFIG_PNP
1562 if (pnp_driver_registered)
1563 pnp_unregister_driver(drv: &cmos_pnp_driver);
1564#endif
1565 return retval;
1566}
1567module_init(cmos_init);
1568
1569static void __exit cmos_exit(void)
1570{
1571#ifdef CONFIG_PNP
1572 if (pnp_driver_registered)
1573 pnp_unregister_driver(drv: &cmos_pnp_driver);
1574#endif
1575 if (platform_driver_registered)
1576 platform_driver_unregister(&cmos_platform_driver);
1577}
1578module_exit(cmos_exit);
1579
1580
1581MODULE_AUTHOR("David Brownell");
1582MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1583MODULE_LICENSE("GPL");
1584

source code of linux/drivers/rtc/rtc-cmos.c