1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * I2C client/driver for the ST M41T80 family of i2c rtc chips. |
4 | * |
5 | * Author: Alexander Bigga <ab@mycable.de> |
6 | * |
7 | * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> |
8 | * |
9 | * 2006 (c) mycable GmbH |
10 | */ |
11 | |
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
13 | |
14 | #include <linux/bcd.h> |
15 | #include <linux/clk-provider.h> |
16 | #include <linux/i2c.h> |
17 | #include <linux/init.h> |
18 | #include <linux/kernel.h> |
19 | #include <linux/module.h> |
20 | #include <linux/of.h> |
21 | #include <linux/rtc.h> |
22 | #include <linux/slab.h> |
23 | #include <linux/mutex.h> |
24 | #include <linux/string.h> |
25 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
26 | #include <linux/fs.h> |
27 | #include <linux/ioctl.h> |
28 | #include <linux/miscdevice.h> |
29 | #include <linux/reboot.h> |
30 | #include <linux/watchdog.h> |
31 | #endif |
32 | |
33 | #define M41T80_REG_SSEC 0x00 |
34 | #define M41T80_REG_SEC 0x01 |
35 | #define M41T80_REG_MIN 0x02 |
36 | #define M41T80_REG_HOUR 0x03 |
37 | #define M41T80_REG_WDAY 0x04 |
38 | #define M41T80_REG_DAY 0x05 |
39 | #define M41T80_REG_MON 0x06 |
40 | #define M41T80_REG_YEAR 0x07 |
41 | #define M41T80_REG_ALARM_MON 0x0a |
42 | #define M41T80_REG_ALARM_DAY 0x0b |
43 | #define M41T80_REG_ALARM_HOUR 0x0c |
44 | #define M41T80_REG_ALARM_MIN 0x0d |
45 | #define M41T80_REG_ALARM_SEC 0x0e |
46 | #define M41T80_REG_FLAGS 0x0f |
47 | #define M41T80_REG_SQW 0x13 |
48 | |
49 | #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) |
50 | #define M41T80_ALARM_REG_SIZE \ |
51 | (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) |
52 | |
53 | #define M41T80_SQW_MAX_FREQ 32768 |
54 | |
55 | #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ |
56 | #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ |
57 | #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ |
58 | #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ |
59 | #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ |
60 | #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ |
61 | #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ |
62 | #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ |
63 | #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ |
64 | #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ |
65 | |
66 | #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ |
67 | #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ |
68 | #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ |
69 | #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ |
70 | #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ |
71 | |
72 | static const struct i2c_device_id m41t80_id[] = { |
73 | { "m41t62" , M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, |
74 | { "m41t65" , M41T80_FEATURE_HT | M41T80_FEATURE_WD }, |
75 | { "m41t80" , M41T80_FEATURE_SQ }, |
76 | { "m41t81" , M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, |
77 | { "m41t81s" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
78 | { "m41t82" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
79 | { "m41t83" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
80 | { "m41st84" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
81 | { "m41st85" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
82 | { "m41st87" , M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, |
83 | { "rv4162" , M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, |
84 | { } |
85 | }; |
86 | MODULE_DEVICE_TABLE(i2c, m41t80_id); |
87 | |
88 | static const __maybe_unused struct of_device_id m41t80_of_match[] = { |
89 | { |
90 | .compatible = "st,m41t62" , |
91 | .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) |
92 | }, |
93 | { |
94 | .compatible = "st,m41t65" , |
95 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) |
96 | }, |
97 | { |
98 | .compatible = "st,m41t80" , |
99 | .data = (void *)(M41T80_FEATURE_SQ) |
100 | }, |
101 | { |
102 | .compatible = "st,m41t81" , |
103 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) |
104 | }, |
105 | { |
106 | .compatible = "st,m41t81s" , |
107 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
108 | }, |
109 | { |
110 | .compatible = "st,m41t82" , |
111 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
112 | }, |
113 | { |
114 | .compatible = "st,m41t83" , |
115 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
116 | }, |
117 | { |
118 | .compatible = "st,m41t84" , |
119 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
120 | }, |
121 | { |
122 | .compatible = "st,m41t85" , |
123 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
124 | }, |
125 | { |
126 | .compatible = "st,m41t87" , |
127 | .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) |
128 | }, |
129 | { |
130 | .compatible = "microcrystal,rv4162" , |
131 | .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) |
132 | }, |
133 | /* DT compatibility only, do not use compatibles below: */ |
134 | { |
135 | .compatible = "st,rv4162" , |
136 | .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) |
137 | }, |
138 | { |
139 | .compatible = "rv4162" , |
140 | .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) |
141 | }, |
142 | { } |
143 | }; |
144 | MODULE_DEVICE_TABLE(of, m41t80_of_match); |
145 | |
146 | struct m41t80_data { |
147 | unsigned long features; |
148 | struct i2c_client *client; |
149 | struct rtc_device *rtc; |
150 | #ifdef CONFIG_COMMON_CLK |
151 | struct clk_hw sqw; |
152 | unsigned long freq; |
153 | unsigned int sqwe; |
154 | #endif |
155 | }; |
156 | |
157 | static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) |
158 | { |
159 | struct i2c_client *client = dev_id; |
160 | struct m41t80_data *m41t80 = i2c_get_clientdata(client); |
161 | unsigned long events = 0; |
162 | int flags, flags_afe; |
163 | |
164 | rtc_lock(m41t80->rtc); |
165 | |
166 | flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
167 | if (flags_afe < 0) { |
168 | rtc_unlock(m41t80->rtc); |
169 | return IRQ_NONE; |
170 | } |
171 | |
172 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
173 | if (flags <= 0) { |
174 | rtc_unlock(m41t80->rtc); |
175 | return IRQ_NONE; |
176 | } |
177 | |
178 | if (flags & M41T80_FLAGS_AF) { |
179 | flags &= ~M41T80_FLAGS_AF; |
180 | flags_afe &= ~M41T80_ALMON_AFE; |
181 | events |= RTC_AF; |
182 | } |
183 | |
184 | if (events) { |
185 | rtc_update_irq(rtc: m41t80->rtc, num: 1, events); |
186 | i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, value: flags); |
187 | i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, |
188 | value: flags_afe); |
189 | } |
190 | |
191 | rtc_unlock(m41t80->rtc); |
192 | |
193 | return IRQ_HANDLED; |
194 | } |
195 | |
196 | static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) |
197 | { |
198 | struct i2c_client *client = to_i2c_client(dev); |
199 | unsigned char buf[8]; |
200 | int err, flags; |
201 | |
202 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
203 | if (flags < 0) |
204 | return flags; |
205 | |
206 | if (flags & M41T80_FLAGS_OF) { |
207 | dev_err(&client->dev, "Oscillator failure, data is invalid.\n" ); |
208 | return -EINVAL; |
209 | } |
210 | |
211 | err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, |
212 | length: sizeof(buf), values: buf); |
213 | if (err < 0) { |
214 | dev_err(&client->dev, "Unable to read date\n" ); |
215 | return err; |
216 | } |
217 | |
218 | tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); |
219 | tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); |
220 | tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); |
221 | tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); |
222 | tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; |
223 | tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; |
224 | |
225 | /* assume 20YY not 19YY, and ignore the Century Bit */ |
226 | tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; |
227 | return 0; |
228 | } |
229 | |
230 | static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) |
231 | { |
232 | struct i2c_client *client = to_i2c_client(dev); |
233 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
234 | unsigned char buf[8]; |
235 | int err, flags; |
236 | |
237 | buf[M41T80_REG_SSEC] = 0; |
238 | buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); |
239 | buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); |
240 | buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); |
241 | buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); |
242 | buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); |
243 | buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); |
244 | buf[M41T80_REG_WDAY] = tm->tm_wday; |
245 | |
246 | /* If the square wave output is controlled in the weekday register */ |
247 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) { |
248 | int val; |
249 | |
250 | val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); |
251 | if (val < 0) |
252 | return val; |
253 | |
254 | buf[M41T80_REG_WDAY] |= (val & 0xf0); |
255 | } |
256 | |
257 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, |
258 | length: sizeof(buf), values: buf); |
259 | if (err < 0) { |
260 | dev_err(&client->dev, "Unable to write to date registers\n" ); |
261 | return err; |
262 | } |
263 | |
264 | /* Clear the OF bit of Flags Register */ |
265 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
266 | if (flags < 0) |
267 | return flags; |
268 | |
269 | err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, |
270 | value: flags & ~M41T80_FLAGS_OF); |
271 | if (err < 0) { |
272 | dev_err(&client->dev, "Unable to write flags register\n" ); |
273 | return err; |
274 | } |
275 | |
276 | return err; |
277 | } |
278 | |
279 | static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) |
280 | { |
281 | struct i2c_client *client = to_i2c_client(dev); |
282 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
283 | int reg; |
284 | |
285 | if (clientdata->features & M41T80_FEATURE_BL) { |
286 | reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
287 | if (reg < 0) |
288 | return reg; |
289 | seq_printf(m: seq, fmt: "battery\t\t: %s\n" , |
290 | (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok" ); |
291 | } |
292 | return 0; |
293 | } |
294 | |
295 | static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) |
296 | { |
297 | struct i2c_client *client = to_i2c_client(dev); |
298 | int flags, retval; |
299 | |
300 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
301 | if (flags < 0) |
302 | return flags; |
303 | |
304 | if (enabled) |
305 | flags |= M41T80_ALMON_AFE; |
306 | else |
307 | flags &= ~M41T80_ALMON_AFE; |
308 | |
309 | retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, value: flags); |
310 | if (retval < 0) { |
311 | dev_err(dev, "Unable to enable alarm IRQ %d\n" , retval); |
312 | return retval; |
313 | } |
314 | return 0; |
315 | } |
316 | |
317 | static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
318 | { |
319 | struct i2c_client *client = to_i2c_client(dev); |
320 | u8 alarmvals[5]; |
321 | int ret, err; |
322 | |
323 | alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); |
324 | alarmvals[1] = bin2bcd(alrm->time.tm_mday); |
325 | alarmvals[2] = bin2bcd(alrm->time.tm_hour); |
326 | alarmvals[3] = bin2bcd(alrm->time.tm_min); |
327 | alarmvals[4] = bin2bcd(alrm->time.tm_sec); |
328 | |
329 | /* Clear AF and AFE flags */ |
330 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
331 | if (ret < 0) |
332 | return ret; |
333 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, |
334 | value: ret & ~(M41T80_ALMON_AFE)); |
335 | if (err < 0) { |
336 | dev_err(dev, "Unable to clear AFE bit\n" ); |
337 | return err; |
338 | } |
339 | |
340 | /* Keep SQWE bit value */ |
341 | alarmvals[0] |= (ret & M41T80_ALMON_SQWE); |
342 | |
343 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
344 | if (ret < 0) |
345 | return ret; |
346 | |
347 | err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, |
348 | value: ret & ~(M41T80_FLAGS_AF)); |
349 | if (err < 0) { |
350 | dev_err(dev, "Unable to clear AF bit\n" ); |
351 | return err; |
352 | } |
353 | |
354 | /* Write the alarm */ |
355 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, |
356 | length: 5, values: alarmvals); |
357 | if (err) |
358 | return err; |
359 | |
360 | /* Enable the alarm interrupt */ |
361 | if (alrm->enabled) { |
362 | alarmvals[0] |= M41T80_ALMON_AFE; |
363 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, |
364 | value: alarmvals[0]); |
365 | if (err) |
366 | return err; |
367 | } |
368 | |
369 | return 0; |
370 | } |
371 | |
372 | static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
373 | { |
374 | struct i2c_client *client = to_i2c_client(dev); |
375 | u8 alarmvals[5]; |
376 | int flags, ret; |
377 | |
378 | ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, |
379 | length: 5, values: alarmvals); |
380 | if (ret != 5) |
381 | return ret < 0 ? ret : -EIO; |
382 | |
383 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
384 | if (flags < 0) |
385 | return flags; |
386 | |
387 | alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); |
388 | alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); |
389 | alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); |
390 | alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); |
391 | alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1; |
392 | |
393 | alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); |
394 | alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; |
395 | |
396 | return 0; |
397 | } |
398 | |
399 | static const struct rtc_class_ops m41t80_rtc_ops = { |
400 | .read_time = m41t80_rtc_read_time, |
401 | .set_time = m41t80_rtc_set_time, |
402 | .proc = m41t80_rtc_proc, |
403 | .read_alarm = m41t80_read_alarm, |
404 | .set_alarm = m41t80_set_alarm, |
405 | .alarm_irq_enable = m41t80_alarm_irq_enable, |
406 | }; |
407 | |
408 | #ifdef CONFIG_PM_SLEEP |
409 | static int m41t80_suspend(struct device *dev) |
410 | { |
411 | struct i2c_client *client = to_i2c_client(dev); |
412 | |
413 | if (client->irq >= 0 && device_may_wakeup(dev)) |
414 | enable_irq_wake(irq: client->irq); |
415 | |
416 | return 0; |
417 | } |
418 | |
419 | static int m41t80_resume(struct device *dev) |
420 | { |
421 | struct i2c_client *client = to_i2c_client(dev); |
422 | |
423 | if (client->irq >= 0 && device_may_wakeup(dev)) |
424 | disable_irq_wake(irq: client->irq); |
425 | |
426 | return 0; |
427 | } |
428 | #endif |
429 | |
430 | static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); |
431 | |
432 | #ifdef CONFIG_COMMON_CLK |
433 | #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) |
434 | |
435 | static unsigned long m41t80_decode_freq(int setting) |
436 | { |
437 | return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ : |
438 | M41T80_SQW_MAX_FREQ >> setting; |
439 | } |
440 | |
441 | static unsigned long m41t80_get_freq(struct m41t80_data *m41t80) |
442 | { |
443 | struct i2c_client *client = m41t80->client; |
444 | int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? |
445 | M41T80_REG_WDAY : M41T80_REG_SQW; |
446 | int ret = i2c_smbus_read_byte_data(client, command: reg_sqw); |
447 | |
448 | if (ret < 0) |
449 | return 0; |
450 | return m41t80_decode_freq(setting: ret >> 4); |
451 | } |
452 | |
453 | static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, |
454 | unsigned long parent_rate) |
455 | { |
456 | return sqw_to_m41t80_data(hw)->freq; |
457 | } |
458 | |
459 | static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, |
460 | unsigned long *prate) |
461 | { |
462 | if (rate >= M41T80_SQW_MAX_FREQ) |
463 | return M41T80_SQW_MAX_FREQ; |
464 | if (rate >= M41T80_SQW_MAX_FREQ / 4) |
465 | return M41T80_SQW_MAX_FREQ / 4; |
466 | if (!rate) |
467 | return 0; |
468 | return 1 << ilog2(rate); |
469 | } |
470 | |
471 | static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, |
472 | unsigned long parent_rate) |
473 | { |
474 | struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); |
475 | struct i2c_client *client = m41t80->client; |
476 | int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? |
477 | M41T80_REG_WDAY : M41T80_REG_SQW; |
478 | int reg, ret, val = 0; |
479 | |
480 | if (rate >= M41T80_SQW_MAX_FREQ) |
481 | val = 1; |
482 | else if (rate >= M41T80_SQW_MAX_FREQ / 4) |
483 | val = 2; |
484 | else if (rate) |
485 | val = 15 - ilog2(rate); |
486 | |
487 | reg = i2c_smbus_read_byte_data(client, command: reg_sqw); |
488 | if (reg < 0) |
489 | return reg; |
490 | |
491 | reg = (reg & 0x0f) | (val << 4); |
492 | |
493 | ret = i2c_smbus_write_byte_data(client, command: reg_sqw, value: reg); |
494 | if (!ret) |
495 | m41t80->freq = m41t80_decode_freq(setting: val); |
496 | return ret; |
497 | } |
498 | |
499 | static int m41t80_sqw_control(struct clk_hw *hw, bool enable) |
500 | { |
501 | struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); |
502 | struct i2c_client *client = m41t80->client; |
503 | int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
504 | |
505 | if (ret < 0) |
506 | return ret; |
507 | |
508 | if (enable) |
509 | ret |= M41T80_ALMON_SQWE; |
510 | else |
511 | ret &= ~M41T80_ALMON_SQWE; |
512 | |
513 | ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, value: ret); |
514 | if (!ret) |
515 | m41t80->sqwe = enable; |
516 | return ret; |
517 | } |
518 | |
519 | static int m41t80_sqw_prepare(struct clk_hw *hw) |
520 | { |
521 | return m41t80_sqw_control(hw, enable: 1); |
522 | } |
523 | |
524 | static void m41t80_sqw_unprepare(struct clk_hw *hw) |
525 | { |
526 | m41t80_sqw_control(hw, enable: 0); |
527 | } |
528 | |
529 | static int m41t80_sqw_is_prepared(struct clk_hw *hw) |
530 | { |
531 | return sqw_to_m41t80_data(hw)->sqwe; |
532 | } |
533 | |
534 | static const struct clk_ops m41t80_sqw_ops = { |
535 | .prepare = m41t80_sqw_prepare, |
536 | .unprepare = m41t80_sqw_unprepare, |
537 | .is_prepared = m41t80_sqw_is_prepared, |
538 | .recalc_rate = m41t80_sqw_recalc_rate, |
539 | .round_rate = m41t80_sqw_round_rate, |
540 | .set_rate = m41t80_sqw_set_rate, |
541 | }; |
542 | |
543 | static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) |
544 | { |
545 | struct i2c_client *client = m41t80->client; |
546 | struct device_node *node = client->dev.of_node; |
547 | struct device_node *fixed_clock; |
548 | struct clk *clk; |
549 | struct clk_init_data init; |
550 | int ret; |
551 | |
552 | fixed_clock = of_get_child_by_name(node, name: "clock" ); |
553 | if (fixed_clock) { |
554 | /* |
555 | * skip registering square wave clock when a fixed |
556 | * clock has been registered. The fixed clock is |
557 | * registered automatically when being referenced. |
558 | */ |
559 | of_node_put(node: fixed_clock); |
560 | return NULL; |
561 | } |
562 | |
563 | /* First disable the clock */ |
564 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
565 | if (ret < 0) |
566 | return ERR_PTR(error: ret); |
567 | ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, |
568 | value: ret & ~(M41T80_ALMON_SQWE)); |
569 | if (ret < 0) |
570 | return ERR_PTR(error: ret); |
571 | |
572 | init.name = "m41t80-sqw" ; |
573 | init.ops = &m41t80_sqw_ops; |
574 | init.flags = 0; |
575 | init.parent_names = NULL; |
576 | init.num_parents = 0; |
577 | m41t80->sqw.init = &init; |
578 | m41t80->freq = m41t80_get_freq(m41t80); |
579 | |
580 | /* optional override of the clockname */ |
581 | of_property_read_string(np: node, propname: "clock-output-names" , out_string: &init.name); |
582 | |
583 | /* register the clock */ |
584 | clk = clk_register(dev: &client->dev, hw: &m41t80->sqw); |
585 | if (!IS_ERR(ptr: clk)) |
586 | of_clk_add_provider(np: node, clk_src_get: of_clk_src_simple_get, data: clk); |
587 | |
588 | return clk; |
589 | } |
590 | #endif |
591 | |
592 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
593 | /* |
594 | ***************************************************************************** |
595 | * |
596 | * Watchdog Driver |
597 | * |
598 | ***************************************************************************** |
599 | */ |
600 | static DEFINE_MUTEX(m41t80_rtc_mutex); |
601 | static struct i2c_client *save_client; |
602 | |
603 | /* Default margin */ |
604 | #define WD_TIMO 60 /* 1..31 seconds */ |
605 | |
606 | static int wdt_margin = WD_TIMO; |
607 | module_param(wdt_margin, int, 0); |
608 | MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)" ); |
609 | |
610 | static unsigned long wdt_is_open; |
611 | static int boot_flag; |
612 | |
613 | /** |
614 | * wdt_ping - Reload counter one with the watchdog timeout. |
615 | * We don't bother reloading the cascade counter. |
616 | */ |
617 | static void wdt_ping(void) |
618 | { |
619 | unsigned char i2c_data[2]; |
620 | struct i2c_msg msgs1[1] = { |
621 | { |
622 | .addr = save_client->addr, |
623 | .flags = 0, |
624 | .len = 2, |
625 | .buf = i2c_data, |
626 | }, |
627 | }; |
628 | struct m41t80_data *clientdata = i2c_get_clientdata(client: save_client); |
629 | |
630 | i2c_data[0] = 0x09; /* watchdog register */ |
631 | |
632 | if (wdt_margin > 31) |
633 | i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ |
634 | else |
635 | /* |
636 | * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) |
637 | */ |
638 | i2c_data[1] = wdt_margin << 2 | 0x82; |
639 | |
640 | /* |
641 | * M41T65 has three bits for watchdog resolution. Don't set bit 7, as |
642 | * that would be an invalid resolution. |
643 | */ |
644 | if (clientdata->features & M41T80_FEATURE_WD) |
645 | i2c_data[1] &= ~M41T80_WATCHDOG_RB2; |
646 | |
647 | i2c_transfer(adap: save_client->adapter, msgs: msgs1, num: 1); |
648 | } |
649 | |
650 | /** |
651 | * wdt_disable - disables watchdog. |
652 | */ |
653 | static void wdt_disable(void) |
654 | { |
655 | unsigned char i2c_data[2], i2c_buf[0x10]; |
656 | struct i2c_msg msgs0[2] = { |
657 | { |
658 | .addr = save_client->addr, |
659 | .flags = 0, |
660 | .len = 1, |
661 | .buf = i2c_data, |
662 | }, |
663 | { |
664 | .addr = save_client->addr, |
665 | .flags = I2C_M_RD, |
666 | .len = 1, |
667 | .buf = i2c_buf, |
668 | }, |
669 | }; |
670 | struct i2c_msg msgs1[1] = { |
671 | { |
672 | .addr = save_client->addr, |
673 | .flags = 0, |
674 | .len = 2, |
675 | .buf = i2c_data, |
676 | }, |
677 | }; |
678 | |
679 | i2c_data[0] = 0x09; |
680 | i2c_transfer(adap: save_client->adapter, msgs: msgs0, num: 2); |
681 | |
682 | i2c_data[0] = 0x09; |
683 | i2c_data[1] = 0x00; |
684 | i2c_transfer(adap: save_client->adapter, msgs: msgs1, num: 1); |
685 | } |
686 | |
687 | /** |
688 | * wdt_write - write to watchdog. |
689 | * @file: file handle to the watchdog |
690 | * @buf: buffer to write (unused as data does not matter here |
691 | * @count: count of bytes |
692 | * @ppos: pointer to the position to write. No seeks allowed |
693 | * |
694 | * A write to a watchdog device is defined as a keepalive signal. Any |
695 | * write of data will do, as we don't define content meaning. |
696 | */ |
697 | static ssize_t wdt_write(struct file *file, const char __user *buf, |
698 | size_t count, loff_t *ppos) |
699 | { |
700 | if (count) { |
701 | wdt_ping(); |
702 | return 1; |
703 | } |
704 | return 0; |
705 | } |
706 | |
707 | static ssize_t wdt_read(struct file *file, char __user *buf, |
708 | size_t count, loff_t *ppos) |
709 | { |
710 | return 0; |
711 | } |
712 | |
713 | /** |
714 | * wdt_ioctl - ioctl handler to set watchdog. |
715 | * @file: file handle to the device |
716 | * @cmd: watchdog command |
717 | * @arg: argument pointer |
718 | * |
719 | * The watchdog API defines a common set of functions for all watchdogs |
720 | * according to their available features. We only actually usefully support |
721 | * querying capabilities and current status. |
722 | */ |
723 | static int wdt_ioctl(struct file *file, unsigned int cmd, |
724 | unsigned long arg) |
725 | { |
726 | int new_margin, rv; |
727 | static struct watchdog_info ident = { |
728 | .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | |
729 | WDIOF_SETTIMEOUT, |
730 | .firmware_version = 1, |
731 | .identity = "M41T80 WTD" |
732 | }; |
733 | |
734 | switch (cmd) { |
735 | case WDIOC_GETSUPPORT: |
736 | return copy_to_user(to: (struct watchdog_info __user *)arg, from: &ident, |
737 | n: sizeof(ident)) ? -EFAULT : 0; |
738 | |
739 | case WDIOC_GETSTATUS: |
740 | case WDIOC_GETBOOTSTATUS: |
741 | return put_user(boot_flag, (int __user *)arg); |
742 | case WDIOC_KEEPALIVE: |
743 | wdt_ping(); |
744 | return 0; |
745 | case WDIOC_SETTIMEOUT: |
746 | if (get_user(new_margin, (int __user *)arg)) |
747 | return -EFAULT; |
748 | /* Arbitrary, can't find the card's limits */ |
749 | if (new_margin < 1 || new_margin > 124) |
750 | return -EINVAL; |
751 | wdt_margin = new_margin; |
752 | wdt_ping(); |
753 | fallthrough; |
754 | case WDIOC_GETTIMEOUT: |
755 | return put_user(wdt_margin, (int __user *)arg); |
756 | |
757 | case WDIOC_SETOPTIONS: |
758 | if (copy_from_user(to: &rv, from: (int __user *)arg, n: sizeof(int))) |
759 | return -EFAULT; |
760 | |
761 | if (rv & WDIOS_DISABLECARD) { |
762 | pr_info("disable watchdog\n" ); |
763 | wdt_disable(); |
764 | } |
765 | |
766 | if (rv & WDIOS_ENABLECARD) { |
767 | pr_info("enable watchdog\n" ); |
768 | wdt_ping(); |
769 | } |
770 | |
771 | return -EINVAL; |
772 | } |
773 | return -ENOTTY; |
774 | } |
775 | |
776 | static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, |
777 | unsigned long arg) |
778 | { |
779 | int ret; |
780 | |
781 | mutex_lock(&m41t80_rtc_mutex); |
782 | ret = wdt_ioctl(file, cmd, arg); |
783 | mutex_unlock(lock: &m41t80_rtc_mutex); |
784 | |
785 | return ret; |
786 | } |
787 | |
788 | /** |
789 | * wdt_open - open a watchdog. |
790 | * @inode: inode of device |
791 | * @file: file handle to device |
792 | * |
793 | */ |
794 | static int wdt_open(struct inode *inode, struct file *file) |
795 | { |
796 | if (iminor(inode) == WATCHDOG_MINOR) { |
797 | mutex_lock(&m41t80_rtc_mutex); |
798 | if (test_and_set_bit(nr: 0, addr: &wdt_is_open)) { |
799 | mutex_unlock(lock: &m41t80_rtc_mutex); |
800 | return -EBUSY; |
801 | } |
802 | /* |
803 | * Activate |
804 | */ |
805 | wdt_is_open = 1; |
806 | mutex_unlock(lock: &m41t80_rtc_mutex); |
807 | return stream_open(inode, filp: file); |
808 | } |
809 | return -ENODEV; |
810 | } |
811 | |
812 | /** |
813 | * wdt_release - release a watchdog. |
814 | * @inode: inode to board |
815 | * @file: file handle to board |
816 | * |
817 | */ |
818 | static int wdt_release(struct inode *inode, struct file *file) |
819 | { |
820 | if (iminor(inode) == WATCHDOG_MINOR) |
821 | clear_bit(nr: 0, addr: &wdt_is_open); |
822 | return 0; |
823 | } |
824 | |
825 | /** |
826 | * wdt_notify_sys - notify to watchdog. |
827 | * @this: our notifier block |
828 | * @code: the event being reported |
829 | * @unused: unused |
830 | * |
831 | * Our notifier is called on system shutdowns. We want to turn the card |
832 | * off at reboot otherwise the machine will reboot again during memory |
833 | * test or worse yet during the following fsck. This would suck, in fact |
834 | * trust me - if it happens it does suck. |
835 | */ |
836 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, |
837 | void *unused) |
838 | { |
839 | if (code == SYS_DOWN || code == SYS_HALT) |
840 | /* Disable Watchdog */ |
841 | wdt_disable(); |
842 | return NOTIFY_DONE; |
843 | } |
844 | |
845 | static const struct file_operations wdt_fops = { |
846 | .owner = THIS_MODULE, |
847 | .read = wdt_read, |
848 | .unlocked_ioctl = wdt_unlocked_ioctl, |
849 | .compat_ioctl = compat_ptr_ioctl, |
850 | .write = wdt_write, |
851 | .open = wdt_open, |
852 | .release = wdt_release, |
853 | .llseek = no_llseek, |
854 | }; |
855 | |
856 | static struct miscdevice wdt_dev = { |
857 | .minor = WATCHDOG_MINOR, |
858 | .name = "watchdog" , |
859 | .fops = &wdt_fops, |
860 | }; |
861 | |
862 | /* |
863 | * The WDT card needs to learn about soft shutdowns in order to |
864 | * turn the timebomb registers off. |
865 | */ |
866 | static struct notifier_block wdt_notifier = { |
867 | .notifier_call = wdt_notify_sys, |
868 | }; |
869 | #endif /* CONFIG_RTC_DRV_M41T80_WDT */ |
870 | |
871 | /* |
872 | ***************************************************************************** |
873 | * |
874 | * Driver Interface |
875 | * |
876 | ***************************************************************************** |
877 | */ |
878 | |
879 | static int m41t80_probe(struct i2c_client *client) |
880 | { |
881 | struct i2c_adapter *adapter = client->adapter; |
882 | int rc = 0; |
883 | struct rtc_time tm; |
884 | struct m41t80_data *m41t80_data = NULL; |
885 | bool wakeup_source = false; |
886 | |
887 | if (!i2c_check_functionality(adap: client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
888 | I2C_FUNC_SMBUS_BYTE_DATA)) { |
889 | dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n" ); |
890 | return -ENODEV; |
891 | } |
892 | |
893 | m41t80_data = devm_kzalloc(dev: &client->dev, size: sizeof(*m41t80_data), |
894 | GFP_KERNEL); |
895 | if (!m41t80_data) |
896 | return -ENOMEM; |
897 | |
898 | m41t80_data->client = client; |
899 | if (client->dev.of_node) { |
900 | m41t80_data->features = (unsigned long) |
901 | of_device_get_match_data(dev: &client->dev); |
902 | } else { |
903 | const struct i2c_device_id *id = i2c_match_id(id: m41t80_id, client); |
904 | m41t80_data->features = id->driver_data; |
905 | } |
906 | i2c_set_clientdata(client, data: m41t80_data); |
907 | |
908 | m41t80_data->rtc = devm_rtc_allocate_device(dev: &client->dev); |
909 | if (IS_ERR(ptr: m41t80_data->rtc)) |
910 | return PTR_ERR(ptr: m41t80_data->rtc); |
911 | |
912 | #ifdef CONFIG_OF |
913 | wakeup_source = of_property_read_bool(np: client->dev.of_node, |
914 | propname: "wakeup-source" ); |
915 | #endif |
916 | if (client->irq > 0) { |
917 | unsigned long irqflags = IRQF_TRIGGER_LOW; |
918 | |
919 | if (dev_fwnode(&client->dev)) |
920 | irqflags = 0; |
921 | |
922 | rc = devm_request_threaded_irq(dev: &client->dev, irq: client->irq, |
923 | NULL, thread_fn: m41t80_handle_irq, |
924 | irqflags: irqflags | IRQF_ONESHOT, |
925 | devname: "m41t80" , dev_id: client); |
926 | if (rc) { |
927 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n" ); |
928 | client->irq = 0; |
929 | wakeup_source = false; |
930 | } |
931 | } |
932 | if (client->irq > 0 || wakeup_source) |
933 | device_init_wakeup(dev: &client->dev, enable: true); |
934 | else |
935 | clear_bit(RTC_FEATURE_ALARM, addr: m41t80_data->rtc->features); |
936 | |
937 | m41t80_data->rtc->ops = &m41t80_rtc_ops; |
938 | m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
939 | m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099; |
940 | |
941 | if (client->irq <= 0) |
942 | clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, addr: m41t80_data->rtc->features); |
943 | |
944 | /* Make sure HT (Halt Update) bit is cleared */ |
945 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); |
946 | |
947 | if (rc >= 0 && rc & M41T80_ALHOUR_HT) { |
948 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
949 | m41t80_rtc_read_time(dev: &client->dev, tm: &tm); |
950 | dev_info(&client->dev, "HT bit was set!\n" ); |
951 | dev_info(&client->dev, "Power Down at %ptR\n" , &tm); |
952 | } |
953 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, |
954 | value: rc & ~M41T80_ALHOUR_HT); |
955 | } |
956 | |
957 | if (rc < 0) { |
958 | dev_err(&client->dev, "Can't clear HT bit\n" ); |
959 | return rc; |
960 | } |
961 | |
962 | /* Make sure ST (stop) bit is cleared */ |
963 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); |
964 | |
965 | if (rc >= 0 && rc & M41T80_SEC_ST) |
966 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, |
967 | value: rc & ~M41T80_SEC_ST); |
968 | if (rc < 0) { |
969 | dev_err(&client->dev, "Can't clear ST bit\n" ); |
970 | return rc; |
971 | } |
972 | |
973 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
974 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
975 | save_client = client; |
976 | rc = misc_register(misc: &wdt_dev); |
977 | if (rc) |
978 | return rc; |
979 | rc = register_reboot_notifier(&wdt_notifier); |
980 | if (rc) { |
981 | misc_deregister(misc: &wdt_dev); |
982 | return rc; |
983 | } |
984 | } |
985 | #endif |
986 | #ifdef CONFIG_COMMON_CLK |
987 | if (m41t80_data->features & M41T80_FEATURE_SQ) |
988 | m41t80_sqw_register_clk(m41t80: m41t80_data); |
989 | #endif |
990 | |
991 | rc = devm_rtc_register_device(m41t80_data->rtc); |
992 | if (rc) |
993 | return rc; |
994 | |
995 | return 0; |
996 | } |
997 | |
998 | static void m41t80_remove(struct i2c_client *client) |
999 | { |
1000 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
1001 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
1002 | |
1003 | if (clientdata->features & M41T80_FEATURE_HT) { |
1004 | misc_deregister(misc: &wdt_dev); |
1005 | unregister_reboot_notifier(&wdt_notifier); |
1006 | } |
1007 | #endif |
1008 | } |
1009 | |
1010 | static struct i2c_driver m41t80_driver = { |
1011 | .driver = { |
1012 | .name = "rtc-m41t80" , |
1013 | .of_match_table = of_match_ptr(m41t80_of_match), |
1014 | .pm = &m41t80_pm, |
1015 | }, |
1016 | .probe = m41t80_probe, |
1017 | .remove = m41t80_remove, |
1018 | .id_table = m41t80_id, |
1019 | }; |
1020 | |
1021 | module_i2c_driver(m41t80_driver); |
1022 | |
1023 | MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>" ); |
1024 | MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver" ); |
1025 | MODULE_LICENSE("GPL" ); |
1026 | |