1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * RTC driver for the Micro Crystal RV3028 |
4 | * |
5 | * Copyright (C) 2019 Micro Crystal SA |
6 | * |
7 | * Alexandre Belloni <alexandre.belloni@bootlin.com> |
8 | * |
9 | */ |
10 | |
11 | #include <linux/clk-provider.h> |
12 | #include <linux/bcd.h> |
13 | #include <linux/bitfield.h> |
14 | #include <linux/bitops.h> |
15 | #include <linux/i2c.h> |
16 | #include <linux/interrupt.h> |
17 | #include <linux/kernel.h> |
18 | #include <linux/log2.h> |
19 | #include <linux/module.h> |
20 | #include <linux/of.h> |
21 | #include <linux/regmap.h> |
22 | #include <linux/rtc.h> |
23 | |
24 | #define RV3028_SEC 0x00 |
25 | #define RV3028_MIN 0x01 |
26 | #define RV3028_HOUR 0x02 |
27 | #define RV3028_WDAY 0x03 |
28 | #define RV3028_DAY 0x04 |
29 | #define RV3028_MONTH 0x05 |
30 | #define RV3028_YEAR 0x06 |
31 | #define RV3028_ALARM_MIN 0x07 |
32 | #define RV3028_ALARM_HOUR 0x08 |
33 | #define RV3028_ALARM_DAY 0x09 |
34 | #define RV3028_STATUS 0x0E |
35 | #define RV3028_CTRL1 0x0F |
36 | #define RV3028_CTRL2 0x10 |
37 | #define RV3028_EVT_CTRL 0x13 |
38 | #define RV3028_TS_COUNT 0x14 |
39 | #define RV3028_TS_SEC 0x15 |
40 | #define RV3028_RAM1 0x1F |
41 | #define RV3028_EEPROM_ADDR 0x25 |
42 | #define RV3028_EEPROM_DATA 0x26 |
43 | #define RV3028_EEPROM_CMD 0x27 |
44 | #define RV3028_CLKOUT 0x35 |
45 | #define RV3028_OFFSET 0x36 |
46 | #define RV3028_BACKUP 0x37 |
47 | |
48 | #define RV3028_STATUS_PORF BIT(0) |
49 | #define RV3028_STATUS_EVF BIT(1) |
50 | #define RV3028_STATUS_AF BIT(2) |
51 | #define RV3028_STATUS_TF BIT(3) |
52 | #define RV3028_STATUS_UF BIT(4) |
53 | #define RV3028_STATUS_BSF BIT(5) |
54 | #define RV3028_STATUS_CLKF BIT(6) |
55 | #define RV3028_STATUS_EEBUSY BIT(7) |
56 | |
57 | #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0) |
58 | #define RV3028_CLKOUT_PORIE BIT(3) |
59 | #define RV3028_CLKOUT_CLKSY BIT(6) |
60 | #define RV3028_CLKOUT_CLKOE BIT(7) |
61 | |
62 | #define RV3028_CTRL1_EERD BIT(3) |
63 | #define RV3028_CTRL1_WADA BIT(5) |
64 | |
65 | #define RV3028_CTRL2_RESET BIT(0) |
66 | #define RV3028_CTRL2_12_24 BIT(1) |
67 | #define RV3028_CTRL2_EIE BIT(2) |
68 | #define RV3028_CTRL2_AIE BIT(3) |
69 | #define RV3028_CTRL2_TIE BIT(4) |
70 | #define RV3028_CTRL2_UIE BIT(5) |
71 | #define RV3028_CTRL2_TSE BIT(7) |
72 | |
73 | #define RV3028_EVT_CTRL_TSR BIT(2) |
74 | |
75 | #define RV3028_EEPROM_CMD_UPDATE 0x11 |
76 | #define RV3028_EEPROM_CMD_WRITE 0x21 |
77 | #define RV3028_EEPROM_CMD_READ 0x22 |
78 | |
79 | #define RV3028_EEBUSY_POLL 10000 |
80 | #define RV3028_EEBUSY_TIMEOUT 100000 |
81 | |
82 | #define RV3028_BACKUP_TCE BIT(5) |
83 | #define RV3028_BACKUP_TCR_MASK GENMASK(1,0) |
84 | #define RV3028_BACKUP_BSM GENMASK(3,2) |
85 | |
86 | #define RV3028_BACKUP_BSM_DSM 0x1 |
87 | #define RV3028_BACKUP_BSM_LSM 0x3 |
88 | |
89 | #define OFFSET_STEP_PPT 953674 |
90 | |
91 | enum rv3028_type { |
92 | rv_3028, |
93 | }; |
94 | |
95 | struct rv3028_data { |
96 | struct regmap *regmap; |
97 | struct rtc_device *rtc; |
98 | enum rv3028_type type; |
99 | #ifdef CONFIG_COMMON_CLK |
100 | struct clk_hw clkout_hw; |
101 | #endif |
102 | }; |
103 | |
104 | static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000}; |
105 | |
106 | static ssize_t timestamp0_store(struct device *dev, |
107 | struct device_attribute *attr, |
108 | const char *buf, size_t count) |
109 | { |
110 | struct rv3028_data *rv3028 = dev_get_drvdata(dev: dev->parent); |
111 | |
112 | regmap_update_bits(map: rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, |
113 | RV3028_EVT_CTRL_TSR); |
114 | |
115 | return count; |
116 | }; |
117 | |
118 | static ssize_t timestamp0_show(struct device *dev, |
119 | struct device_attribute *attr, char *buf) |
120 | { |
121 | struct rv3028_data *rv3028 = dev_get_drvdata(dev: dev->parent); |
122 | struct rtc_time tm; |
123 | int ret, count; |
124 | u8 date[6]; |
125 | |
126 | ret = regmap_read(map: rv3028->regmap, RV3028_TS_COUNT, val: &count); |
127 | if (ret) |
128 | return ret; |
129 | |
130 | if (!count) |
131 | return 0; |
132 | |
133 | ret = regmap_bulk_read(map: rv3028->regmap, RV3028_TS_SEC, val: date, |
134 | val_count: sizeof(date)); |
135 | if (ret) |
136 | return ret; |
137 | |
138 | tm.tm_sec = bcd2bin(date[0]); |
139 | tm.tm_min = bcd2bin(date[1]); |
140 | tm.tm_hour = bcd2bin(date[2]); |
141 | tm.tm_mday = bcd2bin(date[3]); |
142 | tm.tm_mon = bcd2bin(date[4]) - 1; |
143 | tm.tm_year = bcd2bin(date[5]) + 100; |
144 | |
145 | ret = rtc_valid_tm(tm: &tm); |
146 | if (ret) |
147 | return ret; |
148 | |
149 | return sprintf(buf, fmt: "%llu\n" , |
150 | (unsigned long long)rtc_tm_to_time64(tm: &tm)); |
151 | }; |
152 | |
153 | static DEVICE_ATTR_RW(timestamp0); |
154 | |
155 | static ssize_t timestamp0_count_show(struct device *dev, |
156 | struct device_attribute *attr, char *buf) |
157 | { |
158 | struct rv3028_data *rv3028 = dev_get_drvdata(dev: dev->parent); |
159 | int ret, count; |
160 | |
161 | ret = regmap_read(map: rv3028->regmap, RV3028_TS_COUNT, val: &count); |
162 | if (ret) |
163 | return ret; |
164 | |
165 | return sprintf(buf, fmt: "%u\n" , count); |
166 | }; |
167 | |
168 | static DEVICE_ATTR_RO(timestamp0_count); |
169 | |
170 | static struct attribute *rv3028_attrs[] = { |
171 | &dev_attr_timestamp0.attr, |
172 | &dev_attr_timestamp0_count.attr, |
173 | NULL |
174 | }; |
175 | |
176 | static const struct attribute_group rv3028_attr_group = { |
177 | .attrs = rv3028_attrs, |
178 | }; |
179 | |
180 | static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd) |
181 | { |
182 | if (eerd) |
183 | return 0; |
184 | |
185 | return regmap_update_bits(map: rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, val: 0); |
186 | } |
187 | |
188 | static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd) |
189 | { |
190 | u32 ctrl1, status; |
191 | int ret; |
192 | |
193 | ret = regmap_read(map: rv3028->regmap, RV3028_CTRL1, val: &ctrl1); |
194 | if (ret) |
195 | return ret; |
196 | |
197 | *eerd = ctrl1 & RV3028_CTRL1_EERD; |
198 | if (*eerd) |
199 | return 0; |
200 | |
201 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL1, |
202 | RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); |
203 | if (ret) |
204 | return ret; |
205 | |
206 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
207 | !(status & RV3028_STATUS_EEBUSY), |
208 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
209 | if (ret) { |
210 | rv3028_exit_eerd(rv3028, eerd: *eerd); |
211 | |
212 | return ret; |
213 | } |
214 | |
215 | return 0; |
216 | } |
217 | |
218 | static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd) |
219 | { |
220 | u32 status; |
221 | int ret; |
222 | |
223 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, val: 0x0); |
224 | if (ret) |
225 | goto exit_eerd; |
226 | |
227 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE); |
228 | if (ret) |
229 | goto exit_eerd; |
230 | |
231 | usleep_range(min: 63000, RV3028_EEBUSY_TIMEOUT); |
232 | |
233 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
234 | !(status & RV3028_STATUS_EEBUSY), |
235 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
236 | |
237 | exit_eerd: |
238 | rv3028_exit_eerd(rv3028, eerd); |
239 | |
240 | return ret; |
241 | } |
242 | |
243 | static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg, |
244 | unsigned int mask, unsigned int val) |
245 | { |
246 | u32 eerd; |
247 | int ret; |
248 | |
249 | ret = rv3028_enter_eerd(rv3028, eerd: &eerd); |
250 | if (ret) |
251 | return ret; |
252 | |
253 | ret = regmap_update_bits(map: rv3028->regmap, reg, mask, val); |
254 | if (ret) { |
255 | rv3028_exit_eerd(rv3028, eerd); |
256 | return ret; |
257 | } |
258 | |
259 | return rv3028_update_eeprom(rv3028, eerd); |
260 | } |
261 | |
262 | static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) |
263 | { |
264 | struct rv3028_data *rv3028 = dev_id; |
265 | unsigned long events = 0; |
266 | u32 status = 0, ctrl = 0; |
267 | |
268 | if (regmap_read(map: rv3028->regmap, RV3028_STATUS, val: &status) < 0 || |
269 | status == 0) { |
270 | return IRQ_NONE; |
271 | } |
272 | |
273 | status &= ~RV3028_STATUS_PORF; |
274 | |
275 | if (status & RV3028_STATUS_TF) { |
276 | status |= RV3028_STATUS_TF; |
277 | ctrl |= RV3028_CTRL2_TIE; |
278 | events |= RTC_PF; |
279 | } |
280 | |
281 | if (status & RV3028_STATUS_AF) { |
282 | status |= RV3028_STATUS_AF; |
283 | ctrl |= RV3028_CTRL2_AIE; |
284 | events |= RTC_AF; |
285 | } |
286 | |
287 | if (status & RV3028_STATUS_UF) { |
288 | status |= RV3028_STATUS_UF; |
289 | ctrl |= RV3028_CTRL2_UIE; |
290 | events |= RTC_UF; |
291 | } |
292 | |
293 | if (events) { |
294 | rtc_update_irq(rtc: rv3028->rtc, num: 1, events); |
295 | regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, mask: status, val: 0); |
296 | regmap_update_bits(map: rv3028->regmap, RV3028_CTRL2, mask: ctrl, val: 0); |
297 | } |
298 | |
299 | if (status & RV3028_STATUS_EVF) { |
300 | sysfs_notify(kobj: &rv3028->rtc->dev.kobj, NULL, |
301 | attr: dev_attr_timestamp0.attr.name); |
302 | dev_warn(&rv3028->rtc->dev, "event detected" ); |
303 | } |
304 | |
305 | return IRQ_HANDLED; |
306 | } |
307 | |
308 | static int rv3028_get_time(struct device *dev, struct rtc_time *tm) |
309 | { |
310 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
311 | u8 date[7]; |
312 | int ret, status; |
313 | |
314 | ret = regmap_read(map: rv3028->regmap, RV3028_STATUS, val: &status); |
315 | if (ret < 0) |
316 | return ret; |
317 | |
318 | if (status & RV3028_STATUS_PORF) |
319 | return -EINVAL; |
320 | |
321 | ret = regmap_bulk_read(map: rv3028->regmap, RV3028_SEC, val: date, val_count: sizeof(date)); |
322 | if (ret) |
323 | return ret; |
324 | |
325 | tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f); |
326 | tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f); |
327 | tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f); |
328 | tm->tm_wday = date[RV3028_WDAY] & 0x7f; |
329 | tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f); |
330 | tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1; |
331 | tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100; |
332 | |
333 | return 0; |
334 | } |
335 | |
336 | static int rv3028_set_time(struct device *dev, struct rtc_time *tm) |
337 | { |
338 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
339 | u8 date[7]; |
340 | int ret; |
341 | |
342 | date[RV3028_SEC] = bin2bcd(tm->tm_sec); |
343 | date[RV3028_MIN] = bin2bcd(tm->tm_min); |
344 | date[RV3028_HOUR] = bin2bcd(tm->tm_hour); |
345 | date[RV3028_WDAY] = tm->tm_wday; |
346 | date[RV3028_DAY] = bin2bcd(tm->tm_mday); |
347 | date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1); |
348 | date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100); |
349 | |
350 | /* |
351 | * Writing to the Seconds register has the same effect as setting RESET |
352 | * bit to 1 |
353 | */ |
354 | ret = regmap_bulk_write(map: rv3028->regmap, RV3028_SEC, val: date, |
355 | val_count: sizeof(date)); |
356 | if (ret) |
357 | return ret; |
358 | |
359 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, |
360 | RV3028_STATUS_PORF, val: 0); |
361 | |
362 | return ret; |
363 | } |
364 | |
365 | static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
366 | { |
367 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
368 | u8 alarmvals[3]; |
369 | int status, ctrl, ret; |
370 | |
371 | ret = regmap_bulk_read(map: rv3028->regmap, RV3028_ALARM_MIN, val: alarmvals, |
372 | val_count: sizeof(alarmvals)); |
373 | if (ret) |
374 | return ret; |
375 | |
376 | ret = regmap_read(map: rv3028->regmap, RV3028_STATUS, val: &status); |
377 | if (ret < 0) |
378 | return ret; |
379 | |
380 | ret = regmap_read(map: rv3028->regmap, RV3028_CTRL2, val: &ctrl); |
381 | if (ret < 0) |
382 | return ret; |
383 | |
384 | alrm->time.tm_sec = 0; |
385 | alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); |
386 | alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); |
387 | alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); |
388 | |
389 | alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE); |
390 | alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled; |
391 | |
392 | return 0; |
393 | } |
394 | |
395 | static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
396 | { |
397 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
398 | u8 alarmvals[3]; |
399 | u8 ctrl = 0; |
400 | int ret; |
401 | |
402 | /* The alarm has no seconds, round up to nearest minute */ |
403 | if (alrm->time.tm_sec) { |
404 | time64_t alarm_time = rtc_tm_to_time64(tm: &alrm->time); |
405 | |
406 | alarm_time += 60 - alrm->time.tm_sec; |
407 | rtc_time64_to_tm(time: alarm_time, tm: &alrm->time); |
408 | } |
409 | |
410 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL2, |
411 | RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, val: 0); |
412 | if (ret) |
413 | return ret; |
414 | |
415 | alarmvals[0] = bin2bcd(alrm->time.tm_min); |
416 | alarmvals[1] = bin2bcd(alrm->time.tm_hour); |
417 | alarmvals[2] = bin2bcd(alrm->time.tm_mday); |
418 | |
419 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, |
420 | RV3028_STATUS_AF, val: 0); |
421 | if (ret) |
422 | return ret; |
423 | |
424 | ret = regmap_bulk_write(map: rv3028->regmap, RV3028_ALARM_MIN, val: alarmvals, |
425 | val_count: sizeof(alarmvals)); |
426 | if (ret) |
427 | return ret; |
428 | |
429 | if (alrm->enabled) { |
430 | if (rv3028->rtc->uie_rtctimer.enabled) |
431 | ctrl |= RV3028_CTRL2_UIE; |
432 | if (rv3028->rtc->aie_timer.enabled) |
433 | ctrl |= RV3028_CTRL2_AIE; |
434 | } |
435 | |
436 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL2, |
437 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, val: ctrl); |
438 | |
439 | return ret; |
440 | } |
441 | |
442 | static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled) |
443 | { |
444 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
445 | int ctrl = 0, ret; |
446 | |
447 | if (enabled) { |
448 | if (rv3028->rtc->uie_rtctimer.enabled) |
449 | ctrl |= RV3028_CTRL2_UIE; |
450 | if (rv3028->rtc->aie_timer.enabled) |
451 | ctrl |= RV3028_CTRL2_AIE; |
452 | } |
453 | |
454 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, |
455 | RV3028_STATUS_AF | RV3028_STATUS_UF, val: 0); |
456 | if (ret) |
457 | return ret; |
458 | |
459 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL2, |
460 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, val: ctrl); |
461 | if (ret) |
462 | return ret; |
463 | |
464 | return 0; |
465 | } |
466 | |
467 | static int rv3028_read_offset(struct device *dev, long *offset) |
468 | { |
469 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
470 | int ret, value, steps; |
471 | |
472 | ret = regmap_read(map: rv3028->regmap, RV3028_OFFSET, val: &value); |
473 | if (ret < 0) |
474 | return ret; |
475 | |
476 | steps = sign_extend32(value: value << 1, index: 8); |
477 | |
478 | ret = regmap_read(map: rv3028->regmap, RV3028_BACKUP, val: &value); |
479 | if (ret < 0) |
480 | return ret; |
481 | |
482 | steps += value >> 7; |
483 | |
484 | *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); |
485 | |
486 | return 0; |
487 | } |
488 | |
489 | static int rv3028_set_offset(struct device *dev, long offset) |
490 | { |
491 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
492 | u32 eerd; |
493 | int ret; |
494 | |
495 | offset = clamp(offset, -244141L, 243187L) * 1000; |
496 | offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); |
497 | |
498 | ret = rv3028_enter_eerd(rv3028, eerd: &eerd); |
499 | if (ret) |
500 | return ret; |
501 | |
502 | ret = regmap_write(map: rv3028->regmap, RV3028_OFFSET, val: offset >> 1); |
503 | if (ret < 0) |
504 | goto exit_eerd; |
505 | |
506 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_BACKUP, BIT(7), |
507 | val: offset << 7); |
508 | if (ret < 0) |
509 | goto exit_eerd; |
510 | |
511 | return rv3028_update_eeprom(rv3028, eerd); |
512 | |
513 | exit_eerd: |
514 | rv3028_exit_eerd(rv3028, eerd); |
515 | |
516 | return ret; |
517 | |
518 | } |
519 | |
520 | static int rv3028_param_get(struct device *dev, struct rtc_param *param) |
521 | { |
522 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
523 | int ret; |
524 | u32 value; |
525 | |
526 | switch(param->param) { |
527 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
528 | ret = regmap_read(map: rv3028->regmap, RV3028_BACKUP, val: &value); |
529 | if (ret < 0) |
530 | return ret; |
531 | |
532 | value = FIELD_GET(RV3028_BACKUP_BSM, value); |
533 | |
534 | switch(value) { |
535 | case RV3028_BACKUP_BSM_DSM: |
536 | param->uvalue = RTC_BSM_DIRECT; |
537 | break; |
538 | case RV3028_BACKUP_BSM_LSM: |
539 | param->uvalue = RTC_BSM_LEVEL; |
540 | break; |
541 | default: |
542 | param->uvalue = RTC_BSM_DISABLED; |
543 | } |
544 | break; |
545 | |
546 | default: |
547 | return -EINVAL; |
548 | } |
549 | |
550 | return 0; |
551 | } |
552 | |
553 | static int rv3028_param_set(struct device *dev, struct rtc_param *param) |
554 | { |
555 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
556 | u8 mode; |
557 | |
558 | switch(param->param) { |
559 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
560 | switch (param->uvalue) { |
561 | case RTC_BSM_DISABLED: |
562 | mode = 0; |
563 | break; |
564 | case RTC_BSM_DIRECT: |
565 | mode = RV3028_BACKUP_BSM_DSM; |
566 | break; |
567 | case RTC_BSM_LEVEL: |
568 | mode = RV3028_BACKUP_BSM_LSM; |
569 | break; |
570 | default: |
571 | return -EINVAL; |
572 | } |
573 | |
574 | return rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_BSM, |
575 | FIELD_PREP(RV3028_BACKUP_BSM, mode)); |
576 | |
577 | default: |
578 | return -EINVAL; |
579 | } |
580 | |
581 | return 0; |
582 | } |
583 | |
584 | static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
585 | { |
586 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
587 | int status, ret = 0; |
588 | |
589 | switch (cmd) { |
590 | case RTC_VL_READ: |
591 | ret = regmap_read(map: rv3028->regmap, RV3028_STATUS, val: &status); |
592 | if (ret < 0) |
593 | return ret; |
594 | |
595 | status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0; |
596 | return put_user(status, (unsigned int __user *)arg); |
597 | |
598 | default: |
599 | return -ENOIOCTLCMD; |
600 | } |
601 | } |
602 | |
603 | static int rv3028_nvram_write(void *priv, unsigned int offset, void *val, |
604 | size_t bytes) |
605 | { |
606 | return regmap_bulk_write(map: priv, RV3028_RAM1 + offset, val, val_count: bytes); |
607 | } |
608 | |
609 | static int rv3028_nvram_read(void *priv, unsigned int offset, void *val, |
610 | size_t bytes) |
611 | { |
612 | return regmap_bulk_read(map: priv, RV3028_RAM1 + offset, val, val_count: bytes); |
613 | } |
614 | |
615 | static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, |
616 | size_t bytes) |
617 | { |
618 | struct rv3028_data *rv3028 = priv; |
619 | u32 status, eerd; |
620 | int i, ret; |
621 | u8 *buf = val; |
622 | |
623 | ret = rv3028_enter_eerd(rv3028, eerd: &eerd); |
624 | if (ret) |
625 | return ret; |
626 | |
627 | for (i = 0; i < bytes; i++) { |
628 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_ADDR, val: offset + i); |
629 | if (ret) |
630 | goto restore_eerd; |
631 | |
632 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_DATA, val: buf[i]); |
633 | if (ret) |
634 | goto restore_eerd; |
635 | |
636 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, val: 0x0); |
637 | if (ret) |
638 | goto restore_eerd; |
639 | |
640 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, |
641 | RV3028_EEPROM_CMD_WRITE); |
642 | if (ret) |
643 | goto restore_eerd; |
644 | |
645 | usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
646 | |
647 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
648 | !(status & RV3028_STATUS_EEBUSY), |
649 | RV3028_EEBUSY_POLL, |
650 | RV3028_EEBUSY_TIMEOUT); |
651 | if (ret) |
652 | goto restore_eerd; |
653 | } |
654 | |
655 | restore_eerd: |
656 | rv3028_exit_eerd(rv3028, eerd); |
657 | |
658 | return ret; |
659 | } |
660 | |
661 | static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, |
662 | size_t bytes) |
663 | { |
664 | struct rv3028_data *rv3028 = priv; |
665 | u32 status, eerd, data; |
666 | int i, ret; |
667 | u8 *buf = val; |
668 | |
669 | ret = rv3028_enter_eerd(rv3028, eerd: &eerd); |
670 | if (ret) |
671 | return ret; |
672 | |
673 | for (i = 0; i < bytes; i++) { |
674 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_ADDR, val: offset + i); |
675 | if (ret) |
676 | goto restore_eerd; |
677 | |
678 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, val: 0x0); |
679 | if (ret) |
680 | goto restore_eerd; |
681 | |
682 | ret = regmap_write(map: rv3028->regmap, RV3028_EEPROM_CMD, |
683 | RV3028_EEPROM_CMD_READ); |
684 | if (ret) |
685 | goto restore_eerd; |
686 | |
687 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
688 | !(status & RV3028_STATUS_EEBUSY), |
689 | RV3028_EEBUSY_POLL, |
690 | RV3028_EEBUSY_TIMEOUT); |
691 | if (ret) |
692 | goto restore_eerd; |
693 | |
694 | ret = regmap_read(map: rv3028->regmap, RV3028_EEPROM_DATA, val: &data); |
695 | if (ret) |
696 | goto restore_eerd; |
697 | buf[i] = data; |
698 | } |
699 | |
700 | restore_eerd: |
701 | rv3028_exit_eerd(rv3028, eerd); |
702 | |
703 | return ret; |
704 | } |
705 | |
706 | #ifdef CONFIG_COMMON_CLK |
707 | #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw) |
708 | |
709 | static int clkout_rates[] = { |
710 | 32768, |
711 | 8192, |
712 | 1024, |
713 | 64, |
714 | 32, |
715 | 1, |
716 | }; |
717 | |
718 | static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw, |
719 | unsigned long parent_rate) |
720 | { |
721 | int clkout, ret; |
722 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
723 | |
724 | ret = regmap_read(map: rv3028->regmap, RV3028_CLKOUT, val: &clkout); |
725 | if (ret < 0) |
726 | return 0; |
727 | |
728 | clkout &= RV3028_CLKOUT_FD_MASK; |
729 | return clkout_rates[clkout]; |
730 | } |
731 | |
732 | static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate, |
733 | unsigned long *prate) |
734 | { |
735 | int i; |
736 | |
737 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
738 | if (clkout_rates[i] <= rate) |
739 | return clkout_rates[i]; |
740 | |
741 | return 0; |
742 | } |
743 | |
744 | static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate, |
745 | unsigned long parent_rate) |
746 | { |
747 | int i, ret; |
748 | u32 enabled; |
749 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
750 | |
751 | ret = regmap_read(map: rv3028->regmap, RV3028_CLKOUT, val: &enabled); |
752 | if (ret < 0) |
753 | return ret; |
754 | |
755 | ret = regmap_write(map: rv3028->regmap, RV3028_CLKOUT, val: 0x0); |
756 | if (ret < 0) |
757 | return ret; |
758 | |
759 | enabled &= RV3028_CLKOUT_CLKOE; |
760 | |
761 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
762 | if (clkout_rates[i] == rate) |
763 | return rv3028_update_cfg(rv3028, RV3028_CLKOUT, mask: 0xff, |
764 | RV3028_CLKOUT_CLKSY | enabled | i); |
765 | |
766 | return -EINVAL; |
767 | } |
768 | |
769 | static int rv3028_clkout_prepare(struct clk_hw *hw) |
770 | { |
771 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
772 | |
773 | return regmap_write(map: rv3028->regmap, RV3028_CLKOUT, |
774 | RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE); |
775 | } |
776 | |
777 | static void rv3028_clkout_unprepare(struct clk_hw *hw) |
778 | { |
779 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
780 | |
781 | regmap_write(map: rv3028->regmap, RV3028_CLKOUT, val: 0x0); |
782 | regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, |
783 | RV3028_STATUS_CLKF, val: 0); |
784 | } |
785 | |
786 | static int rv3028_clkout_is_prepared(struct clk_hw *hw) |
787 | { |
788 | int clkout, ret; |
789 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
790 | |
791 | ret = regmap_read(map: rv3028->regmap, RV3028_CLKOUT, val: &clkout); |
792 | if (ret < 0) |
793 | return ret; |
794 | |
795 | return !!(clkout & RV3028_CLKOUT_CLKOE); |
796 | } |
797 | |
798 | static const struct clk_ops rv3028_clkout_ops = { |
799 | .prepare = rv3028_clkout_prepare, |
800 | .unprepare = rv3028_clkout_unprepare, |
801 | .is_prepared = rv3028_clkout_is_prepared, |
802 | .recalc_rate = rv3028_clkout_recalc_rate, |
803 | .round_rate = rv3028_clkout_round_rate, |
804 | .set_rate = rv3028_clkout_set_rate, |
805 | }; |
806 | |
807 | static int rv3028_clkout_register_clk(struct rv3028_data *rv3028, |
808 | struct i2c_client *client) |
809 | { |
810 | int ret; |
811 | struct clk *clk; |
812 | struct clk_init_data init; |
813 | struct device_node *node = client->dev.of_node; |
814 | |
815 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_STATUS, |
816 | RV3028_STATUS_CLKF, val: 0); |
817 | if (ret < 0) |
818 | return ret; |
819 | |
820 | init.name = "rv3028-clkout" ; |
821 | init.ops = &rv3028_clkout_ops; |
822 | init.flags = 0; |
823 | init.parent_names = NULL; |
824 | init.num_parents = 0; |
825 | rv3028->clkout_hw.init = &init; |
826 | |
827 | /* optional override of the clockname */ |
828 | of_property_read_string(np: node, propname: "clock-output-names" , out_string: &init.name); |
829 | |
830 | /* register the clock */ |
831 | clk = devm_clk_register(dev: &client->dev, hw: &rv3028->clkout_hw); |
832 | if (!IS_ERR(ptr: clk)) |
833 | of_clk_add_provider(np: node, clk_src_get: of_clk_src_simple_get, data: clk); |
834 | |
835 | return 0; |
836 | } |
837 | #endif |
838 | |
839 | static const struct rtc_class_ops rv3028_rtc_ops = { |
840 | .read_time = rv3028_get_time, |
841 | .set_time = rv3028_set_time, |
842 | .read_alarm = rv3028_get_alarm, |
843 | .set_alarm = rv3028_set_alarm, |
844 | .alarm_irq_enable = rv3028_alarm_irq_enable, |
845 | .read_offset = rv3028_read_offset, |
846 | .set_offset = rv3028_set_offset, |
847 | .ioctl = rv3028_ioctl, |
848 | .param_get = rv3028_param_get, |
849 | .param_set = rv3028_param_set, |
850 | }; |
851 | |
852 | static const struct regmap_config regmap_config = { |
853 | .reg_bits = 8, |
854 | .val_bits = 8, |
855 | .max_register = 0x37, |
856 | }; |
857 | |
858 | static u8 rv3028_set_trickle_charger(struct rv3028_data *rv3028, |
859 | struct i2c_client *client) |
860 | { |
861 | int ret, val_old, val; |
862 | u32 ohms, chargeable; |
863 | |
864 | ret = regmap_read(map: rv3028->regmap, RV3028_BACKUP, val: &val_old); |
865 | if (ret < 0) |
866 | return ret; |
867 | |
868 | /* mask out only trickle charger bits */ |
869 | val_old = val_old & (RV3028_BACKUP_TCE | RV3028_BACKUP_TCR_MASK); |
870 | val = val_old; |
871 | |
872 | /* setup trickle charger */ |
873 | if (!device_property_read_u32(dev: &client->dev, propname: "trickle-resistor-ohms" , |
874 | val: &ohms)) { |
875 | int i; |
876 | |
877 | for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++) |
878 | if (ohms == rv3028_trickle_resistors[i]) |
879 | break; |
880 | |
881 | if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { |
882 | /* enable trickle charger and its resistor */ |
883 | val = RV3028_BACKUP_TCE | i; |
884 | } else { |
885 | dev_warn(&client->dev, "invalid trickle resistor value\n" ); |
886 | } |
887 | } |
888 | |
889 | if (!device_property_read_u32(dev: &client->dev, propname: "aux-voltage-chargeable" , |
890 | val: &chargeable)) { |
891 | switch (chargeable) { |
892 | case 0: |
893 | val &= ~RV3028_BACKUP_TCE; |
894 | break; |
895 | case 1: |
896 | val |= RV3028_BACKUP_TCE; |
897 | break; |
898 | default: |
899 | dev_warn(&client->dev, |
900 | "unsupported aux-voltage-chargeable value\n" ); |
901 | break; |
902 | } |
903 | } |
904 | |
905 | /* only update EEPROM if changes are necessary */ |
906 | if (val_old != val) { |
907 | ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE | |
908 | RV3028_BACKUP_TCR_MASK, val); |
909 | if (ret) |
910 | return ret; |
911 | } |
912 | |
913 | return ret; |
914 | } |
915 | |
916 | static int rv3028_probe(struct i2c_client *client) |
917 | { |
918 | struct rv3028_data *rv3028; |
919 | int ret, status; |
920 | struct nvmem_config nvmem_cfg = { |
921 | .name = "rv3028_nvram" , |
922 | .word_size = 1, |
923 | .stride = 1, |
924 | .size = 2, |
925 | .type = NVMEM_TYPE_BATTERY_BACKED, |
926 | .reg_read = rv3028_nvram_read, |
927 | .reg_write = rv3028_nvram_write, |
928 | }; |
929 | struct nvmem_config eeprom_cfg = { |
930 | .name = "rv3028_eeprom" , |
931 | .word_size = 1, |
932 | .stride = 1, |
933 | .size = 43, |
934 | .type = NVMEM_TYPE_EEPROM, |
935 | .reg_read = rv3028_eeprom_read, |
936 | .reg_write = rv3028_eeprom_write, |
937 | }; |
938 | |
939 | rv3028 = devm_kzalloc(dev: &client->dev, size: sizeof(struct rv3028_data), |
940 | GFP_KERNEL); |
941 | if (!rv3028) |
942 | return -ENOMEM; |
943 | |
944 | rv3028->regmap = devm_regmap_init_i2c(client, ®map_config); |
945 | if (IS_ERR(ptr: rv3028->regmap)) |
946 | return PTR_ERR(ptr: rv3028->regmap); |
947 | |
948 | i2c_set_clientdata(client, data: rv3028); |
949 | |
950 | ret = regmap_read(map: rv3028->regmap, RV3028_STATUS, val: &status); |
951 | if (ret < 0) |
952 | return ret; |
953 | |
954 | if (status & RV3028_STATUS_AF) |
955 | dev_warn(&client->dev, "An alarm may have been missed.\n" ); |
956 | |
957 | rv3028->rtc = devm_rtc_allocate_device(dev: &client->dev); |
958 | if (IS_ERR(ptr: rv3028->rtc)) |
959 | return PTR_ERR(ptr: rv3028->rtc); |
960 | |
961 | if (client->irq > 0) { |
962 | unsigned long flags; |
963 | |
964 | /* |
965 | * If flags = 0, devm_request_threaded_irq() will use IRQ flags |
966 | * obtained from device tree. |
967 | */ |
968 | if (dev_fwnode(&client->dev)) |
969 | flags = 0; |
970 | else |
971 | flags = IRQF_TRIGGER_LOW; |
972 | |
973 | ret = devm_request_threaded_irq(dev: &client->dev, irq: client->irq, |
974 | NULL, thread_fn: rv3028_handle_irq, |
975 | irqflags: flags | IRQF_ONESHOT, |
976 | devname: "rv3028" , dev_id: rv3028); |
977 | if (ret) { |
978 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n" ); |
979 | client->irq = 0; |
980 | } |
981 | } |
982 | if (!client->irq) |
983 | clear_bit(RTC_FEATURE_ALARM, addr: rv3028->rtc->features); |
984 | |
985 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL1, |
986 | RV3028_CTRL1_WADA, RV3028_CTRL1_WADA); |
987 | if (ret) |
988 | return ret; |
989 | |
990 | /* setup timestamping */ |
991 | ret = regmap_update_bits(map: rv3028->regmap, RV3028_CTRL2, |
992 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE, |
993 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE); |
994 | if (ret) |
995 | return ret; |
996 | |
997 | ret = rv3028_set_trickle_charger(rv3028, client); |
998 | if (ret) |
999 | return ret; |
1000 | |
1001 | ret = rtc_add_group(rtc: rv3028->rtc, grp: &rv3028_attr_group); |
1002 | if (ret) |
1003 | return ret; |
1004 | |
1005 | set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, addr: rv3028->rtc->features); |
1006 | |
1007 | rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
1008 | rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099; |
1009 | rv3028->rtc->ops = &rv3028_rtc_ops; |
1010 | ret = devm_rtc_register_device(rv3028->rtc); |
1011 | if (ret) |
1012 | return ret; |
1013 | |
1014 | nvmem_cfg.priv = rv3028->regmap; |
1015 | devm_rtc_nvmem_register(rtc: rv3028->rtc, nvmem_config: &nvmem_cfg); |
1016 | eeprom_cfg.priv = rv3028; |
1017 | devm_rtc_nvmem_register(rtc: rv3028->rtc, nvmem_config: &eeprom_cfg); |
1018 | |
1019 | rv3028->rtc->max_user_freq = 1; |
1020 | |
1021 | #ifdef CONFIG_COMMON_CLK |
1022 | rv3028_clkout_register_clk(rv3028, client); |
1023 | #endif |
1024 | return 0; |
1025 | } |
1026 | |
1027 | static const struct acpi_device_id rv3028_i2c_acpi_match[] = { |
1028 | { "MCRY3028" }, |
1029 | { } |
1030 | }; |
1031 | MODULE_DEVICE_TABLE(acpi, rv3028_i2c_acpi_match); |
1032 | |
1033 | static const __maybe_unused struct of_device_id rv3028_of_match[] = { |
1034 | { .compatible = "microcrystal,rv3028" , }, |
1035 | { } |
1036 | }; |
1037 | MODULE_DEVICE_TABLE(of, rv3028_of_match); |
1038 | |
1039 | static const struct i2c_device_id rv3028_id_table[] = { |
1040 | { .name = "rv3028" , }, |
1041 | { } |
1042 | }; |
1043 | MODULE_DEVICE_TABLE(i2c, rv3028_id_table); |
1044 | |
1045 | static struct i2c_driver rv3028_driver = { |
1046 | .driver = { |
1047 | .name = "rtc-rv3028" , |
1048 | .acpi_match_table = rv3028_i2c_acpi_match, |
1049 | .of_match_table = of_match_ptr(rv3028_of_match), |
1050 | }, |
1051 | .id_table = rv3028_id_table, |
1052 | .probe = rv3028_probe, |
1053 | }; |
1054 | module_i2c_driver(rv3028_driver); |
1055 | |
1056 | MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>" ); |
1057 | MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver" ); |
1058 | MODULE_LICENSE("GPL v2" ); |
1059 | |