1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Real Time Clock driver for Wolfson Microelectronics WM831x
4 *
5 * Copyright (C) 2009 Wolfson Microelectronics PLC.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 *
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/time.h>
14#include <linux/rtc.h>
15#include <linux/slab.h>
16#include <linux/bcd.h>
17#include <linux/interrupt.h>
18#include <linux/ioctl.h>
19#include <linux/completion.h>
20#include <linux/mfd/wm831x/core.h>
21#include <linux/delay.h>
22#include <linux/platform_device.h>
23#include <linux/random.h>
24
25/*
26 * R16416 (0x4020) - RTC Write Counter
27 */
28#define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
29#define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
30#define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
31
32/*
33 * R16417 (0x4021) - RTC Time 1
34 */
35#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
36#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
37#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
38
39/*
40 * R16418 (0x4022) - RTC Time 2
41 */
42#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
43#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
44#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
45
46/*
47 * R16419 (0x4023) - RTC Alarm 1
48 */
49#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
50#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
51#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
52
53/*
54 * R16420 (0x4024) - RTC Alarm 2
55 */
56#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
57#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
58#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
59
60/*
61 * R16421 (0x4025) - RTC Control
62 */
63#define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
64#define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
65#define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
66#define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
67#define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
68#define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
69#define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
70#define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
71#define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
72#define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
73#define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
74#define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
75#define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
76#define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
77#define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
78
79/*
80 * R16422 (0x4026) - RTC Trim
81 */
82#define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
83#define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
84#define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
85
86#define WM831X_SET_TIME_RETRIES 5
87#define WM831X_GET_TIME_RETRIES 5
88
89struct wm831x_rtc {
90 struct wm831x *wm831x;
91 struct rtc_device *rtc;
92 unsigned int alarm_enabled:1;
93};
94
95static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
96{
97 int ret;
98 u16 reg;
99
100 /*
101 * The write counter contains a pseudo-random number which is
102 * regenerated every time we set the RTC so it should be a
103 * useful per-system source of entropy.
104 */
105 ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
106 if (ret >= 0) {
107 reg = ret;
108 add_device_randomness(buf: &reg, len: sizeof(reg));
109 } else {
110 dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
111 ret);
112 }
113}
114
115/*
116 * Read current time and date in RTC
117 */
118static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
119{
120 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
121 struct wm831x *wm831x = wm831x_rtc->wm831x;
122 u16 time1[2], time2[2];
123 int ret;
124 int count = 0;
125
126 /* Has the RTC been programmed? */
127 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
128 if (ret < 0) {
129 dev_err(dev, "Failed to read RTC control: %d\n", ret);
130 return ret;
131 }
132 if (!(ret & WM831X_RTC_VALID)) {
133 dev_dbg(dev, "RTC not yet configured\n");
134 return -EINVAL;
135 }
136
137 /* Read twice to make sure we don't read a corrupt, partially
138 * incremented, value.
139 */
140 do {
141 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
142 count: 2, buf: time1);
143 if (ret != 0)
144 continue;
145
146 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
147 count: 2, buf: time2);
148 if (ret != 0)
149 continue;
150
151 if (memcmp(p: time1, q: time2, size: sizeof(time1)) == 0) {
152 u32 time = (time1[0] << 16) | time1[1];
153
154 rtc_time64_to_tm(time, tm);
155 return 0;
156 }
157
158 } while (++count < WM831X_GET_TIME_RETRIES);
159
160 dev_err(dev, "Timed out reading current time\n");
161
162 return -EIO;
163}
164
165/*
166 * Set current time and date in RTC
167 */
168static int wm831x_rtc_settime(struct device *dev, struct rtc_time *tm)
169{
170 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
171 struct wm831x *wm831x = wm831x_rtc->wm831x;
172 struct rtc_time new_tm;
173 unsigned long time, new_time;
174 int ret;
175 int count = 0;
176
177 time = rtc_tm_to_time64(tm);
178
179 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
180 val: (time >> 16) & 0xffff);
181 if (ret < 0) {
182 dev_err(dev, "Failed to write TIME_1: %d\n", ret);
183 return ret;
184 }
185
186 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, val: time & 0xffff);
187 if (ret < 0) {
188 dev_err(dev, "Failed to write TIME_2: %d\n", ret);
189 return ret;
190 }
191
192 /* Wait for the update to complete - should happen first time
193 * round but be conservative.
194 */
195 do {
196 msleep(msecs: 1);
197
198 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
199 if (ret < 0)
200 ret = WM831X_RTC_SYNC_BUSY;
201 } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
202 ++count < WM831X_SET_TIME_RETRIES);
203
204 if (ret & WM831X_RTC_SYNC_BUSY) {
205 dev_err(dev, "Timed out writing RTC update\n");
206 return -EIO;
207 }
208
209 /* Check that the update was accepted; security features may
210 * have caused the update to be ignored.
211 */
212 ret = wm831x_rtc_readtime(dev, tm: &new_tm);
213 if (ret < 0)
214 return ret;
215
216 new_time = rtc_tm_to_time64(tm: &new_tm);
217
218 /* Allow a second of change in case of tick */
219 if (new_time - time > 1) {
220 dev_err(dev, "RTC update not permitted by hardware\n");
221 return -EPERM;
222 }
223
224 return 0;
225}
226
227/*
228 * Read alarm time and date in RTC
229 */
230static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
231{
232 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
233 int ret;
234 u16 data[2];
235 u32 time;
236
237 ret = wm831x_bulk_read(wm831x: wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
238 count: 2, buf: data);
239 if (ret != 0) {
240 dev_err(dev, "Failed to read alarm time: %d\n", ret);
241 return ret;
242 }
243
244 time = (data[0] << 16) | data[1];
245
246 rtc_time64_to_tm(time, tm: &alrm->time);
247
248 ret = wm831x_reg_read(wm831x: wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
249 if (ret < 0) {
250 dev_err(dev, "Failed to read RTC control: %d\n", ret);
251 return ret;
252 }
253
254 if (ret & WM831X_RTC_ALM_ENA)
255 alrm->enabled = 1;
256 else
257 alrm->enabled = 0;
258
259 return 0;
260}
261
262static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
263{
264 wm831x_rtc->alarm_enabled = 0;
265
266 return wm831x_set_bits(wm831x: wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
267 WM831X_RTC_ALM_ENA, val: 0);
268}
269
270static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
271{
272 wm831x_rtc->alarm_enabled = 1;
273
274 return wm831x_set_bits(wm831x: wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
275 WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
276}
277
278static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
279{
280 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
281 struct wm831x *wm831x = wm831x_rtc->wm831x;
282 int ret;
283 unsigned long time;
284
285 time = rtc_tm_to_time64(tm: &alrm->time);
286
287 ret = wm831x_rtc_stop_alarm(wm831x_rtc);
288 if (ret < 0) {
289 dev_err(dev, "Failed to stop alarm: %d\n", ret);
290 return ret;
291 }
292
293 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
294 val: (time >> 16) & 0xffff);
295 if (ret < 0) {
296 dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
297 return ret;
298 }
299
300 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, val: time & 0xffff);
301 if (ret < 0) {
302 dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
303 return ret;
304 }
305
306 if (alrm->enabled) {
307 ret = wm831x_rtc_start_alarm(wm831x_rtc);
308 if (ret < 0) {
309 dev_err(dev, "Failed to start alarm: %d\n", ret);
310 return ret;
311 }
312 }
313
314 return 0;
315}
316
317static int wm831x_rtc_alarm_irq_enable(struct device *dev,
318 unsigned int enabled)
319{
320 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
321
322 if (enabled)
323 return wm831x_rtc_start_alarm(wm831x_rtc);
324 else
325 return wm831x_rtc_stop_alarm(wm831x_rtc);
326}
327
328static irqreturn_t wm831x_alm_irq(int irq, void *data)
329{
330 struct wm831x_rtc *wm831x_rtc = data;
331
332 rtc_update_irq(rtc: wm831x_rtc->rtc, num: 1, RTC_IRQF | RTC_AF);
333
334 return IRQ_HANDLED;
335}
336
337static const struct rtc_class_ops wm831x_rtc_ops = {
338 .read_time = wm831x_rtc_readtime,
339 .set_time = wm831x_rtc_settime,
340 .read_alarm = wm831x_rtc_readalarm,
341 .set_alarm = wm831x_rtc_setalarm,
342 .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
343};
344
345#ifdef CONFIG_PM
346/* Turn off the alarm if it should not be a wake source. */
347static int wm831x_rtc_suspend(struct device *dev)
348{
349 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
350 int ret, enable;
351
352 if (wm831x_rtc->alarm_enabled && device_may_wakeup(dev))
353 enable = WM831X_RTC_ALM_ENA;
354 else
355 enable = 0;
356
357 ret = wm831x_set_bits(wm831x: wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
358 WM831X_RTC_ALM_ENA, val: enable);
359 if (ret != 0)
360 dev_err(dev, "Failed to update RTC alarm: %d\n", ret);
361
362 return 0;
363}
364
365/* Enable the alarm if it should be enabled (in case it was disabled to
366 * prevent use as a wake source).
367 */
368static int wm831x_rtc_resume(struct device *dev)
369{
370 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
371 int ret;
372
373 if (wm831x_rtc->alarm_enabled) {
374 ret = wm831x_rtc_start_alarm(wm831x_rtc);
375 if (ret != 0)
376 dev_err(dev, "Failed to restart RTC alarm: %d\n", ret);
377 }
378
379 return 0;
380}
381
382/* Unconditionally disable the alarm */
383static int wm831x_rtc_freeze(struct device *dev)
384{
385 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
386 int ret;
387
388 ret = wm831x_set_bits(wm831x: wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
389 WM831X_RTC_ALM_ENA, val: 0);
390 if (ret != 0)
391 dev_err(dev, "Failed to stop RTC alarm: %d\n", ret);
392
393 return 0;
394}
395#else
396#define wm831x_rtc_suspend NULL
397#define wm831x_rtc_resume NULL
398#define wm831x_rtc_freeze NULL
399#endif
400
401static int wm831x_rtc_probe(struct platform_device *pdev)
402{
403 struct wm831x *wm831x = dev_get_drvdata(dev: pdev->dev.parent);
404 struct wm831x_rtc *wm831x_rtc;
405 int alm_irq = wm831x_irq(wm831x, irq: platform_get_irq_byname(pdev, "ALM"));
406 int ret = 0;
407
408 wm831x_rtc = devm_kzalloc(dev: &pdev->dev, size: sizeof(*wm831x_rtc), GFP_KERNEL);
409 if (wm831x_rtc == NULL)
410 return -ENOMEM;
411
412 platform_set_drvdata(pdev, data: wm831x_rtc);
413 wm831x_rtc->wm831x = wm831x;
414
415 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
416 if (ret < 0) {
417 dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
418 return ret;
419 }
420 if (ret & WM831X_RTC_ALM_ENA)
421 wm831x_rtc->alarm_enabled = 1;
422
423 device_init_wakeup(dev: &pdev->dev, enable: 1);
424
425 wm831x_rtc->rtc = devm_rtc_allocate_device(dev: &pdev->dev);
426 if (IS_ERR(ptr: wm831x_rtc->rtc))
427 return PTR_ERR(ptr: wm831x_rtc->rtc);
428
429 wm831x_rtc->rtc->ops = &wm831x_rtc_ops;
430 wm831x_rtc->rtc->range_max = U32_MAX;
431
432 ret = devm_rtc_register_device(wm831x_rtc->rtc);
433 if (ret)
434 return ret;
435
436 ret = devm_request_threaded_irq(dev: &pdev->dev, irq: alm_irq, NULL,
437 thread_fn: wm831x_alm_irq,
438 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
439 devname: "RTC alarm",
440 dev_id: wm831x_rtc);
441 if (ret != 0) {
442 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
443 alm_irq, ret);
444 }
445
446 wm831x_rtc_add_randomness(wm831x);
447
448 return 0;
449}
450
451static const struct dev_pm_ops wm831x_rtc_pm_ops = {
452 .suspend = wm831x_rtc_suspend,
453 .resume = wm831x_rtc_resume,
454
455 .freeze = wm831x_rtc_freeze,
456 .thaw = wm831x_rtc_resume,
457 .restore = wm831x_rtc_resume,
458
459 .poweroff = wm831x_rtc_suspend,
460};
461
462static struct platform_driver wm831x_rtc_driver = {
463 .probe = wm831x_rtc_probe,
464 .driver = {
465 .name = "wm831x-rtc",
466 .pm = &wm831x_rtc_pm_ops,
467 },
468};
469
470module_platform_driver(wm831x_rtc_driver);
471
472MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
473MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
474MODULE_LICENSE("GPL");
475MODULE_ALIAS("platform:wm831x-rtc");
476

source code of linux/drivers/rtc/rtc-wm831x.c