1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * QLogic Fibre Channel HBA Driver |
4 | * Copyright (c) 2003-2014 QLogic Corporation |
5 | */ |
6 | #ifndef __QLA_BSG_H |
7 | #define __QLA_BSG_H |
8 | |
9 | /* BSG Vendor specific commands */ |
10 | #define QL_VND_LOOPBACK 0x01 |
11 | #define QL_VND_A84_RESET 0x02 |
12 | #define QL_VND_A84_UPDATE_FW 0x03 |
13 | #define QL_VND_A84_MGMT_CMD 0x04 |
14 | #define QL_VND_IIDMA 0x05 |
15 | #define QL_VND_FCP_PRIO_CFG_CMD 0x06 |
16 | #define QL_VND_READ_FLASH 0x07 |
17 | #define QL_VND_UPDATE_FLASH 0x08 |
18 | #define QL_VND_SET_FRU_VERSION 0x0B |
19 | #define QL_VND_READ_FRU_STATUS 0x0C |
20 | #define QL_VND_WRITE_FRU_STATUS 0x0D |
21 | #define QL_VND_DIAG_IO_CMD 0x0A |
22 | #define QL_VND_WRITE_I2C 0x10 |
23 | #define QL_VND_READ_I2C 0x11 |
24 | #define QL_VND_FX00_MGMT_CMD 0x12 |
25 | #define QL_VND_SERDES_OP 0x13 |
26 | #define QL_VND_SERDES_OP_EX 0x14 |
27 | #define QL_VND_GET_FLASH_UPDATE_CAPS 0x15 |
28 | #define QL_VND_SET_FLASH_UPDATE_CAPS 0x16 |
29 | #define QL_VND_GET_BBCR_DATA 0x17 |
30 | #define QL_VND_GET_PRIV_STATS 0x18 |
31 | #define QL_VND_DPORT_DIAGNOSTICS 0x19 |
32 | #define QL_VND_GET_PRIV_STATS_EX 0x1A |
33 | #define QL_VND_SS_GET_FLASH_IMAGE_STATUS 0x1E |
34 | #define QL_VND_EDIF_MGMT 0X1F |
35 | #define QL_VND_MANAGE_HOST_STATS 0x23 |
36 | #define QL_VND_GET_HOST_STATS 0x24 |
37 | #define QL_VND_GET_TGT_STATS 0x25 |
38 | #define QL_VND_MANAGE_HOST_PORT 0x26 |
39 | #define QL_VND_MBX_PASSTHRU 0x2B |
40 | #define QL_VND_DPORT_DIAGNOSTICS_V2 0x2C |
41 | |
42 | /* BSG Vendor specific subcode returns */ |
43 | #define EXT_STATUS_OK 0 |
44 | #define EXT_STATUS_ERR 1 |
45 | #define EXT_STATUS_BUSY 2 |
46 | #define EXT_STATUS_INVALID_PARAM 6 |
47 | #define EXT_STATUS_DATA_OVERRUN 7 |
48 | #define EXT_STATUS_DATA_UNDERRUN 8 |
49 | #define EXT_STATUS_MAILBOX 11 |
50 | #define EXT_STATUS_BUFFER_TOO_SMALL 16 |
51 | #define EXT_STATUS_NO_MEMORY 17 |
52 | #define EXT_STATUS_DEVICE_OFFLINE 22 |
53 | |
54 | /* |
55 | * To support bidirectional iocb |
56 | * BSG Vendor specific returns |
57 | */ |
58 | #define EXT_STATUS_NOT_SUPPORTED 27 |
59 | #define EXT_STATUS_INVALID_CFG 28 |
60 | #define EXT_STATUS_DMA_ERR 29 |
61 | #define EXT_STATUS_TIMEOUT 30 |
62 | #define EXT_STATUS_THREAD_FAILED 31 |
63 | #define EXT_STATUS_DATA_CMP_FAILED 32 |
64 | #define EXT_STATUS_DPORT_DIAG_ERR 40 |
65 | #define EXT_STATUS_DPORT_DIAG_IN_PROCESS 41 |
66 | #define EXT_STATUS_DPORT_DIAG_NOT_RUNNING 42 |
67 | |
68 | /* BSG definations for interpreting CommandSent field */ |
69 | #define INT_DEF_LB_LOOPBACK_CMD 0 |
70 | #define INT_DEF_LB_ECHO_CMD 1 |
71 | |
72 | /* Loopback related definations */ |
73 | #define INTERNAL_LOOPBACK 0xF1 |
74 | #define EXTERNAL_LOOPBACK 0xF2 |
75 | #define ENABLE_INTERNAL_LOOPBACK 0x02 |
76 | #define ENABLE_EXTERNAL_LOOPBACK 0x04 |
77 | #define INTERNAL_LOOPBACK_MASK 0x000E |
78 | #define MAX_ELS_FRAME_PAYLOAD 252 |
79 | #define ELS_OPCODE_BYTE 0x10 |
80 | |
81 | /* BSG Vendor specific definations */ |
82 | #define A84_ISSUE_WRITE_TYPE_CMD 0 |
83 | #define A84_ISSUE_READ_TYPE_CMD 1 |
84 | #define A84_CLEANUP_CMD 2 |
85 | #define A84_ISSUE_RESET_OP_FW 3 |
86 | #define A84_ISSUE_RESET_DIAG_FW 4 |
87 | #define A84_ISSUE_UPDATE_OPFW_CMD 5 |
88 | #define A84_ISSUE_UPDATE_DIAGFW_CMD 6 |
89 | |
90 | struct qla84_mgmt_param { |
91 | union { |
92 | struct { |
93 | uint32_t start_addr; |
94 | } mem; /* for QLA84_MGMT_READ/WRITE_MEM */ |
95 | struct { |
96 | uint32_t id; |
97 | #define QLA84_MGMT_CONFIG_ID_UIF 1 |
98 | #define QLA84_MGMT_CONFIG_ID_FCOE_COS 2 |
99 | #define QLA84_MGMT_CONFIG_ID_PAUSE 3 |
100 | #define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4 |
101 | |
102 | uint32_t param0; |
103 | uint32_t param1; |
104 | } config; /* for QLA84_MGMT_CHNG_CONFIG */ |
105 | |
106 | struct { |
107 | uint32_t type; |
108 | #define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */ |
109 | #define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */ |
110 | #define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */ |
111 | #define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */ |
112 | #define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */ |
113 | #define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */ |
114 | #define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */ |
115 | |
116 | uint32_t context; |
117 | /* |
118 | * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA |
119 | */ |
120 | #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 |
121 | #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 |
122 | #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 |
123 | #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 |
124 | #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 |
125 | #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 |
126 | #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 |
127 | #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 |
128 | #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 |
129 | #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 |
130 | |
131 | /* |
132 | * context definitions for QLA84_MGMT_INFO_PORT_STAT |
133 | */ |
134 | #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 |
135 | #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 |
136 | #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 |
137 | #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 |
138 | #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 |
139 | #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 |
140 | |
141 | |
142 | /* |
143 | * context definitions for QLA84_MGMT_INFO_LIF_STAT |
144 | */ |
145 | #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 |
146 | #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 |
147 | #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 |
148 | #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 |
149 | #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 |
150 | |
151 | } info; /* for QLA84_MGMT_GET_INFO */ |
152 | } u; |
153 | }; |
154 | |
155 | struct qla84_msg_mgmt { |
156 | uint16_t cmd; |
157 | #define QLA84_MGMT_READ_MEM 0x00 |
158 | #define QLA84_MGMT_WRITE_MEM 0x01 |
159 | #define QLA84_MGMT_CHNG_CONFIG 0x02 |
160 | #define QLA84_MGMT_GET_INFO 0x03 |
161 | uint16_t rsrvd; |
162 | struct qla84_mgmt_param mgmtp;/* parameters for cmd */ |
163 | uint32_t len; /* bytes in payload following this struct */ |
164 | uint8_t payload[]; /* payload for cmd */ |
165 | }; |
166 | |
167 | struct qla_bsg_a84_mgmt { |
168 | struct qla84_msg_mgmt mgmt; |
169 | } __attribute__ ((packed)); |
170 | |
171 | struct qla_scsi_addr { |
172 | uint16_t bus; |
173 | uint16_t target; |
174 | } __attribute__ ((packed)); |
175 | |
176 | struct qla_ext_dest_addr { |
177 | union { |
178 | uint8_t wwnn[8]; |
179 | uint8_t wwpn[8]; |
180 | uint8_t id[4]; |
181 | struct qla_scsi_addr scsi_addr; |
182 | } dest_addr; |
183 | uint16_t dest_type; |
184 | #define EXT_DEF_TYPE_WWPN 2 |
185 | uint16_t lun; |
186 | uint16_t padding[2]; |
187 | } __attribute__ ((packed)); |
188 | |
189 | struct qla_port_param { |
190 | struct qla_ext_dest_addr fc_scsi_addr; |
191 | uint16_t mode; |
192 | uint16_t speed; |
193 | } __attribute__ ((packed)); |
194 | |
195 | struct qla_mbx_passthru { |
196 | uint16_t reserved1[2]; |
197 | uint16_t mbx_in[32]; |
198 | uint16_t mbx_out[32]; |
199 | uint32_t reserved2[16]; |
200 | } __packed; |
201 | |
202 | /* FRU VPD */ |
203 | |
204 | #define MAX_FRU_SIZE 36 |
205 | |
206 | struct qla_field_address { |
207 | uint16_t offset; |
208 | uint16_t device; |
209 | uint16_t option; |
210 | } __packed; |
211 | |
212 | struct qla_field_info { |
213 | uint8_t version[MAX_FRU_SIZE]; |
214 | } __packed; |
215 | |
216 | struct qla_image_version { |
217 | struct qla_field_address field_address; |
218 | struct qla_field_info field_info; |
219 | } __packed; |
220 | |
221 | struct qla_image_version_list { |
222 | uint32_t count; |
223 | struct qla_image_version version[]; |
224 | } __packed; |
225 | |
226 | struct qla_status_reg { |
227 | struct qla_field_address field_address; |
228 | uint8_t status_reg; |
229 | uint8_t reserved[7]; |
230 | } __packed; |
231 | |
232 | struct qla_i2c_access { |
233 | uint16_t device; |
234 | uint16_t offset; |
235 | uint16_t option; |
236 | uint16_t length; |
237 | uint8_t buffer[0x40]; |
238 | } __packed; |
239 | |
240 | /* 26xx serdes register interface */ |
241 | |
242 | /* serdes reg commands */ |
243 | #define INT_SC_SERDES_READ_REG 1 |
244 | #define INT_SC_SERDES_WRITE_REG 2 |
245 | |
246 | struct qla_serdes_reg { |
247 | uint16_t cmd; |
248 | uint16_t addr; |
249 | uint16_t val; |
250 | } __packed; |
251 | |
252 | struct qla_serdes_reg_ex { |
253 | uint16_t cmd; |
254 | uint32_t addr; |
255 | uint32_t val; |
256 | } __packed; |
257 | |
258 | struct qla_flash_update_caps { |
259 | uint64_t capabilities; |
260 | uint32_t outage_duration; |
261 | uint8_t reserved[20]; |
262 | } __packed; |
263 | |
264 | /* BB_CR Status */ |
265 | #define QLA_BBCR_STATUS_DISABLED 0 |
266 | #define QLA_BBCR_STATUS_ENABLED 1 |
267 | #define QLA_BBCR_STATUS_UNKNOWN 2 |
268 | |
269 | /* BB_CR State */ |
270 | #define QLA_BBCR_STATE_OFFLINE 0 |
271 | #define QLA_BBCR_STATE_ONLINE 1 |
272 | |
273 | /* BB_CR Offline Reason Code */ |
274 | #define QLA_BBCR_REASON_PORT_SPEED 1 |
275 | #define QLA_BBCR_REASON_PEER_PORT 2 |
276 | #define QLA_BBCR_REASON_SWITCH 3 |
277 | #define QLA_BBCR_REASON_LOGIN_REJECT 4 |
278 | |
279 | struct qla_bbcr_data { |
280 | uint8_t status; /* 1 - enabled, 0 - Disabled */ |
281 | uint8_t state; /* 1 - online, 0 - offline */ |
282 | uint8_t configured_bbscn; /* 0-15 */ |
283 | uint8_t negotiated_bbscn; /* 0-15 */ |
284 | uint8_t offline_reason_code; |
285 | uint16_t mbx1; /* Port state */ |
286 | uint8_t reserved[9]; |
287 | } __packed; |
288 | |
289 | struct qla_dport_diag { |
290 | uint16_t options; |
291 | uint32_t buf[16]; |
292 | uint8_t unused[62]; |
293 | } __packed; |
294 | |
295 | #define QLA_GET_DPORT_RESULT_V2 0 /* Get Result */ |
296 | #define QLA_RESTART_DPORT_TEST_V2 1 /* Restart test */ |
297 | #define QLA_START_DPORT_TEST_V2 2 /* Start test */ |
298 | struct qla_dport_diag_v2 { |
299 | uint16_t options; |
300 | uint16_t mbx1; |
301 | uint16_t mbx2; |
302 | uint8_t unused[58]; |
303 | uint8_t buf[1024]; /* Test Result */ |
304 | } __packed; |
305 | |
306 | /* D_Port options */ |
307 | #define QLA_DPORT_RESULT 0x0 |
308 | #define QLA_DPORT_START 0x2 |
309 | |
310 | /* active images in flash */ |
311 | struct qla_active_regions { |
312 | uint8_t global_image; |
313 | uint8_t board_config; |
314 | uint8_t vpd_nvram; |
315 | uint8_t npiv_config_0_1; |
316 | uint8_t npiv_config_2_3; |
317 | uint8_t nvme_params; |
318 | uint8_t reserved[31]; |
319 | } __packed; |
320 | |
321 | #include "qla_edif_bsg.h" |
322 | |
323 | #endif |
324 | |