| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * driver for Microchip PQI-based storage controllers |
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| 4 | * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries |
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| 5 | * Copyright (c) 2016-2018 Microsemi Corporation |
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| 6 | * Copyright (c) 2016 PMC-Sierra, Inc. |
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| 7 | * |
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| 8 | * Questions/Comments/Bugfixes to storagedev@microchip.com |
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| 9 | * |
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| 10 | */ |
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| 11 | |
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| 12 | #if !defined(_SMARTPQI_SIS_H) |
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| 13 | #define _SMARTPQI_SIS_H |
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| 14 | |
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| 15 | void sis_verify_structures(void); |
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| 16 | int sis_wait_for_ctrl_ready(struct pqi_ctrl_info *ctrl_info); |
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| 17 | int sis_wait_for_ctrl_ready_resume(struct pqi_ctrl_info *ctrl_info); |
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| 18 | bool sis_is_firmware_running(struct pqi_ctrl_info *ctrl_info); |
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| 19 | bool sis_is_kernel_up(struct pqi_ctrl_info *ctrl_info); |
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| 20 | int sis_get_ctrl_properties(struct pqi_ctrl_info *ctrl_info); |
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| 21 | int sis_get_pqi_capabilities(struct pqi_ctrl_info *ctrl_info); |
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| 22 | int sis_init_base_struct_addr(struct pqi_ctrl_info *ctrl_info); |
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| 23 | void sis_enable_msix(struct pqi_ctrl_info *ctrl_info); |
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| 24 | void sis_enable_intx(struct pqi_ctrl_info *ctrl_info); |
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| 25 | void sis_shutdown_ctrl(struct pqi_ctrl_info *ctrl_info, |
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| 26 | enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason); |
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| 27 | int sis_pqi_reset_quiesce(struct pqi_ctrl_info *ctrl_info); |
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| 28 | int sis_reenable_sis_mode(struct pqi_ctrl_info *ctrl_info); |
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| 29 | void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value); |
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| 30 | u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info); |
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| 31 | void sis_soft_reset(struct pqi_ctrl_info *ctrl_info); |
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| 32 | u32 sis_get_product_id(struct pqi_ctrl_info *ctrl_info); |
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| 33 | int sis_wait_for_fw_triage_completion(struct pqi_ctrl_info *ctrl_info); |
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| 34 | |
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| 35 | extern unsigned int sis_ctrl_ready_timeout_secs; |
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| 36 | |
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| 37 | #endif /* _SMARTPQI_SIS_H */ |
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| 38 | |
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