1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * R-Car Gen3 THS thermal sensor driver |
4 | * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen. |
5 | * |
6 | * Copyright (C) 2016 Renesas Electronics Corporation. |
7 | * Copyright (C) 2016 Sang Engineering |
8 | */ |
9 | #include <linux/delay.h> |
10 | #include <linux/err.h> |
11 | #include <linux/interrupt.h> |
12 | #include <linux/io.h> |
13 | #include <linux/module.h> |
14 | #include <linux/of.h> |
15 | #include <linux/platform_device.h> |
16 | #include <linux/pm_runtime.h> |
17 | #include <linux/thermal.h> |
18 | |
19 | #include "thermal_hwmon.h" |
20 | |
21 | /* Register offsets */ |
22 | #define REG_GEN3_IRQSTR 0x04 |
23 | #define REG_GEN3_IRQMSK 0x08 |
24 | #define REG_GEN3_IRQCTL 0x0C |
25 | #define REG_GEN3_IRQEN 0x10 |
26 | #define REG_GEN3_IRQTEMP1 0x14 |
27 | #define REG_GEN3_IRQTEMP2 0x18 |
28 | #define REG_GEN3_IRQTEMP3 0x1C |
29 | #define REG_GEN3_THCTR 0x20 |
30 | #define REG_GEN3_TEMP 0x28 |
31 | #define REG_GEN3_THCODE1 0x50 |
32 | #define REG_GEN3_THCODE2 0x54 |
33 | #define REG_GEN3_THCODE3 0x58 |
34 | #define REG_GEN3_PTAT1 0x5c |
35 | #define REG_GEN3_PTAT2 0x60 |
36 | #define REG_GEN3_PTAT3 0x64 |
37 | #define REG_GEN3_THSCP 0x68 |
38 | #define REG_GEN4_THSFMON00 0x180 |
39 | #define REG_GEN4_THSFMON01 0x184 |
40 | #define REG_GEN4_THSFMON02 0x188 |
41 | #define REG_GEN4_THSFMON15 0x1BC |
42 | #define REG_GEN4_THSFMON16 0x1C0 |
43 | #define REG_GEN4_THSFMON17 0x1C4 |
44 | |
45 | /* IRQ{STR,MSK,EN} bits */ |
46 | #define IRQ_TEMP1 BIT(0) |
47 | #define IRQ_TEMP2 BIT(1) |
48 | #define IRQ_TEMP3 BIT(2) |
49 | #define IRQ_TEMPD1 BIT(3) |
50 | #define IRQ_TEMPD2 BIT(4) |
51 | #define IRQ_TEMPD3 BIT(5) |
52 | |
53 | /* THCTR bits */ |
54 | #define THCTR_PONM BIT(6) |
55 | #define THCTR_THSST BIT(0) |
56 | |
57 | /* THSCP bits */ |
58 | #define THSCP_COR_PARA_VLD (BIT(15) | BIT(14)) |
59 | |
60 | #define CTEMP_MASK 0xFFF |
61 | |
62 | #define MCELSIUS(temp) ((temp) * 1000) |
63 | #define GEN3_FUSE_MASK 0xFFF |
64 | #define GEN4_FUSE_MASK 0xFFF |
65 | |
66 | #define TSC_MAX_NUM 5 |
67 | |
68 | /* Structure for thermal temperature calculation */ |
69 | struct equation_coefs { |
70 | int a1; |
71 | int b1; |
72 | int a2; |
73 | int b2; |
74 | }; |
75 | |
76 | struct rcar_gen3_thermal_priv; |
77 | |
78 | struct rcar_thermal_info { |
79 | int ths_tj_1; |
80 | void (*read_fuses)(struct rcar_gen3_thermal_priv *priv); |
81 | }; |
82 | |
83 | struct rcar_gen3_thermal_tsc { |
84 | void __iomem *base; |
85 | struct thermal_zone_device *zone; |
86 | struct equation_coefs coef; |
87 | int tj_t; |
88 | int thcode[3]; |
89 | }; |
90 | |
91 | struct rcar_gen3_thermal_priv { |
92 | struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM]; |
93 | struct thermal_zone_device_ops ops; |
94 | unsigned int num_tscs; |
95 | int ptat[3]; |
96 | const struct rcar_thermal_info *info; |
97 | }; |
98 | |
99 | static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc, |
100 | u32 reg) |
101 | { |
102 | return ioread32(tsc->base + reg); |
103 | } |
104 | |
105 | static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc, |
106 | u32 reg, u32 data) |
107 | { |
108 | iowrite32(data, tsc->base + reg); |
109 | } |
110 | |
111 | /* |
112 | * Linear approximation for temperature |
113 | * |
114 | * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a |
115 | * |
116 | * The constants a and b are calculated using two triplets of int values PTAT |
117 | * and THCODE. PTAT and THCODE can either be read from hardware or use hard |
118 | * coded values from driver. The formula to calculate a and b are taken from |
119 | * BSP and sparsely documented and understood. |
120 | * |
121 | * Examining the linear formula and the formula used to calculate constants a |
122 | * and b while knowing that the span for PTAT and THCODE values are between |
123 | * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001. |
124 | * Integer also needs to be signed so that leaves 7 bits for binary |
125 | * fixed point scaling. |
126 | */ |
127 | |
128 | #define FIXPT_SHIFT 7 |
129 | #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT) |
130 | #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT) |
131 | #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b)) |
132 | #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT) |
133 | |
134 | #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */ |
135 | |
136 | /* no idea where these constants come from */ |
137 | #define TJ_3 -41 |
138 | |
139 | static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv, |
140 | struct rcar_gen3_thermal_tsc *tsc, |
141 | int ths_tj_1) |
142 | { |
143 | /* TODO: Find documentation and document constant calculation formula */ |
144 | |
145 | /* |
146 | * Division is not scaled in BSP and if scaled it might overflow |
147 | * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled |
148 | */ |
149 | tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3)) |
150 | / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3); |
151 | |
152 | tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]), |
153 | tsc->tj_t - FIXPT_INT(TJ_3)); |
154 | tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3; |
155 | |
156 | tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]), |
157 | tsc->tj_t - FIXPT_INT(ths_tj_1)); |
158 | tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1; |
159 | } |
160 | |
161 | static int rcar_gen3_thermal_round(int temp) |
162 | { |
163 | int result, round_offs; |
164 | |
165 | round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 : |
166 | -RCAR3_THERMAL_GRAN / 2; |
167 | result = (temp + round_offs) / RCAR3_THERMAL_GRAN; |
168 | return result * RCAR3_THERMAL_GRAN; |
169 | } |
170 | |
171 | static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp) |
172 | { |
173 | struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tzd: tz); |
174 | int mcelsius, val; |
175 | int reg; |
176 | |
177 | /* Read register and convert to mili Celsius */ |
178 | reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK; |
179 | |
180 | if (reg <= tsc->thcode[1]) |
181 | val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, |
182 | tsc->coef.a1); |
183 | else |
184 | val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, |
185 | tsc->coef.a2); |
186 | mcelsius = FIXPT_TO_MCELSIUS(val); |
187 | |
188 | /* Guaranteed operating range is -40C to 125C. */ |
189 | |
190 | /* Round value to device granularity setting */ |
191 | *temp = rcar_gen3_thermal_round(temp: mcelsius); |
192 | |
193 | return 0; |
194 | } |
195 | |
196 | static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc, |
197 | int mcelsius) |
198 | { |
199 | int celsius, val; |
200 | |
201 | celsius = DIV_ROUND_CLOSEST(mcelsius, 1000); |
202 | if (celsius <= INT_FIXPT(tsc->tj_t)) |
203 | val = celsius * tsc->coef.a1 + tsc->coef.b1; |
204 | else |
205 | val = celsius * tsc->coef.a2 + tsc->coef.b2; |
206 | |
207 | return INT_FIXPT(val); |
208 | } |
209 | |
210 | static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high) |
211 | { |
212 | struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tzd: tz); |
213 | u32 irqmsk = 0; |
214 | |
215 | if (low != -INT_MAX) { |
216 | irqmsk |= IRQ_TEMPD1; |
217 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1, |
218 | data: rcar_gen3_thermal_mcelsius_to_temp(tsc, mcelsius: low)); |
219 | } |
220 | |
221 | if (high != INT_MAX) { |
222 | irqmsk |= IRQ_TEMP2; |
223 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2, |
224 | data: rcar_gen3_thermal_mcelsius_to_temp(tsc, mcelsius: high)); |
225 | } |
226 | |
227 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, data: irqmsk); |
228 | |
229 | return 0; |
230 | } |
231 | |
232 | static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = { |
233 | .get_temp = rcar_gen3_thermal_get_temp, |
234 | .set_trips = rcar_gen3_thermal_set_trips, |
235 | }; |
236 | |
237 | static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data) |
238 | { |
239 | struct rcar_gen3_thermal_priv *priv = data; |
240 | unsigned int i; |
241 | u32 status; |
242 | |
243 | for (i = 0; i < priv->num_tscs; i++) { |
244 | status = rcar_gen3_thermal_read(tsc: priv->tscs[i], REG_GEN3_IRQSTR); |
245 | rcar_gen3_thermal_write(tsc: priv->tscs[i], REG_GEN3_IRQSTR, data: 0); |
246 | if (status && priv->tscs[i]->zone) |
247 | thermal_zone_device_update(priv->tscs[i]->zone, |
248 | THERMAL_EVENT_UNSPECIFIED); |
249 | } |
250 | |
251 | return IRQ_HANDLED; |
252 | } |
253 | |
254 | static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *priv) |
255 | { |
256 | unsigned int i; |
257 | |
258 | /* |
259 | * Set the pseudo calibration points with fused values. |
260 | * PTAT is shared between all TSCs but only fused for the first |
261 | * TSC while THCODEs are fused for each TSC. |
262 | */ |
263 | priv->ptat[0] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN3_PTAT1) & |
264 | GEN3_FUSE_MASK; |
265 | priv->ptat[1] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN3_PTAT2) & |
266 | GEN3_FUSE_MASK; |
267 | priv->ptat[2] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN3_PTAT3) & |
268 | GEN3_FUSE_MASK; |
269 | |
270 | for (i = 0; i < priv->num_tscs; i++) { |
271 | struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; |
272 | |
273 | tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) & |
274 | GEN3_FUSE_MASK; |
275 | tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) & |
276 | GEN3_FUSE_MASK; |
277 | tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) & |
278 | GEN3_FUSE_MASK; |
279 | } |
280 | } |
281 | |
282 | static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv) |
283 | { |
284 | unsigned int i; |
285 | |
286 | /* |
287 | * Set the pseudo calibration points with fused values. |
288 | * PTAT is shared between all TSCs but only fused for the first |
289 | * TSC while THCODEs are fused for each TSC. |
290 | */ |
291 | priv->ptat[0] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN4_THSFMON16) & |
292 | GEN4_FUSE_MASK; |
293 | priv->ptat[1] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN4_THSFMON17) & |
294 | GEN4_FUSE_MASK; |
295 | priv->ptat[2] = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN4_THSFMON15) & |
296 | GEN4_FUSE_MASK; |
297 | |
298 | for (i = 0; i < priv->num_tscs; i++) { |
299 | struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; |
300 | |
301 | tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON01) & |
302 | GEN4_FUSE_MASK; |
303 | tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON02) & |
304 | GEN4_FUSE_MASK; |
305 | tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON00) & |
306 | GEN4_FUSE_MASK; |
307 | } |
308 | } |
309 | |
310 | static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv) |
311 | { |
312 | unsigned int i; |
313 | u32 thscp; |
314 | |
315 | /* If fuses are not set, fallback to pseudo values. */ |
316 | thscp = rcar_gen3_thermal_read(tsc: priv->tscs[0], REG_GEN3_THSCP); |
317 | if (!priv->info->read_fuses || |
318 | (thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) { |
319 | /* Default THCODE values in case FUSEs are not set. */ |
320 | static const int thcodes[TSC_MAX_NUM][3] = { |
321 | { 3397, 2800, 2221 }, |
322 | { 3393, 2795, 2216 }, |
323 | { 3389, 2805, 2237 }, |
324 | { 3415, 2694, 2195 }, |
325 | { 3356, 2724, 2244 }, |
326 | }; |
327 | |
328 | priv->ptat[0] = 2631; |
329 | priv->ptat[1] = 1509; |
330 | priv->ptat[2] = 435; |
331 | |
332 | for (i = 0; i < priv->num_tscs; i++) { |
333 | struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; |
334 | |
335 | tsc->thcode[0] = thcodes[i][0]; |
336 | tsc->thcode[1] = thcodes[i][1]; |
337 | tsc->thcode[2] = thcodes[i][2]; |
338 | } |
339 | |
340 | return false; |
341 | } |
342 | |
343 | priv->info->read_fuses(priv); |
344 | return true; |
345 | } |
346 | |
347 | static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv, |
348 | struct rcar_gen3_thermal_tsc *tsc) |
349 | { |
350 | u32 reg_val; |
351 | |
352 | reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR); |
353 | reg_val &= ~THCTR_PONM; |
354 | rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, data: reg_val); |
355 | |
356 | usleep_range(min: 1000, max: 2000); |
357 | |
358 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, data: 0); |
359 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, data: 0); |
360 | if (priv->ops.set_trips) |
361 | rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, |
362 | IRQ_TEMPD1 | IRQ_TEMP2); |
363 | |
364 | reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR); |
365 | reg_val |= THCTR_THSST; |
366 | rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, data: reg_val); |
367 | |
368 | usleep_range(min: 1000, max: 2000); |
369 | } |
370 | |
371 | static const struct rcar_thermal_info rcar_m3w_thermal_info = { |
372 | .ths_tj_1 = 116, |
373 | .read_fuses = rcar_gen3_thermal_read_fuses_gen3, |
374 | }; |
375 | |
376 | static const struct rcar_thermal_info rcar_gen3_thermal_info = { |
377 | .ths_tj_1 = 126, |
378 | .read_fuses = rcar_gen3_thermal_read_fuses_gen3, |
379 | }; |
380 | |
381 | static const struct rcar_thermal_info rcar_gen4_thermal_info = { |
382 | .ths_tj_1 = 126, |
383 | .read_fuses = rcar_gen3_thermal_read_fuses_gen4, |
384 | }; |
385 | |
386 | static const struct of_device_id rcar_gen3_thermal_dt_ids[] = { |
387 | { |
388 | .compatible = "renesas,r8a774a1-thermal" , |
389 | .data = &rcar_m3w_thermal_info, |
390 | }, |
391 | { |
392 | .compatible = "renesas,r8a774b1-thermal" , |
393 | .data = &rcar_gen3_thermal_info, |
394 | }, |
395 | { |
396 | .compatible = "renesas,r8a774e1-thermal" , |
397 | .data = &rcar_gen3_thermal_info, |
398 | }, |
399 | { |
400 | .compatible = "renesas,r8a7795-thermal" , |
401 | .data = &rcar_gen3_thermal_info, |
402 | }, |
403 | { |
404 | .compatible = "renesas,r8a7796-thermal" , |
405 | .data = &rcar_m3w_thermal_info, |
406 | }, |
407 | { |
408 | .compatible = "renesas,r8a77961-thermal" , |
409 | .data = &rcar_m3w_thermal_info, |
410 | }, |
411 | { |
412 | .compatible = "renesas,r8a77965-thermal" , |
413 | .data = &rcar_gen3_thermal_info, |
414 | }, |
415 | { |
416 | .compatible = "renesas,r8a77980-thermal" , |
417 | .data = &rcar_gen3_thermal_info, |
418 | }, |
419 | { |
420 | .compatible = "renesas,r8a779a0-thermal" , |
421 | .data = &rcar_gen3_thermal_info, |
422 | }, |
423 | { |
424 | .compatible = "renesas,r8a779f0-thermal" , |
425 | .data = &rcar_gen4_thermal_info, |
426 | }, |
427 | { |
428 | .compatible = "renesas,r8a779g0-thermal" , |
429 | .data = &rcar_gen4_thermal_info, |
430 | }, |
431 | {}, |
432 | }; |
433 | MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids); |
434 | |
435 | static void rcar_gen3_thermal_remove(struct platform_device *pdev) |
436 | { |
437 | struct device *dev = &pdev->dev; |
438 | |
439 | pm_runtime_put(dev); |
440 | pm_runtime_disable(dev); |
441 | } |
442 | |
443 | static void rcar_gen3_hwmon_action(void *data) |
444 | { |
445 | struct thermal_zone_device *zone = data; |
446 | |
447 | thermal_remove_hwmon_sysfs(tz: zone); |
448 | } |
449 | |
450 | static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv, |
451 | struct platform_device *pdev) |
452 | { |
453 | struct device *dev = &pdev->dev; |
454 | unsigned int i; |
455 | char *irqname; |
456 | int ret, irq; |
457 | |
458 | for (i = 0; i < 2; i++) { |
459 | irq = platform_get_irq_optional(pdev, i); |
460 | if (irq < 0) |
461 | return irq; |
462 | |
463 | irqname = devm_kasprintf(dev, GFP_KERNEL, fmt: "%s:ch%d" , |
464 | dev_name(dev), i); |
465 | if (!irqname) |
466 | return -ENOMEM; |
467 | |
468 | ret = devm_request_threaded_irq(dev, irq, NULL, |
469 | thread_fn: rcar_gen3_thermal_irq, |
470 | IRQF_ONESHOT, devname: irqname, dev_id: priv); |
471 | if (ret) |
472 | return ret; |
473 | } |
474 | |
475 | return 0; |
476 | } |
477 | |
478 | static int rcar_gen3_thermal_probe(struct platform_device *pdev) |
479 | { |
480 | struct rcar_gen3_thermal_priv *priv; |
481 | struct device *dev = &pdev->dev; |
482 | struct resource *res; |
483 | struct thermal_zone_device *zone; |
484 | unsigned int i; |
485 | int ret; |
486 | |
487 | priv = devm_kzalloc(dev, size: sizeof(*priv), GFP_KERNEL); |
488 | if (!priv) |
489 | return -ENOMEM; |
490 | |
491 | priv->ops = rcar_gen3_tz_of_ops; |
492 | |
493 | priv->info = of_device_get_match_data(dev); |
494 | platform_set_drvdata(pdev, data: priv); |
495 | |
496 | if (rcar_gen3_thermal_request_irqs(priv, pdev)) |
497 | priv->ops.set_trips = NULL; |
498 | |
499 | pm_runtime_enable(dev); |
500 | pm_runtime_get_sync(dev); |
501 | |
502 | for (i = 0; i < TSC_MAX_NUM; i++) { |
503 | struct rcar_gen3_thermal_tsc *tsc; |
504 | |
505 | res = platform_get_resource(pdev, IORESOURCE_MEM, i); |
506 | if (!res) |
507 | break; |
508 | |
509 | tsc = devm_kzalloc(dev, size: sizeof(*tsc), GFP_KERNEL); |
510 | if (!tsc) { |
511 | ret = -ENOMEM; |
512 | goto error_unregister; |
513 | } |
514 | |
515 | tsc->base = devm_ioremap_resource(dev, res); |
516 | if (IS_ERR(ptr: tsc->base)) { |
517 | ret = PTR_ERR(ptr: tsc->base); |
518 | goto error_unregister; |
519 | } |
520 | |
521 | priv->tscs[i] = tsc; |
522 | } |
523 | |
524 | priv->num_tscs = i; |
525 | |
526 | if (!rcar_gen3_thermal_read_fuses(priv)) |
527 | dev_info(dev, "No calibration values fused, fallback to driver values\n" ); |
528 | |
529 | for (i = 0; i < priv->num_tscs; i++) { |
530 | struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; |
531 | |
532 | rcar_gen3_thermal_init(priv, tsc); |
533 | rcar_gen3_thermal_calc_coefs(priv, tsc, ths_tj_1: priv->info->ths_tj_1); |
534 | |
535 | zone = devm_thermal_of_zone_register(dev, id: i, data: tsc, ops: &priv->ops); |
536 | if (IS_ERR(ptr: zone)) { |
537 | dev_err(dev, "Sensor %u: Can't register thermal zone\n" , i); |
538 | ret = PTR_ERR(ptr: zone); |
539 | goto error_unregister; |
540 | } |
541 | tsc->zone = zone; |
542 | |
543 | ret = thermal_add_hwmon_sysfs(tz: tsc->zone); |
544 | if (ret) |
545 | goto error_unregister; |
546 | |
547 | ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone); |
548 | if (ret) |
549 | goto error_unregister; |
550 | |
551 | ret = thermal_zone_get_num_trips(tz: tsc->zone); |
552 | if (ret < 0) |
553 | goto error_unregister; |
554 | |
555 | dev_info(dev, "Sensor %u: Loaded %d trip points\n" , i, ret); |
556 | } |
557 | |
558 | if (!priv->num_tscs) { |
559 | ret = -ENODEV; |
560 | goto error_unregister; |
561 | } |
562 | |
563 | return 0; |
564 | |
565 | error_unregister: |
566 | rcar_gen3_thermal_remove(pdev); |
567 | |
568 | return ret; |
569 | } |
570 | |
571 | static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev) |
572 | { |
573 | struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev); |
574 | unsigned int i; |
575 | |
576 | for (i = 0; i < priv->num_tscs; i++) { |
577 | struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i]; |
578 | |
579 | rcar_gen3_thermal_init(priv, tsc); |
580 | } |
581 | |
582 | return 0; |
583 | } |
584 | |
585 | static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL, |
586 | rcar_gen3_thermal_resume); |
587 | |
588 | static struct platform_driver rcar_gen3_thermal_driver = { |
589 | .driver = { |
590 | .name = "rcar_gen3_thermal" , |
591 | .pm = &rcar_gen3_thermal_pm_ops, |
592 | .of_match_table = rcar_gen3_thermal_dt_ids, |
593 | }, |
594 | .probe = rcar_gen3_thermal_probe, |
595 | .remove_new = rcar_gen3_thermal_remove, |
596 | }; |
597 | module_platform_driver(rcar_gen3_thermal_driver); |
598 | |
599 | MODULE_LICENSE("GPL v2" ); |
600 | MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver" ); |
601 | MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>" ); |
602 | |