1// SPDX-License-Identifier: GPL-1.0+
2/*
3 * $Id: synclink.c,v 4.38 2005/11/07 16:30:34 paulkf Exp $
4 *
5 * Device driver for Microgate SyncLink ISA and PCI
6 * high speed multiprotocol serial adapters.
7 *
8 * written by Paul Fulghum for Microgate Corporation
9 * paulkf@microgate.com
10 *
11 * Microgate and SyncLink are trademarks of Microgate Corporation
12 *
13 * Derived from serial.c written by Theodore Ts'o and Linus Torvalds
14 *
15 * Original release 01/11/99
16 *
17 * This driver is primarily intended for use in synchronous
18 * HDLC mode. Asynchronous mode is also provided.
19 *
20 * When operating in synchronous mode, each call to mgsl_write()
21 * contains exactly one complete HDLC frame. Calling mgsl_put_char
22 * will start assembling an HDLC frame that will not be sent until
23 * mgsl_flush_chars or mgsl_write is called.
24 *
25 * Synchronous receive data is reported as complete frames. To accomplish
26 * this, the TTY flip buffer is bypassed (too small to hold largest
27 * frame and may fragment frames) and the line discipline
28 * receive entry point is called directly.
29 *
30 * This driver has been tested with a slightly modified ppp.c driver
31 * for synchronous PPP.
32 *
33 * 2000/02/16
34 * Added interface for syncppp.c driver (an alternate synchronous PPP
35 * implementation that also supports Cisco HDLC). Each device instance
36 * registers as a tty device AND a network device (if dosyncppp option
37 * is set for the device). The functionality is determined by which
38 * device interface is opened.
39 *
40 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
41 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
42 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
43 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
44 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
45 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
46 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
48 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
49 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
50 * OF THE POSSIBILITY OF SUCH DAMAGE.
51 */
52
53#if defined(__i386__)
54# define BREAKPOINT() asm(" int $3");
55#else
56# define BREAKPOINT() { }
57#endif
58
59#define MAX_ISA_DEVICES 10
60#define MAX_PCI_DEVICES 10
61#define MAX_TOTAL_DEVICES 20
62
63#include <linux/module.h>
64#include <linux/errno.h>
65#include <linux/signal.h>
66#include <linux/sched.h>
67#include <linux/timer.h>
68#include <linux/interrupt.h>
69#include <linux/pci.h>
70#include <linux/tty.h>
71#include <linux/tty_flip.h>
72#include <linux/serial.h>
73#include <linux/major.h>
74#include <linux/string.h>
75#include <linux/fcntl.h>
76#include <linux/ptrace.h>
77#include <linux/ioport.h>
78#include <linux/mm.h>
79#include <linux/seq_file.h>
80#include <linux/slab.h>
81#include <linux/delay.h>
82#include <linux/netdevice.h>
83#include <linux/vmalloc.h>
84#include <linux/init.h>
85#include <linux/ioctl.h>
86#include <linux/synclink.h>
87
88#include <asm/io.h>
89#include <asm/irq.h>
90#include <asm/dma.h>
91#include <linux/bitops.h>
92#include <asm/types.h>
93#include <linux/termios.h>
94#include <linux/workqueue.h>
95#include <linux/hdlc.h>
96#include <linux/dma-mapping.h>
97
98#if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_MODULE))
99#define SYNCLINK_GENERIC_HDLC 1
100#else
101#define SYNCLINK_GENERIC_HDLC 0
102#endif
103
104#define GET_USER(error,value,addr) error = get_user(value,addr)
105#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
106#define PUT_USER(error,value,addr) error = put_user(value,addr)
107#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
108
109#include <linux/uaccess.h>
110
111#define RCLRVALUE 0xffff
112
113static MGSL_PARAMS default_params = {
114 MGSL_MODE_HDLC, /* unsigned long mode */
115 0, /* unsigned char loopback; */
116 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
117 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
118 0, /* unsigned long clock_speed; */
119 0xff, /* unsigned char addr_filter; */
120 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
121 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
122 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
123 9600, /* unsigned long data_rate; */
124 8, /* unsigned char data_bits; */
125 1, /* unsigned char stop_bits; */
126 ASYNC_PARITY_NONE /* unsigned char parity; */
127};
128
129#define SHARED_MEM_ADDRESS_SIZE 0x40000
130#define BUFFERLISTSIZE 4096
131#define DMABUFFERSIZE 4096
132#define MAXRXFRAMES 7
133
134typedef struct _DMABUFFERENTRY
135{
136 u32 phys_addr; /* 32-bit flat physical address of data buffer */
137 volatile u16 count; /* buffer size/data count */
138 volatile u16 status; /* Control/status field */
139 volatile u16 rcc; /* character count field */
140 u16 reserved; /* padding required by 16C32 */
141 u32 link; /* 32-bit flat link to next buffer entry */
142 char *virt_addr; /* virtual address of data buffer */
143 u32 phys_entry; /* physical address of this buffer entry */
144 dma_addr_t dma_addr;
145} DMABUFFERENTRY, *DMAPBUFFERENTRY;
146
147/* The queue of BH actions to be performed */
148
149#define BH_RECEIVE 1
150#define BH_TRANSMIT 2
151#define BH_STATUS 4
152
153#define IO_PIN_SHUTDOWN_LIMIT 100
154
155struct _input_signal_events {
156 int ri_up;
157 int ri_down;
158 int dsr_up;
159 int dsr_down;
160 int dcd_up;
161 int dcd_down;
162 int cts_up;
163 int cts_down;
164};
165
166/* transmit holding buffer definitions*/
167#define MAX_TX_HOLDING_BUFFERS 5
168struct tx_holding_buffer {
169 int buffer_size;
170 unsigned char * buffer;
171};
172
173
174/*
175 * Device instance data structure
176 */
177
178struct mgsl_struct {
179 int magic;
180 struct tty_port port;
181 int line;
182 int hw_version;
183
184 struct mgsl_icount icount;
185
186 int timeout;
187 int x_char; /* xon/xoff character */
188 u16 read_status_mask;
189 u16 ignore_status_mask;
190 unsigned char *xmit_buf;
191 int xmit_head;
192 int xmit_tail;
193 int xmit_cnt;
194
195 wait_queue_head_t status_event_wait_q;
196 wait_queue_head_t event_wait_q;
197 struct timer_list tx_timer; /* HDLC transmit timeout timer */
198 struct mgsl_struct *next_device; /* device list link */
199
200 spinlock_t irq_spinlock; /* spinlock for synchronizing with ISR */
201 struct work_struct task; /* task structure for scheduling bh */
202
203 u32 EventMask; /* event trigger mask */
204 u32 RecordedEvents; /* pending events */
205
206 u32 max_frame_size; /* as set by device config */
207
208 u32 pending_bh;
209
210 bool bh_running; /* Protection from multiple */
211 int isr_overflow;
212 bool bh_requested;
213
214 int dcd_chkcount; /* check counts to prevent */
215 int cts_chkcount; /* too many IRQs if a signal */
216 int dsr_chkcount; /* is floating */
217 int ri_chkcount;
218
219 char *buffer_list; /* virtual address of Rx & Tx buffer lists */
220 u32 buffer_list_phys;
221 dma_addr_t buffer_list_dma_addr;
222
223 unsigned int rx_buffer_count; /* count of total allocated Rx buffers */
224 DMABUFFERENTRY *rx_buffer_list; /* list of receive buffer entries */
225 unsigned int current_rx_buffer;
226
227 int num_tx_dma_buffers; /* number of tx dma frames required */
228 int tx_dma_buffers_used;
229 unsigned int tx_buffer_count; /* count of total allocated Tx buffers */
230 DMABUFFERENTRY *tx_buffer_list; /* list of transmit buffer entries */
231 int start_tx_dma_buffer; /* tx dma buffer to start tx dma operation */
232 int current_tx_buffer; /* next tx dma buffer to be loaded */
233
234 unsigned char *intermediate_rxbuffer;
235
236 int num_tx_holding_buffers; /* number of tx holding buffer allocated */
237 int get_tx_holding_index; /* next tx holding buffer for adapter to load */
238 int put_tx_holding_index; /* next tx holding buffer to store user request */
239 int tx_holding_count; /* number of tx holding buffers waiting */
240 struct tx_holding_buffer tx_holding_buffers[MAX_TX_HOLDING_BUFFERS];
241
242 bool rx_enabled;
243 bool rx_overflow;
244 bool rx_rcc_underrun;
245
246 bool tx_enabled;
247 bool tx_active;
248 u32 idle_mode;
249
250 u16 cmr_value;
251 u16 tcsr_value;
252
253 char device_name[25]; /* device instance name */
254
255 unsigned int bus_type; /* expansion bus type (ISA,EISA,PCI) */
256 unsigned char bus; /* expansion bus number (zero based) */
257 unsigned char function; /* PCI device number */
258
259 unsigned int io_base; /* base I/O address of adapter */
260 unsigned int io_addr_size; /* size of the I/O address range */
261 bool io_addr_requested; /* true if I/O address requested */
262
263 unsigned int irq_level; /* interrupt level */
264 unsigned long irq_flags;
265 bool irq_requested; /* true if IRQ requested */
266
267 unsigned int dma_level; /* DMA channel */
268 bool dma_requested; /* true if dma channel requested */
269
270 u16 mbre_bit;
271 u16 loopback_bits;
272 u16 usc_idle_mode;
273
274 MGSL_PARAMS params; /* communications parameters */
275
276 unsigned char serial_signals; /* current serial signal states */
277
278 bool irq_occurred; /* for diagnostics use */
279 unsigned int init_error; /* Initialization startup error (DIAGS) */
280 int fDiagnosticsmode; /* Driver in Diagnostic mode? (DIAGS) */
281
282 u32 last_mem_alloc;
283 unsigned char* memory_base; /* shared memory address (PCI only) */
284 u32 phys_memory_base;
285 bool shared_mem_requested;
286
287 unsigned char* lcr_base; /* local config registers (PCI only) */
288 u32 phys_lcr_base;
289 u32 lcr_offset;
290 bool lcr_mem_requested;
291
292 u32 misc_ctrl_value;
293 char *flag_buf;
294 bool drop_rts_on_tx_done;
295
296 bool loopmode_insert_requested;
297 bool loopmode_send_done_requested;
298
299 struct _input_signal_events input_signal_events;
300
301 /* generic HDLC device parts */
302 int netcount;
303 spinlock_t netlock;
304
305#if SYNCLINK_GENERIC_HDLC
306 struct net_device *netdev;
307#endif
308};
309
310#define MGSL_MAGIC 0x5401
311
312/*
313 * The size of the serial xmit buffer is 1 page, or 4096 bytes
314 */
315#ifndef SERIAL_XMIT_SIZE
316#define SERIAL_XMIT_SIZE 4096
317#endif
318
319/*
320 * These macros define the offsets used in calculating the
321 * I/O address of the specified USC registers.
322 */
323
324
325#define DCPIN 2 /* Bit 1 of I/O address */
326#define SDPIN 4 /* Bit 2 of I/O address */
327
328#define DCAR 0 /* DMA command/address register */
329#define CCAR SDPIN /* channel command/address register */
330#define DATAREG DCPIN + SDPIN /* serial data register */
331#define MSBONLY 0x41
332#define LSBONLY 0x40
333
334/*
335 * These macros define the register address (ordinal number)
336 * used for writing address/value pairs to the USC.
337 */
338
339#define CMR 0x02 /* Channel mode Register */
340#define CCSR 0x04 /* Channel Command/status Register */
341#define CCR 0x06 /* Channel Control Register */
342#define PSR 0x08 /* Port status Register */
343#define PCR 0x0a /* Port Control Register */
344#define TMDR 0x0c /* Test mode Data Register */
345#define TMCR 0x0e /* Test mode Control Register */
346#define CMCR 0x10 /* Clock mode Control Register */
347#define HCR 0x12 /* Hardware Configuration Register */
348#define IVR 0x14 /* Interrupt Vector Register */
349#define IOCR 0x16 /* Input/Output Control Register */
350#define ICR 0x18 /* Interrupt Control Register */
351#define DCCR 0x1a /* Daisy Chain Control Register */
352#define MISR 0x1c /* Misc Interrupt status Register */
353#define SICR 0x1e /* status Interrupt Control Register */
354#define RDR 0x20 /* Receive Data Register */
355#define RMR 0x22 /* Receive mode Register */
356#define RCSR 0x24 /* Receive Command/status Register */
357#define RICR 0x26 /* Receive Interrupt Control Register */
358#define RSR 0x28 /* Receive Sync Register */
359#define RCLR 0x2a /* Receive count Limit Register */
360#define RCCR 0x2c /* Receive Character count Register */
361#define TC0R 0x2e /* Time Constant 0 Register */
362#define TDR 0x30 /* Transmit Data Register */
363#define TMR 0x32 /* Transmit mode Register */
364#define TCSR 0x34 /* Transmit Command/status Register */
365#define TICR 0x36 /* Transmit Interrupt Control Register */
366#define TSR 0x38 /* Transmit Sync Register */
367#define TCLR 0x3a /* Transmit count Limit Register */
368#define TCCR 0x3c /* Transmit Character count Register */
369#define TC1R 0x3e /* Time Constant 1 Register */
370
371
372/*
373 * MACRO DEFINITIONS FOR DMA REGISTERS
374 */
375
376#define DCR 0x06 /* DMA Control Register (shared) */
377#define DACR 0x08 /* DMA Array count Register (shared) */
378#define BDCR 0x12 /* Burst/Dwell Control Register (shared) */
379#define DIVR 0x14 /* DMA Interrupt Vector Register (shared) */
380#define DICR 0x18 /* DMA Interrupt Control Register (shared) */
381#define CDIR 0x1a /* Clear DMA Interrupt Register (shared) */
382#define SDIR 0x1c /* Set DMA Interrupt Register (shared) */
383
384#define TDMR 0x02 /* Transmit DMA mode Register */
385#define TDIAR 0x1e /* Transmit DMA Interrupt Arm Register */
386#define TBCR 0x2a /* Transmit Byte count Register */
387#define TARL 0x2c /* Transmit Address Register (low) */
388#define TARU 0x2e /* Transmit Address Register (high) */
389#define NTBCR 0x3a /* Next Transmit Byte count Register */
390#define NTARL 0x3c /* Next Transmit Address Register (low) */
391#define NTARU 0x3e /* Next Transmit Address Register (high) */
392
393#define RDMR 0x82 /* Receive DMA mode Register (non-shared) */
394#define RDIAR 0x9e /* Receive DMA Interrupt Arm Register */
395#define RBCR 0xaa /* Receive Byte count Register */
396#define RARL 0xac /* Receive Address Register (low) */
397#define RARU 0xae /* Receive Address Register (high) */
398#define NRBCR 0xba /* Next Receive Byte count Register */
399#define NRARL 0xbc /* Next Receive Address Register (low) */
400#define NRARU 0xbe /* Next Receive Address Register (high) */
401
402
403/*
404 * MACRO DEFINITIONS FOR MODEM STATUS BITS
405 */
406
407#define MODEMSTATUS_DTR 0x80
408#define MODEMSTATUS_DSR 0x40
409#define MODEMSTATUS_RTS 0x20
410#define MODEMSTATUS_CTS 0x10
411#define MODEMSTATUS_RI 0x04
412#define MODEMSTATUS_DCD 0x01
413
414
415/*
416 * Channel Command/Address Register (CCAR) Command Codes
417 */
418
419#define RTCmd_Null 0x0000
420#define RTCmd_ResetHighestIus 0x1000
421#define RTCmd_TriggerChannelLoadDma 0x2000
422#define RTCmd_TriggerRxDma 0x2800
423#define RTCmd_TriggerTxDma 0x3000
424#define RTCmd_TriggerRxAndTxDma 0x3800
425#define RTCmd_PurgeRxFifo 0x4800
426#define RTCmd_PurgeTxFifo 0x5000
427#define RTCmd_PurgeRxAndTxFifo 0x5800
428#define RTCmd_LoadRcc 0x6800
429#define RTCmd_LoadTcc 0x7000
430#define RTCmd_LoadRccAndTcc 0x7800
431#define RTCmd_LoadTC0 0x8800
432#define RTCmd_LoadTC1 0x9000
433#define RTCmd_LoadTC0AndTC1 0x9800
434#define RTCmd_SerialDataLSBFirst 0xa000
435#define RTCmd_SerialDataMSBFirst 0xa800
436#define RTCmd_SelectBigEndian 0xb000
437#define RTCmd_SelectLittleEndian 0xb800
438
439
440/*
441 * DMA Command/Address Register (DCAR) Command Codes
442 */
443
444#define DmaCmd_Null 0x0000
445#define DmaCmd_ResetTxChannel 0x1000
446#define DmaCmd_ResetRxChannel 0x1200
447#define DmaCmd_StartTxChannel 0x2000
448#define DmaCmd_StartRxChannel 0x2200
449#define DmaCmd_ContinueTxChannel 0x3000
450#define DmaCmd_ContinueRxChannel 0x3200
451#define DmaCmd_PauseTxChannel 0x4000
452#define DmaCmd_PauseRxChannel 0x4200
453#define DmaCmd_AbortTxChannel 0x5000
454#define DmaCmd_AbortRxChannel 0x5200
455#define DmaCmd_InitTxChannel 0x7000
456#define DmaCmd_InitRxChannel 0x7200
457#define DmaCmd_ResetHighestDmaIus 0x8000
458#define DmaCmd_ResetAllChannels 0x9000
459#define DmaCmd_StartAllChannels 0xa000
460#define DmaCmd_ContinueAllChannels 0xb000
461#define DmaCmd_PauseAllChannels 0xc000
462#define DmaCmd_AbortAllChannels 0xd000
463#define DmaCmd_InitAllChannels 0xf000
464
465#define TCmd_Null 0x0000
466#define TCmd_ClearTxCRC 0x2000
467#define TCmd_SelectTicrTtsaData 0x4000
468#define TCmd_SelectTicrTxFifostatus 0x5000
469#define TCmd_SelectTicrIntLevel 0x6000
470#define TCmd_SelectTicrdma_level 0x7000
471#define TCmd_SendFrame 0x8000
472#define TCmd_SendAbort 0x9000
473#define TCmd_EnableDleInsertion 0xc000
474#define TCmd_DisableDleInsertion 0xd000
475#define TCmd_ClearEofEom 0xe000
476#define TCmd_SetEofEom 0xf000
477
478#define RCmd_Null 0x0000
479#define RCmd_ClearRxCRC 0x2000
480#define RCmd_EnterHuntmode 0x3000
481#define RCmd_SelectRicrRtsaData 0x4000
482#define RCmd_SelectRicrRxFifostatus 0x5000
483#define RCmd_SelectRicrIntLevel 0x6000
484#define RCmd_SelectRicrdma_level 0x7000
485
486/*
487 * Bits for enabling and disabling IRQs in Interrupt Control Register (ICR)
488 */
489
490#define RECEIVE_STATUS BIT5
491#define RECEIVE_DATA BIT4
492#define TRANSMIT_STATUS BIT3
493#define TRANSMIT_DATA BIT2
494#define IO_PIN BIT1
495#define MISC BIT0
496
497
498/*
499 * Receive status Bits in Receive Command/status Register RCSR
500 */
501
502#define RXSTATUS_SHORT_FRAME BIT8
503#define RXSTATUS_CODE_VIOLATION BIT8
504#define RXSTATUS_EXITED_HUNT BIT7
505#define RXSTATUS_IDLE_RECEIVED BIT6
506#define RXSTATUS_BREAK_RECEIVED BIT5
507#define RXSTATUS_ABORT_RECEIVED BIT5
508#define RXSTATUS_RXBOUND BIT4
509#define RXSTATUS_CRC_ERROR BIT3
510#define RXSTATUS_FRAMING_ERROR BIT3
511#define RXSTATUS_ABORT BIT2
512#define RXSTATUS_PARITY_ERROR BIT2
513#define RXSTATUS_OVERRUN BIT1
514#define RXSTATUS_DATA_AVAILABLE BIT0
515#define RXSTATUS_ALL 0x01f6
516#define usc_UnlatchRxstatusBits(a,b) usc_OutReg( (a), RCSR, (u16)((b) & RXSTATUS_ALL) )
517
518/*
519 * Values for setting transmit idle mode in
520 * Transmit Control/status Register (TCSR)
521 */
522#define IDLEMODE_FLAGS 0x0000
523#define IDLEMODE_ALT_ONE_ZERO 0x0100
524#define IDLEMODE_ZERO 0x0200
525#define IDLEMODE_ONE 0x0300
526#define IDLEMODE_ALT_MARK_SPACE 0x0500
527#define IDLEMODE_SPACE 0x0600
528#define IDLEMODE_MARK 0x0700
529#define IDLEMODE_MASK 0x0700
530
531/*
532 * IUSC revision identifiers
533 */
534#define IUSC_SL1660 0x4d44
535#define IUSC_PRE_SL1660 0x4553
536
537/*
538 * Transmit status Bits in Transmit Command/status Register (TCSR)
539 */
540
541#define TCSR_PRESERVE 0x0F00
542
543#define TCSR_UNDERWAIT BIT11
544#define TXSTATUS_PREAMBLE_SENT BIT7
545#define TXSTATUS_IDLE_SENT BIT6
546#define TXSTATUS_ABORT_SENT BIT5
547#define TXSTATUS_EOF_SENT BIT4
548#define TXSTATUS_EOM_SENT BIT4
549#define TXSTATUS_CRC_SENT BIT3
550#define TXSTATUS_ALL_SENT BIT2
551#define TXSTATUS_UNDERRUN BIT1
552#define TXSTATUS_FIFO_EMPTY BIT0
553#define TXSTATUS_ALL 0x00fa
554#define usc_UnlatchTxstatusBits(a,b) usc_OutReg( (a), TCSR, (u16)((a)->tcsr_value + ((b) & 0x00FF)) )
555
556
557#define MISCSTATUS_RXC_LATCHED BIT15
558#define MISCSTATUS_RXC BIT14
559#define MISCSTATUS_TXC_LATCHED BIT13
560#define MISCSTATUS_TXC BIT12
561#define MISCSTATUS_RI_LATCHED BIT11
562#define MISCSTATUS_RI BIT10
563#define MISCSTATUS_DSR_LATCHED BIT9
564#define MISCSTATUS_DSR BIT8
565#define MISCSTATUS_DCD_LATCHED BIT7
566#define MISCSTATUS_DCD BIT6
567#define MISCSTATUS_CTS_LATCHED BIT5
568#define MISCSTATUS_CTS BIT4
569#define MISCSTATUS_RCC_UNDERRUN BIT3
570#define MISCSTATUS_DPLL_NO_SYNC BIT2
571#define MISCSTATUS_BRG1_ZERO BIT1
572#define MISCSTATUS_BRG0_ZERO BIT0
573
574#define usc_UnlatchIostatusBits(a,b) usc_OutReg((a),MISR,(u16)((b) & 0xaaa0))
575#define usc_UnlatchMiscstatusBits(a,b) usc_OutReg((a),MISR,(u16)((b) & 0x000f))
576
577#define SICR_RXC_ACTIVE BIT15
578#define SICR_RXC_INACTIVE BIT14
579#define SICR_RXC (BIT15|BIT14)
580#define SICR_TXC_ACTIVE BIT13
581#define SICR_TXC_INACTIVE BIT12
582#define SICR_TXC (BIT13|BIT12)
583#define SICR_RI_ACTIVE BIT11
584#define SICR_RI_INACTIVE BIT10
585#define SICR_RI (BIT11|BIT10)
586#define SICR_DSR_ACTIVE BIT9
587#define SICR_DSR_INACTIVE BIT8
588#define SICR_DSR (BIT9|BIT8)
589#define SICR_DCD_ACTIVE BIT7
590#define SICR_DCD_INACTIVE BIT6
591#define SICR_DCD (BIT7|BIT6)
592#define SICR_CTS_ACTIVE BIT5
593#define SICR_CTS_INACTIVE BIT4
594#define SICR_CTS (BIT5|BIT4)
595#define SICR_RCC_UNDERFLOW BIT3
596#define SICR_DPLL_NO_SYNC BIT2
597#define SICR_BRG1_ZERO BIT1
598#define SICR_BRG0_ZERO BIT0
599
600void usc_DisableMasterIrqBit( struct mgsl_struct *info );
601void usc_EnableMasterIrqBit( struct mgsl_struct *info );
602void usc_EnableInterrupts( struct mgsl_struct *info, u16 IrqMask );
603void usc_DisableInterrupts( struct mgsl_struct *info, u16 IrqMask );
604void usc_ClearIrqPendingBits( struct mgsl_struct *info, u16 IrqMask );
605
606#define usc_EnableInterrupts( a, b ) \
607 usc_OutReg( (a), ICR, (u16)((usc_InReg((a),ICR) & 0xff00) + 0xc0 + (b)) )
608
609#define usc_DisableInterrupts( a, b ) \
610 usc_OutReg( (a), ICR, (u16)((usc_InReg((a),ICR) & 0xff00) + 0x80 + (b)) )
611
612#define usc_EnableMasterIrqBit(a) \
613 usc_OutReg( (a), ICR, (u16)((usc_InReg((a),ICR) & 0x0f00) + 0xb000) )
614
615#define usc_DisableMasterIrqBit(a) \
616 usc_OutReg( (a), ICR, (u16)(usc_InReg((a),ICR) & 0x7f00) )
617
618#define usc_ClearIrqPendingBits( a, b ) usc_OutReg( (a), DCCR, 0x40 + (b) )
619
620/*
621 * Transmit status Bits in Transmit Control status Register (TCSR)
622 * and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0)
623 */
624
625#define TXSTATUS_PREAMBLE_SENT BIT7
626#define TXSTATUS_IDLE_SENT BIT6
627#define TXSTATUS_ABORT_SENT BIT5
628#define TXSTATUS_EOF BIT4
629#define TXSTATUS_CRC_SENT BIT3
630#define TXSTATUS_ALL_SENT BIT2
631#define TXSTATUS_UNDERRUN BIT1
632#define TXSTATUS_FIFO_EMPTY BIT0
633
634#define DICR_MASTER BIT15
635#define DICR_TRANSMIT BIT0
636#define DICR_RECEIVE BIT1
637
638#define usc_EnableDmaInterrupts(a,b) \
639 usc_OutDmaReg( (a), DICR, (u16)(usc_InDmaReg((a),DICR) | (b)) )
640
641#define usc_DisableDmaInterrupts(a,b) \
642 usc_OutDmaReg( (a), DICR, (u16)(usc_InDmaReg((a),DICR) & ~(b)) )
643
644#define usc_EnableStatusIrqs(a,b) \
645 usc_OutReg( (a), SICR, (u16)(usc_InReg((a),SICR) | (b)) )
646
647#define usc_DisablestatusIrqs(a,b) \
648 usc_OutReg( (a), SICR, (u16)(usc_InReg((a),SICR) & ~(b)) )
649
650/* Transmit status Bits in Transmit Control status Register (TCSR) */
651/* and Transmit Interrupt Control Register (TICR) (except BIT2, BIT0) */
652
653
654#define DISABLE_UNCONDITIONAL 0
655#define DISABLE_END_OF_FRAME 1
656#define ENABLE_UNCONDITIONAL 2
657#define ENABLE_AUTO_CTS 3
658#define ENABLE_AUTO_DCD 3
659#define usc_EnableTransmitter(a,b) \
660 usc_OutReg( (a), TMR, (u16)((usc_InReg((a),TMR) & 0xfffc) | (b)) )
661#define usc_EnableReceiver(a,b) \
662 usc_OutReg( (a), RMR, (u16)((usc_InReg((a),RMR) & 0xfffc) | (b)) )
663
664static u16 usc_InDmaReg( struct mgsl_struct *info, u16 Port );
665static void usc_OutDmaReg( struct mgsl_struct *info, u16 Port, u16 Value );
666static void usc_DmaCmd( struct mgsl_struct *info, u16 Cmd );
667
668static u16 usc_InReg( struct mgsl_struct *info, u16 Port );
669static void usc_OutReg( struct mgsl_struct *info, u16 Port, u16 Value );
670static void usc_RTCmd( struct mgsl_struct *info, u16 Cmd );
671void usc_RCmd( struct mgsl_struct *info, u16 Cmd );
672void usc_TCmd( struct mgsl_struct *info, u16 Cmd );
673
674#define usc_TCmd(a,b) usc_OutReg((a), TCSR, (u16)((a)->tcsr_value + (b)))
675#define usc_RCmd(a,b) usc_OutReg((a), RCSR, (b))
676
677#define usc_SetTransmitSyncChars(a,s0,s1) usc_OutReg((a), TSR, (u16)(((u16)s0<<8)|(u16)s1))
678
679static void usc_process_rxoverrun_sync( struct mgsl_struct *info );
680static void usc_start_receiver( struct mgsl_struct *info );
681static void usc_stop_receiver( struct mgsl_struct *info );
682
683static void usc_start_transmitter( struct mgsl_struct *info );
684static void usc_stop_transmitter( struct mgsl_struct *info );
685static void usc_set_txidle( struct mgsl_struct *info );
686static void usc_load_txfifo( struct mgsl_struct *info );
687
688static void usc_enable_aux_clock( struct mgsl_struct *info, u32 DataRate );
689static void usc_enable_loopback( struct mgsl_struct *info, int enable );
690
691static void usc_get_serial_signals( struct mgsl_struct *info );
692static void usc_set_serial_signals( struct mgsl_struct *info );
693
694static void usc_reset( struct mgsl_struct *info );
695
696static void usc_set_sync_mode( struct mgsl_struct *info );
697static void usc_set_sdlc_mode( struct mgsl_struct *info );
698static void usc_set_async_mode( struct mgsl_struct *info );
699static void usc_enable_async_clock( struct mgsl_struct *info, u32 DataRate );
700
701static void usc_loopback_frame( struct mgsl_struct *info );
702
703static void mgsl_tx_timeout(struct timer_list *t);
704
705
706static void usc_loopmode_cancel_transmit( struct mgsl_struct * info );
707static void usc_loopmode_insert_request( struct mgsl_struct * info );
708static int usc_loopmode_active( struct mgsl_struct * info);
709static void usc_loopmode_send_done( struct mgsl_struct * info );
710
711static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg);
712
713#if SYNCLINK_GENERIC_HDLC
714#define dev_to_port(D) (dev_to_hdlc(D)->priv)
715static void hdlcdev_tx_done(struct mgsl_struct *info);
716static void hdlcdev_rx(struct mgsl_struct *info, char *buf, int size);
717static int hdlcdev_init(struct mgsl_struct *info);
718static void hdlcdev_exit(struct mgsl_struct *info);
719#endif
720
721/*
722 * Defines a BUS descriptor value for the PCI adapter
723 * local bus address ranges.
724 */
725
726#define BUS_DESCRIPTOR( WrHold, WrDly, RdDly, Nwdd, Nwad, Nxda, Nrdd, Nrad ) \
727(0x00400020 + \
728((WrHold) << 30) + \
729((WrDly) << 28) + \
730((RdDly) << 26) + \
731((Nwdd) << 20) + \
732((Nwad) << 15) + \
733((Nxda) << 13) + \
734((Nrdd) << 11) + \
735((Nrad) << 6) )
736
737static void mgsl_trace_block(struct mgsl_struct *info,const char* data, int count, int xmit);
738
739/*
740 * Adapter diagnostic routines
741 */
742static bool mgsl_register_test( struct mgsl_struct *info );
743static bool mgsl_irq_test( struct mgsl_struct *info );
744static bool mgsl_dma_test( struct mgsl_struct *info );
745static bool mgsl_memory_test( struct mgsl_struct *info );
746static int mgsl_adapter_test( struct mgsl_struct *info );
747
748/*
749 * device and resource management routines
750 */
751static int mgsl_claim_resources(struct mgsl_struct *info);
752static void mgsl_release_resources(struct mgsl_struct *info);
753static void mgsl_add_device(struct mgsl_struct *info);
754static struct mgsl_struct* mgsl_allocate_device(void);
755
756/*
757 * DMA buffer manupulation functions.
758 */
759static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned int EndIndex );
760static bool mgsl_get_rx_frame( struct mgsl_struct *info );
761static bool mgsl_get_raw_rx_frame( struct mgsl_struct *info );
762static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info );
763static void mgsl_reset_tx_dma_buffers( struct mgsl_struct *info );
764static int num_free_tx_dma_buffers(struct mgsl_struct *info);
765static void mgsl_load_tx_dma_buffer( struct mgsl_struct *info, const char *Buffer, unsigned int BufferSize);
766static void mgsl_load_pci_memory(char* TargetPtr, const char* SourcePtr, unsigned short count);
767
768/*
769 * DMA and Shared Memory buffer allocation and formatting
770 */
771static int mgsl_allocate_dma_buffers(struct mgsl_struct *info);
772static void mgsl_free_dma_buffers(struct mgsl_struct *info);
773static int mgsl_alloc_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList,int Buffercount);
774static void mgsl_free_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList,int Buffercount);
775static int mgsl_alloc_buffer_list_memory(struct mgsl_struct *info);
776static void mgsl_free_buffer_list_memory(struct mgsl_struct *info);
777static int mgsl_alloc_intermediate_rxbuffer_memory(struct mgsl_struct *info);
778static void mgsl_free_intermediate_rxbuffer_memory(struct mgsl_struct *info);
779static int mgsl_alloc_intermediate_txbuffer_memory(struct mgsl_struct *info);
780static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info);
781static bool load_next_tx_holding_buffer(struct mgsl_struct *info);
782static int save_tx_buffer_request(struct mgsl_struct *info,const char *Buffer, unsigned int BufferSize);
783
784/*
785 * Bottom half interrupt handlers
786 */
787static void mgsl_bh_handler(struct work_struct *work);
788static void mgsl_bh_receive(struct mgsl_struct *info);
789static void mgsl_bh_transmit(struct mgsl_struct *info);
790static void mgsl_bh_status(struct mgsl_struct *info);
791
792/*
793 * Interrupt handler routines and dispatch table.
794 */
795static void mgsl_isr_null( struct mgsl_struct *info );
796static void mgsl_isr_transmit_data( struct mgsl_struct *info );
797static void mgsl_isr_receive_data( struct mgsl_struct *info );
798static void mgsl_isr_receive_status( struct mgsl_struct *info );
799static void mgsl_isr_transmit_status( struct mgsl_struct *info );
800static void mgsl_isr_io_pin( struct mgsl_struct *info );
801static void mgsl_isr_misc( struct mgsl_struct *info );
802static void mgsl_isr_receive_dma( struct mgsl_struct *info );
803static void mgsl_isr_transmit_dma( struct mgsl_struct *info );
804
805typedef void (*isr_dispatch_func)(struct mgsl_struct *);
806
807static isr_dispatch_func UscIsrTable[7] =
808{
809 mgsl_isr_null,
810 mgsl_isr_misc,
811 mgsl_isr_io_pin,
812 mgsl_isr_transmit_data,
813 mgsl_isr_transmit_status,
814 mgsl_isr_receive_data,
815 mgsl_isr_receive_status
816};
817
818/*
819 * ioctl call handlers
820 */
821static int tiocmget(struct tty_struct *tty);
822static int tiocmset(struct tty_struct *tty,
823 unsigned int set, unsigned int clear);
824static int mgsl_get_stats(struct mgsl_struct * info, struct mgsl_icount
825 __user *user_icount);
826static int mgsl_get_params(struct mgsl_struct * info, MGSL_PARAMS __user *user_params);
827static int mgsl_set_params(struct mgsl_struct * info, MGSL_PARAMS __user *new_params);
828static int mgsl_get_txidle(struct mgsl_struct * info, int __user *idle_mode);
829static int mgsl_set_txidle(struct mgsl_struct * info, int idle_mode);
830static int mgsl_txenable(struct mgsl_struct * info, int enable);
831static int mgsl_txabort(struct mgsl_struct * info);
832static int mgsl_rxenable(struct mgsl_struct * info, int enable);
833static int mgsl_wait_event(struct mgsl_struct * info, int __user *mask);
834static int mgsl_loopmode_send_done( struct mgsl_struct * info );
835
836/* set non-zero on successful registration with PCI subsystem */
837static bool pci_registered;
838
839/*
840 * Global linked list of SyncLink devices
841 */
842static struct mgsl_struct *mgsl_device_list;
843static int mgsl_device_count;
844
845/*
846 * Set this param to non-zero to load eax with the
847 * .text section address and breakpoint on module load.
848 * This is useful for use with gdb and add-symbol-file command.
849 */
850static bool break_on_load;
851
852/*
853 * Driver major number, defaults to zero to get auto
854 * assigned major number. May be forced as module parameter.
855 */
856static int ttymajor;
857
858/*
859 * Array of user specified options for ISA adapters.
860 */
861static int io[MAX_ISA_DEVICES];
862static int irq[MAX_ISA_DEVICES];
863static int dma[MAX_ISA_DEVICES];
864static int debug_level;
865static int maxframe[MAX_TOTAL_DEVICES];
866static int txdmabufs[MAX_TOTAL_DEVICES];
867static int txholdbufs[MAX_TOTAL_DEVICES];
868
869module_param(break_on_load, bool, 0);
870module_param(ttymajor, int, 0);
871module_param_hw_array(io, int, ioport, NULL, 0);
872module_param_hw_array(irq, int, irq, NULL, 0);
873module_param_hw_array(dma, int, dma, NULL, 0);
874module_param(debug_level, int, 0);
875module_param_array(maxframe, int, NULL, 0);
876module_param_array(txdmabufs, int, NULL, 0);
877module_param_array(txholdbufs, int, NULL, 0);
878
879static char *driver_name = "SyncLink serial driver";
880static char *driver_version = "$Revision: 4.38 $";
881
882static int synclink_init_one (struct pci_dev *dev,
883 const struct pci_device_id *ent);
884static void synclink_remove_one (struct pci_dev *dev);
885
886static const struct pci_device_id synclink_pci_tbl[] = {
887 { PCI_VENDOR_ID_MICROGATE, PCI_DEVICE_ID_MICROGATE_USC, PCI_ANY_ID, PCI_ANY_ID, },
888 { PCI_VENDOR_ID_MICROGATE, 0x0210, PCI_ANY_ID, PCI_ANY_ID, },
889 { 0, }, /* terminate list */
890};
891MODULE_DEVICE_TABLE(pci, synclink_pci_tbl);
892
893MODULE_LICENSE("GPL");
894
895static struct pci_driver synclink_pci_driver = {
896 .name = "synclink",
897 .id_table = synclink_pci_tbl,
898 .probe = synclink_init_one,
899 .remove = synclink_remove_one,
900};
901
902static struct tty_driver *serial_driver;
903
904/* number of characters left in xmit buffer before we ask for more */
905#define WAKEUP_CHARS 256
906
907
908static void mgsl_change_params(struct mgsl_struct *info);
909static void mgsl_wait_until_sent(struct tty_struct *tty, int timeout);
910
911/*
912 * 1st function defined in .text section. Calling this function in
913 * init_module() followed by a breakpoint allows a remote debugger
914 * (gdb) to get the .text address for the add-symbol-file command.
915 * This allows remote debugging of dynamically loadable modules.
916 */
917static void* mgsl_get_text_ptr(void)
918{
919 return mgsl_get_text_ptr;
920}
921
922static inline int mgsl_paranoia_check(struct mgsl_struct *info,
923 char *name, const char *routine)
924{
925#ifdef MGSL_PARANOIA_CHECK
926 static const char *badmagic =
927 "Warning: bad magic number for mgsl struct (%s) in %s\n";
928 static const char *badinfo =
929 "Warning: null mgsl_struct for (%s) in %s\n";
930
931 if (!info) {
932 printk(badinfo, name, routine);
933 return 1;
934 }
935 if (info->magic != MGSL_MAGIC) {
936 printk(badmagic, name, routine);
937 return 1;
938 }
939#else
940 if (!info)
941 return 1;
942#endif
943 return 0;
944}
945
946/**
947 * line discipline callback wrappers
948 *
949 * The wrappers maintain line discipline references
950 * while calling into the line discipline.
951 *
952 * ldisc_receive_buf - pass receive data to line discipline
953 */
954
955static void ldisc_receive_buf(struct tty_struct *tty,
956 const __u8 *data, char *flags, int count)
957{
958 struct tty_ldisc *ld;
959 if (!tty)
960 return;
961 ld = tty_ldisc_ref(tty);
962 if (ld) {
963 if (ld->ops->receive_buf)
964 ld->ops->receive_buf(tty, data, flags, count);
965 tty_ldisc_deref(ld);
966 }
967}
968
969/* mgsl_stop() throttle (stop) transmitter
970 *
971 * Arguments: tty pointer to tty info structure
972 * Return Value: None
973 */
974static void mgsl_stop(struct tty_struct *tty)
975{
976 struct mgsl_struct *info = tty->driver_data;
977 unsigned long flags;
978
979 if (mgsl_paranoia_check(info, tty->name, "mgsl_stop"))
980 return;
981
982 if ( debug_level >= DEBUG_LEVEL_INFO )
983 printk("mgsl_stop(%s)\n",info->device_name);
984
985 spin_lock_irqsave(&info->irq_spinlock,flags);
986 if (info->tx_enabled)
987 usc_stop_transmitter(info);
988 spin_unlock_irqrestore(&info->irq_spinlock,flags);
989
990} /* end of mgsl_stop() */
991
992/* mgsl_start() release (start) transmitter
993 *
994 * Arguments: tty pointer to tty info structure
995 * Return Value: None
996 */
997static void mgsl_start(struct tty_struct *tty)
998{
999 struct mgsl_struct *info = tty->driver_data;
1000 unsigned long flags;
1001
1002 if (mgsl_paranoia_check(info, tty->name, "mgsl_start"))
1003 return;
1004
1005 if ( debug_level >= DEBUG_LEVEL_INFO )
1006 printk("mgsl_start(%s)\n",info->device_name);
1007
1008 spin_lock_irqsave(&info->irq_spinlock,flags);
1009 if (!info->tx_enabled)
1010 usc_start_transmitter(info);
1011 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1012
1013} /* end of mgsl_start() */
1014
1015/*
1016 * Bottom half work queue access functions
1017 */
1018
1019/* mgsl_bh_action() Return next bottom half action to perform.
1020 * Return Value: BH action code or 0 if nothing to do.
1021 */
1022static int mgsl_bh_action(struct mgsl_struct *info)
1023{
1024 unsigned long flags;
1025 int rc = 0;
1026
1027 spin_lock_irqsave(&info->irq_spinlock,flags);
1028
1029 if (info->pending_bh & BH_RECEIVE) {
1030 info->pending_bh &= ~BH_RECEIVE;
1031 rc = BH_RECEIVE;
1032 } else if (info->pending_bh & BH_TRANSMIT) {
1033 info->pending_bh &= ~BH_TRANSMIT;
1034 rc = BH_TRANSMIT;
1035 } else if (info->pending_bh & BH_STATUS) {
1036 info->pending_bh &= ~BH_STATUS;
1037 rc = BH_STATUS;
1038 }
1039
1040 if (!rc) {
1041 /* Mark BH routine as complete */
1042 info->bh_running = false;
1043 info->bh_requested = false;
1044 }
1045
1046 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1047
1048 return rc;
1049}
1050
1051/*
1052 * Perform bottom half processing of work items queued by ISR.
1053 */
1054static void mgsl_bh_handler(struct work_struct *work)
1055{
1056 struct mgsl_struct *info =
1057 container_of(work, struct mgsl_struct, task);
1058 int action;
1059
1060 if ( debug_level >= DEBUG_LEVEL_BH )
1061 printk( "%s(%d):mgsl_bh_handler(%s) entry\n",
1062 __FILE__,__LINE__,info->device_name);
1063
1064 info->bh_running = true;
1065
1066 while((action = mgsl_bh_action(info)) != 0) {
1067
1068 /* Process work item */
1069 if ( debug_level >= DEBUG_LEVEL_BH )
1070 printk( "%s(%d):mgsl_bh_handler() work item action=%d\n",
1071 __FILE__,__LINE__,action);
1072
1073 switch (action) {
1074
1075 case BH_RECEIVE:
1076 mgsl_bh_receive(info);
1077 break;
1078 case BH_TRANSMIT:
1079 mgsl_bh_transmit(info);
1080 break;
1081 case BH_STATUS:
1082 mgsl_bh_status(info);
1083 break;
1084 default:
1085 /* unknown work item ID */
1086 printk("Unknown work item ID=%08X!\n", action);
1087 break;
1088 }
1089 }
1090
1091 if ( debug_level >= DEBUG_LEVEL_BH )
1092 printk( "%s(%d):mgsl_bh_handler(%s) exit\n",
1093 __FILE__,__LINE__,info->device_name);
1094}
1095
1096static void mgsl_bh_receive(struct mgsl_struct *info)
1097{
1098 bool (*get_rx_frame)(struct mgsl_struct *info) =
1099 (info->params.mode == MGSL_MODE_HDLC ? mgsl_get_rx_frame : mgsl_get_raw_rx_frame);
1100
1101 if ( debug_level >= DEBUG_LEVEL_BH )
1102 printk( "%s(%d):mgsl_bh_receive(%s)\n",
1103 __FILE__,__LINE__,info->device_name);
1104
1105 do
1106 {
1107 if (info->rx_rcc_underrun) {
1108 unsigned long flags;
1109 spin_lock_irqsave(&info->irq_spinlock,flags);
1110 usc_start_receiver(info);
1111 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1112 return;
1113 }
1114 } while(get_rx_frame(info));
1115}
1116
1117static void mgsl_bh_transmit(struct mgsl_struct *info)
1118{
1119 struct tty_struct *tty = info->port.tty;
1120 unsigned long flags;
1121
1122 if ( debug_level >= DEBUG_LEVEL_BH )
1123 printk( "%s(%d):mgsl_bh_transmit() entry on %s\n",
1124 __FILE__,__LINE__,info->device_name);
1125
1126 if (tty)
1127 tty_wakeup(tty);
1128
1129 /* if transmitter idle and loopmode_send_done_requested
1130 * then start echoing RxD to TxD
1131 */
1132 spin_lock_irqsave(&info->irq_spinlock,flags);
1133 if ( !info->tx_active && info->loopmode_send_done_requested )
1134 usc_loopmode_send_done( info );
1135 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1136}
1137
1138static void mgsl_bh_status(struct mgsl_struct *info)
1139{
1140 if ( debug_level >= DEBUG_LEVEL_BH )
1141 printk( "%s(%d):mgsl_bh_status() entry on %s\n",
1142 __FILE__,__LINE__,info->device_name);
1143
1144 info->ri_chkcount = 0;
1145 info->dsr_chkcount = 0;
1146 info->dcd_chkcount = 0;
1147 info->cts_chkcount = 0;
1148}
1149
1150/* mgsl_isr_receive_status()
1151 *
1152 * Service a receive status interrupt. The type of status
1153 * interrupt is indicated by the state of the RCSR.
1154 * This is only used for HDLC mode.
1155 *
1156 * Arguments: info pointer to device instance data
1157 * Return Value: None
1158 */
1159static void mgsl_isr_receive_status( struct mgsl_struct *info )
1160{
1161 u16 status = usc_InReg( info, RCSR );
1162
1163 if ( debug_level >= DEBUG_LEVEL_ISR )
1164 printk("%s(%d):mgsl_isr_receive_status status=%04X\n",
1165 __FILE__,__LINE__,status);
1166
1167 if ( (status & RXSTATUS_ABORT_RECEIVED) &&
1168 info->loopmode_insert_requested &&
1169 usc_loopmode_active(info) )
1170 {
1171 ++info->icount.rxabort;
1172 info->loopmode_insert_requested = false;
1173
1174 /* clear CMR:13 to start echoing RxD to TxD */
1175 info->cmr_value &= ~BIT13;
1176 usc_OutReg(info, CMR, info->cmr_value);
1177
1178 /* disable received abort irq (no longer required) */
1179 usc_OutReg(info, RICR,
1180 (usc_InReg(info, RICR) & ~RXSTATUS_ABORT_RECEIVED));
1181 }
1182
1183 if (status & (RXSTATUS_EXITED_HUNT | RXSTATUS_IDLE_RECEIVED)) {
1184 if (status & RXSTATUS_EXITED_HUNT)
1185 info->icount.exithunt++;
1186 if (status & RXSTATUS_IDLE_RECEIVED)
1187 info->icount.rxidle++;
1188 wake_up_interruptible(&info->event_wait_q);
1189 }
1190
1191 if (status & RXSTATUS_OVERRUN){
1192 info->icount.rxover++;
1193 usc_process_rxoverrun_sync( info );
1194 }
1195
1196 usc_ClearIrqPendingBits( info, RECEIVE_STATUS );
1197 usc_UnlatchRxstatusBits( info, status );
1198
1199} /* end of mgsl_isr_receive_status() */
1200
1201/* mgsl_isr_transmit_status()
1202 *
1203 * Service a transmit status interrupt
1204 * HDLC mode :end of transmit frame
1205 * Async mode:all data is sent
1206 * transmit status is indicated by bits in the TCSR.
1207 *
1208 * Arguments: info pointer to device instance data
1209 * Return Value: None
1210 */
1211static void mgsl_isr_transmit_status( struct mgsl_struct *info )
1212{
1213 u16 status = usc_InReg( info, TCSR );
1214
1215 if ( debug_level >= DEBUG_LEVEL_ISR )
1216 printk("%s(%d):mgsl_isr_transmit_status status=%04X\n",
1217 __FILE__,__LINE__,status);
1218
1219 usc_ClearIrqPendingBits( info, TRANSMIT_STATUS );
1220 usc_UnlatchTxstatusBits( info, status );
1221
1222 if ( status & (TXSTATUS_UNDERRUN | TXSTATUS_ABORT_SENT) )
1223 {
1224 /* finished sending HDLC abort. This may leave */
1225 /* the TxFifo with data from the aborted frame */
1226 /* so purge the TxFifo. Also shutdown the DMA */
1227 /* channel in case there is data remaining in */
1228 /* the DMA buffer */
1229 usc_DmaCmd( info, DmaCmd_ResetTxChannel );
1230 usc_RTCmd( info, RTCmd_PurgeTxFifo );
1231 }
1232
1233 if ( status & TXSTATUS_EOF_SENT )
1234 info->icount.txok++;
1235 else if ( status & TXSTATUS_UNDERRUN )
1236 info->icount.txunder++;
1237 else if ( status & TXSTATUS_ABORT_SENT )
1238 info->icount.txabort++;
1239 else
1240 info->icount.txunder++;
1241
1242 info->tx_active = false;
1243 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1244 del_timer(&info->tx_timer);
1245
1246 if ( info->drop_rts_on_tx_done ) {
1247 usc_get_serial_signals( info );
1248 if ( info->serial_signals & SerialSignal_RTS ) {
1249 info->serial_signals &= ~SerialSignal_RTS;
1250 usc_set_serial_signals( info );
1251 }
1252 info->drop_rts_on_tx_done = false;
1253 }
1254
1255#if SYNCLINK_GENERIC_HDLC
1256 if (info->netcount)
1257 hdlcdev_tx_done(info);
1258 else
1259#endif
1260 {
1261 if (info->port.tty->stopped || info->port.tty->hw_stopped) {
1262 usc_stop_transmitter(info);
1263 return;
1264 }
1265 info->pending_bh |= BH_TRANSMIT;
1266 }
1267
1268} /* end of mgsl_isr_transmit_status() */
1269
1270/* mgsl_isr_io_pin()
1271 *
1272 * Service an Input/Output pin interrupt. The type of
1273 * interrupt is indicated by bits in the MISR
1274 *
1275 * Arguments: info pointer to device instance data
1276 * Return Value: None
1277 */
1278static void mgsl_isr_io_pin( struct mgsl_struct *info )
1279{
1280 struct mgsl_icount *icount;
1281 u16 status = usc_InReg( info, MISR );
1282
1283 if ( debug_level >= DEBUG_LEVEL_ISR )
1284 printk("%s(%d):mgsl_isr_io_pin status=%04X\n",
1285 __FILE__,__LINE__,status);
1286
1287 usc_ClearIrqPendingBits( info, IO_PIN );
1288 usc_UnlatchIostatusBits( info, status );
1289
1290 if (status & (MISCSTATUS_CTS_LATCHED | MISCSTATUS_DCD_LATCHED |
1291 MISCSTATUS_DSR_LATCHED | MISCSTATUS_RI_LATCHED) ) {
1292 icount = &info->icount;
1293 /* update input line counters */
1294 if (status & MISCSTATUS_RI_LATCHED) {
1295 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1296 usc_DisablestatusIrqs(info,SICR_RI);
1297 icount->rng++;
1298 if ( status & MISCSTATUS_RI )
1299 info->input_signal_events.ri_up++;
1300 else
1301 info->input_signal_events.ri_down++;
1302 }
1303 if (status & MISCSTATUS_DSR_LATCHED) {
1304 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1305 usc_DisablestatusIrqs(info,SICR_DSR);
1306 icount->dsr++;
1307 if ( status & MISCSTATUS_DSR )
1308 info->input_signal_events.dsr_up++;
1309 else
1310 info->input_signal_events.dsr_down++;
1311 }
1312 if (status & MISCSTATUS_DCD_LATCHED) {
1313 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1314 usc_DisablestatusIrqs(info,SICR_DCD);
1315 icount->dcd++;
1316 if (status & MISCSTATUS_DCD) {
1317 info->input_signal_events.dcd_up++;
1318 } else
1319 info->input_signal_events.dcd_down++;
1320#if SYNCLINK_GENERIC_HDLC
1321 if (info->netcount) {
1322 if (status & MISCSTATUS_DCD)
1323 netif_carrier_on(info->netdev);
1324 else
1325 netif_carrier_off(info->netdev);
1326 }
1327#endif
1328 }
1329 if (status & MISCSTATUS_CTS_LATCHED)
1330 {
1331 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1332 usc_DisablestatusIrqs(info,SICR_CTS);
1333 icount->cts++;
1334 if ( status & MISCSTATUS_CTS )
1335 info->input_signal_events.cts_up++;
1336 else
1337 info->input_signal_events.cts_down++;
1338 }
1339 wake_up_interruptible(&info->status_event_wait_q);
1340 wake_up_interruptible(&info->event_wait_q);
1341
1342 if (tty_port_check_carrier(&info->port) &&
1343 (status & MISCSTATUS_DCD_LATCHED) ) {
1344 if ( debug_level >= DEBUG_LEVEL_ISR )
1345 printk("%s CD now %s...", info->device_name,
1346 (status & MISCSTATUS_DCD) ? "on" : "off");
1347 if (status & MISCSTATUS_DCD)
1348 wake_up_interruptible(&info->port.open_wait);
1349 else {
1350 if ( debug_level >= DEBUG_LEVEL_ISR )
1351 printk("doing serial hangup...");
1352 if (info->port.tty)
1353 tty_hangup(info->port.tty);
1354 }
1355 }
1356
1357 if (tty_port_cts_enabled(&info->port) &&
1358 (status & MISCSTATUS_CTS_LATCHED) ) {
1359 if (info->port.tty->hw_stopped) {
1360 if (status & MISCSTATUS_CTS) {
1361 if ( debug_level >= DEBUG_LEVEL_ISR )
1362 printk("CTS tx start...");
1363 info->port.tty->hw_stopped = 0;
1364 usc_start_transmitter(info);
1365 info->pending_bh |= BH_TRANSMIT;
1366 return;
1367 }
1368 } else {
1369 if (!(status & MISCSTATUS_CTS)) {
1370 if ( debug_level >= DEBUG_LEVEL_ISR )
1371 printk("CTS tx stop...");
1372 if (info->port.tty)
1373 info->port.tty->hw_stopped = 1;
1374 usc_stop_transmitter(info);
1375 }
1376 }
1377 }
1378 }
1379
1380 info->pending_bh |= BH_STATUS;
1381
1382 /* for diagnostics set IRQ flag */
1383 if ( status & MISCSTATUS_TXC_LATCHED ){
1384 usc_OutReg( info, SICR,
1385 (unsigned short)(usc_InReg(info,SICR) & ~(SICR_TXC_ACTIVE+SICR_TXC_INACTIVE)) );
1386 usc_UnlatchIostatusBits( info, MISCSTATUS_TXC_LATCHED );
1387 info->irq_occurred = true;
1388 }
1389
1390} /* end of mgsl_isr_io_pin() */
1391
1392/* mgsl_isr_transmit_data()
1393 *
1394 * Service a transmit data interrupt (async mode only).
1395 *
1396 * Arguments: info pointer to device instance data
1397 * Return Value: None
1398 */
1399static void mgsl_isr_transmit_data( struct mgsl_struct *info )
1400{
1401 if ( debug_level >= DEBUG_LEVEL_ISR )
1402 printk("%s(%d):mgsl_isr_transmit_data xmit_cnt=%d\n",
1403 __FILE__,__LINE__,info->xmit_cnt);
1404
1405 usc_ClearIrqPendingBits( info, TRANSMIT_DATA );
1406
1407 if (info->port.tty->stopped || info->port.tty->hw_stopped) {
1408 usc_stop_transmitter(info);
1409 return;
1410 }
1411
1412 if ( info->xmit_cnt )
1413 usc_load_txfifo( info );
1414 else
1415 info->tx_active = false;
1416
1417 if (info->xmit_cnt < WAKEUP_CHARS)
1418 info->pending_bh |= BH_TRANSMIT;
1419
1420} /* end of mgsl_isr_transmit_data() */
1421
1422/* mgsl_isr_receive_data()
1423 *
1424 * Service a receive data interrupt. This occurs
1425 * when operating in asynchronous interrupt transfer mode.
1426 * The receive data FIFO is flushed to the receive data buffers.
1427 *
1428 * Arguments: info pointer to device instance data
1429 * Return Value: None
1430 */
1431static void mgsl_isr_receive_data( struct mgsl_struct *info )
1432{
1433 int Fifocount;
1434 u16 status;
1435 int work = 0;
1436 unsigned char DataByte;
1437 struct mgsl_icount *icount = &info->icount;
1438
1439 if ( debug_level >= DEBUG_LEVEL_ISR )
1440 printk("%s(%d):mgsl_isr_receive_data\n",
1441 __FILE__,__LINE__);
1442
1443 usc_ClearIrqPendingBits( info, RECEIVE_DATA );
1444
1445 /* select FIFO status for RICR readback */
1446 usc_RCmd( info, RCmd_SelectRicrRxFifostatus );
1447
1448 /* clear the Wordstatus bit so that status readback */
1449 /* only reflects the status of this byte */
1450 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 ));
1451
1452 /* flush the receive FIFO */
1453
1454 while( (Fifocount = (usc_InReg(info,RICR) >> 8)) ) {
1455 int flag;
1456
1457 /* read one byte from RxFIFO */
1458 outw( (inw(info->io_base + CCAR) & 0x0780) | (RDR+LSBONLY),
1459 info->io_base + CCAR );
1460 DataByte = inb( info->io_base + CCAR );
1461
1462 /* get the status of the received byte */
1463 status = usc_InReg(info, RCSR);
1464 if ( status & (RXSTATUS_FRAMING_ERROR | RXSTATUS_PARITY_ERROR |
1465 RXSTATUS_OVERRUN | RXSTATUS_BREAK_RECEIVED) )
1466 usc_UnlatchRxstatusBits(info,RXSTATUS_ALL);
1467
1468 icount->rx++;
1469
1470 flag = 0;
1471 if ( status & (RXSTATUS_FRAMING_ERROR | RXSTATUS_PARITY_ERROR |
1472 RXSTATUS_OVERRUN | RXSTATUS_BREAK_RECEIVED) ) {
1473 printk("rxerr=%04X\n",status);
1474 /* update error statistics */
1475 if ( status & RXSTATUS_BREAK_RECEIVED ) {
1476 status &= ~(RXSTATUS_FRAMING_ERROR | RXSTATUS_PARITY_ERROR);
1477 icount->brk++;
1478 } else if (status & RXSTATUS_PARITY_ERROR)
1479 icount->parity++;
1480 else if (status & RXSTATUS_FRAMING_ERROR)
1481 icount->frame++;
1482 else if (status & RXSTATUS_OVERRUN) {
1483 /* must issue purge fifo cmd before */
1484 /* 16C32 accepts more receive chars */
1485 usc_RTCmd(info,RTCmd_PurgeRxFifo);
1486 icount->overrun++;
1487 }
1488
1489 /* discard char if tty control flags say so */
1490 if (status & info->ignore_status_mask)
1491 continue;
1492
1493 status &= info->read_status_mask;
1494
1495 if (status & RXSTATUS_BREAK_RECEIVED) {
1496 flag = TTY_BREAK;
1497 if (info->port.flags & ASYNC_SAK)
1498 do_SAK(info->port.tty);
1499 } else if (status & RXSTATUS_PARITY_ERROR)
1500 flag = TTY_PARITY;
1501 else if (status & RXSTATUS_FRAMING_ERROR)
1502 flag = TTY_FRAME;
1503 } /* end of if (error) */
1504 tty_insert_flip_char(&info->port, DataByte, flag);
1505 if (status & RXSTATUS_OVERRUN) {
1506 /* Overrun is special, since it's
1507 * reported immediately, and doesn't
1508 * affect the current character
1509 */
1510 work += tty_insert_flip_char(&info->port, 0, TTY_OVERRUN);
1511 }
1512 }
1513
1514 if ( debug_level >= DEBUG_LEVEL_ISR ) {
1515 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1516 __FILE__,__LINE__,icount->rx,icount->brk,
1517 icount->parity,icount->frame,icount->overrun);
1518 }
1519
1520 if(work)
1521 tty_flip_buffer_push(&info->port);
1522}
1523
1524/* mgsl_isr_misc()
1525 *
1526 * Service a miscellaneous interrupt source.
1527 *
1528 * Arguments: info pointer to device extension (instance data)
1529 * Return Value: None
1530 */
1531static void mgsl_isr_misc( struct mgsl_struct *info )
1532{
1533 u16 status = usc_InReg( info, MISR );
1534
1535 if ( debug_level >= DEBUG_LEVEL_ISR )
1536 printk("%s(%d):mgsl_isr_misc status=%04X\n",
1537 __FILE__,__LINE__,status);
1538
1539 if ((status & MISCSTATUS_RCC_UNDERRUN) &&
1540 (info->params.mode == MGSL_MODE_HDLC)) {
1541
1542 /* turn off receiver and rx DMA */
1543 usc_EnableReceiver(info,DISABLE_UNCONDITIONAL);
1544 usc_DmaCmd(info, DmaCmd_ResetRxChannel);
1545 usc_UnlatchRxstatusBits(info, RXSTATUS_ALL);
1546 usc_ClearIrqPendingBits(info, RECEIVE_DATA | RECEIVE_STATUS);
1547 usc_DisableInterrupts(info, RECEIVE_DATA | RECEIVE_STATUS);
1548
1549 /* schedule BH handler to restart receiver */
1550 info->pending_bh |= BH_RECEIVE;
1551 info->rx_rcc_underrun = true;
1552 }
1553
1554 usc_ClearIrqPendingBits( info, MISC );
1555 usc_UnlatchMiscstatusBits( info, status );
1556
1557} /* end of mgsl_isr_misc() */
1558
1559/* mgsl_isr_null()
1560 *
1561 * Services undefined interrupt vectors from the
1562 * USC. (hence this function SHOULD never be called)
1563 *
1564 * Arguments: info pointer to device extension (instance data)
1565 * Return Value: None
1566 */
1567static void mgsl_isr_null( struct mgsl_struct *info )
1568{
1569
1570} /* end of mgsl_isr_null() */
1571
1572/* mgsl_isr_receive_dma()
1573 *
1574 * Service a receive DMA channel interrupt.
1575 * For this driver there are two sources of receive DMA interrupts
1576 * as identified in the Receive DMA mode Register (RDMR):
1577 *
1578 * BIT3 EOA/EOL End of List, all receive buffers in receive
1579 * buffer list have been filled (no more free buffers
1580 * available). The DMA controller has shut down.
1581 *
1582 * BIT2 EOB End of Buffer. This interrupt occurs when a receive
1583 * DMA buffer is terminated in response to completion
1584 * of a good frame or a frame with errors. The status
1585 * of the frame is stored in the buffer entry in the
1586 * list of receive buffer entries.
1587 *
1588 * Arguments: info pointer to device instance data
1589 * Return Value: None
1590 */
1591static void mgsl_isr_receive_dma( struct mgsl_struct *info )
1592{
1593 u16 status;
1594
1595 /* clear interrupt pending and IUS bit for Rx DMA IRQ */
1596 usc_OutDmaReg( info, CDIR, BIT9 | BIT1 );
1597
1598 /* Read the receive DMA status to identify interrupt type. */
1599 /* This also clears the status bits. */
1600 status = usc_InDmaReg( info, RDMR );
1601
1602 if ( debug_level >= DEBUG_LEVEL_ISR )
1603 printk("%s(%d):mgsl_isr_receive_dma(%s) status=%04X\n",
1604 __FILE__,__LINE__,info->device_name,status);
1605
1606 info->pending_bh |= BH_RECEIVE;
1607
1608 if ( status & BIT3 ) {
1609 info->rx_overflow = true;
1610 info->icount.buf_overrun++;
1611 }
1612
1613} /* end of mgsl_isr_receive_dma() */
1614
1615/* mgsl_isr_transmit_dma()
1616 *
1617 * This function services a transmit DMA channel interrupt.
1618 *
1619 * For this driver there is one source of transmit DMA interrupts
1620 * as identified in the Transmit DMA Mode Register (TDMR):
1621 *
1622 * BIT2 EOB End of Buffer. This interrupt occurs when a
1623 * transmit DMA buffer has been emptied.
1624 *
1625 * The driver maintains enough transmit DMA buffers to hold at least
1626 * one max frame size transmit frame. When operating in a buffered
1627 * transmit mode, there may be enough transmit DMA buffers to hold at
1628 * least two or more max frame size frames. On an EOB condition,
1629 * determine if there are any queued transmit buffers and copy into
1630 * transmit DMA buffers if we have room.
1631 *
1632 * Arguments: info pointer to device instance data
1633 * Return Value: None
1634 */
1635static void mgsl_isr_transmit_dma( struct mgsl_struct *info )
1636{
1637 u16 status;
1638
1639 /* clear interrupt pending and IUS bit for Tx DMA IRQ */
1640 usc_OutDmaReg(info, CDIR, BIT8 | BIT0 );
1641
1642 /* Read the transmit DMA status to identify interrupt type. */
1643 /* This also clears the status bits. */
1644
1645 status = usc_InDmaReg( info, TDMR );
1646
1647 if ( debug_level >= DEBUG_LEVEL_ISR )
1648 printk("%s(%d):mgsl_isr_transmit_dma(%s) status=%04X\n",
1649 __FILE__,__LINE__,info->device_name,status);
1650
1651 if ( status & BIT2 ) {
1652 --info->tx_dma_buffers_used;
1653
1654 /* if there are transmit frames queued,
1655 * try to load the next one
1656 */
1657 if ( load_next_tx_holding_buffer(info) ) {
1658 /* if call returns non-zero value, we have
1659 * at least one free tx holding buffer
1660 */
1661 info->pending_bh |= BH_TRANSMIT;
1662 }
1663 }
1664
1665} /* end of mgsl_isr_transmit_dma() */
1666
1667/* mgsl_interrupt()
1668 *
1669 * Interrupt service routine entry point.
1670 *
1671 * Arguments:
1672 *
1673 * irq interrupt number that caused interrupt
1674 * dev_id device ID supplied during interrupt registration
1675 *
1676 * Return Value: None
1677 */
1678static irqreturn_t mgsl_interrupt(int dummy, void *dev_id)
1679{
1680 struct mgsl_struct *info = dev_id;
1681 u16 UscVector;
1682 u16 DmaVector;
1683
1684 if ( debug_level >= DEBUG_LEVEL_ISR )
1685 printk(KERN_DEBUG "%s(%d):mgsl_interrupt(%d)entry.\n",
1686 __FILE__, __LINE__, info->irq_level);
1687
1688 spin_lock(&info->irq_spinlock);
1689
1690 for(;;) {
1691 /* Read the interrupt vectors from hardware. */
1692 UscVector = usc_InReg(info, IVR) >> 9;
1693 DmaVector = usc_InDmaReg(info, DIVR);
1694
1695 if ( debug_level >= DEBUG_LEVEL_ISR )
1696 printk("%s(%d):%s UscVector=%08X DmaVector=%08X\n",
1697 __FILE__,__LINE__,info->device_name,UscVector,DmaVector);
1698
1699 if ( !UscVector && !DmaVector )
1700 break;
1701
1702 /* Dispatch interrupt vector */
1703 if ( UscVector )
1704 (*UscIsrTable[UscVector])(info);
1705 else if ( (DmaVector&(BIT10|BIT9)) == BIT10)
1706 mgsl_isr_transmit_dma(info);
1707 else
1708 mgsl_isr_receive_dma(info);
1709
1710 if ( info->isr_overflow ) {
1711 printk(KERN_ERR "%s(%d):%s isr overflow irq=%d\n",
1712 __FILE__, __LINE__, info->device_name, info->irq_level);
1713 usc_DisableMasterIrqBit(info);
1714 usc_DisableDmaInterrupts(info,DICR_MASTER);
1715 break;
1716 }
1717 }
1718
1719 /* Request bottom half processing if there's something
1720 * for it to do and the bh is not already running
1721 */
1722
1723 if ( info->pending_bh && !info->bh_running && !info->bh_requested ) {
1724 if ( debug_level >= DEBUG_LEVEL_ISR )
1725 printk("%s(%d):%s queueing bh task.\n",
1726 __FILE__,__LINE__,info->device_name);
1727 schedule_work(&info->task);
1728 info->bh_requested = true;
1729 }
1730
1731 spin_unlock(&info->irq_spinlock);
1732
1733 if ( debug_level >= DEBUG_LEVEL_ISR )
1734 printk(KERN_DEBUG "%s(%d):mgsl_interrupt(%d)exit.\n",
1735 __FILE__, __LINE__, info->irq_level);
1736
1737 return IRQ_HANDLED;
1738} /* end of mgsl_interrupt() */
1739
1740/* startup()
1741 *
1742 * Initialize and start device.
1743 *
1744 * Arguments: info pointer to device instance data
1745 * Return Value: 0 if success, otherwise error code
1746 */
1747static int startup(struct mgsl_struct * info)
1748{
1749 int retval = 0;
1750
1751 if ( debug_level >= DEBUG_LEVEL_INFO )
1752 printk("%s(%d):mgsl_startup(%s)\n",__FILE__,__LINE__,info->device_name);
1753
1754 if (tty_port_initialized(&info->port))
1755 return 0;
1756
1757 if (!info->xmit_buf) {
1758 /* allocate a page of memory for a transmit buffer */
1759 info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1760 if (!info->xmit_buf) {
1761 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1762 __FILE__,__LINE__,info->device_name);
1763 return -ENOMEM;
1764 }
1765 }
1766
1767 info->pending_bh = 0;
1768
1769 memset(&info->icount, 0, sizeof(info->icount));
1770
1771 timer_setup(&info->tx_timer, mgsl_tx_timeout, 0);
1772
1773 /* Allocate and claim adapter resources */
1774 retval = mgsl_claim_resources(info);
1775
1776 /* perform existence check and diagnostics */
1777 if ( !retval )
1778 retval = mgsl_adapter_test(info);
1779
1780 if ( retval ) {
1781 if (capable(CAP_SYS_ADMIN) && info->port.tty)
1782 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1783 mgsl_release_resources(info);
1784 return retval;
1785 }
1786
1787 /* program hardware for current parameters */
1788 mgsl_change_params(info);
1789
1790 if (info->port.tty)
1791 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
1792
1793 tty_port_set_initialized(&info->port, 1);
1794
1795 return 0;
1796} /* end of startup() */
1797
1798/* shutdown()
1799 *
1800 * Called by mgsl_close() and mgsl_hangup() to shutdown hardware
1801 *
1802 * Arguments: info pointer to device instance data
1803 * Return Value: None
1804 */
1805static void shutdown(struct mgsl_struct * info)
1806{
1807 unsigned long flags;
1808
1809 if (!tty_port_initialized(&info->port))
1810 return;
1811
1812 if (debug_level >= DEBUG_LEVEL_INFO)
1813 printk("%s(%d):mgsl_shutdown(%s)\n",
1814 __FILE__,__LINE__, info->device_name );
1815
1816 /* clear status wait queue because status changes */
1817 /* can't happen after shutting down the hardware */
1818 wake_up_interruptible(&info->status_event_wait_q);
1819 wake_up_interruptible(&info->event_wait_q);
1820
1821 del_timer_sync(&info->tx_timer);
1822
1823 if (info->xmit_buf) {
1824 free_page((unsigned long) info->xmit_buf);
1825 info->xmit_buf = NULL;
1826 }
1827
1828 spin_lock_irqsave(&info->irq_spinlock,flags);
1829 usc_DisableMasterIrqBit(info);
1830 usc_stop_receiver(info);
1831 usc_stop_transmitter(info);
1832 usc_DisableInterrupts(info,RECEIVE_DATA | RECEIVE_STATUS |
1833 TRANSMIT_DATA | TRANSMIT_STATUS | IO_PIN | MISC );
1834 usc_DisableDmaInterrupts(info,DICR_MASTER + DICR_TRANSMIT + DICR_RECEIVE);
1835
1836 /* Disable DMAEN (Port 7, Bit 14) */
1837 /* This disconnects the DMA request signal from the ISA bus */
1838 /* on the ISA adapter. This has no effect for the PCI adapter */
1839 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14));
1840
1841 /* Disable INTEN (Port 6, Bit12) */
1842 /* This disconnects the IRQ request signal to the ISA bus */
1843 /* on the ISA adapter. This has no effect for the PCI adapter */
1844 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12));
1845
1846 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) {
1847 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1848 usc_set_serial_signals(info);
1849 }
1850
1851 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1852
1853 mgsl_release_resources(info);
1854
1855 if (info->port.tty)
1856 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1857
1858 tty_port_set_initialized(&info->port, 0);
1859} /* end of shutdown() */
1860
1861static void mgsl_program_hw(struct mgsl_struct *info)
1862{
1863 unsigned long flags;
1864
1865 spin_lock_irqsave(&info->irq_spinlock,flags);
1866
1867 usc_stop_receiver(info);
1868 usc_stop_transmitter(info);
1869 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1870
1871 if (info->params.mode == MGSL_MODE_HDLC ||
1872 info->params.mode == MGSL_MODE_RAW ||
1873 info->netcount)
1874 usc_set_sync_mode(info);
1875 else
1876 usc_set_async_mode(info);
1877
1878 usc_set_serial_signals(info);
1879
1880 info->dcd_chkcount = 0;
1881 info->cts_chkcount = 0;
1882 info->ri_chkcount = 0;
1883 info->dsr_chkcount = 0;
1884
1885 usc_EnableStatusIrqs(info,SICR_CTS+SICR_DSR+SICR_DCD+SICR_RI);
1886 usc_EnableInterrupts(info, IO_PIN);
1887 usc_get_serial_signals(info);
1888
1889 if (info->netcount || info->port.tty->termios.c_cflag & CREAD)
1890 usc_start_receiver(info);
1891
1892 spin_unlock_irqrestore(&info->irq_spinlock,flags);
1893}
1894
1895/* Reconfigure adapter based on new parameters
1896 */
1897static void mgsl_change_params(struct mgsl_struct *info)
1898{
1899 unsigned cflag;
1900 int bits_per_char;
1901
1902 if (!info->port.tty)
1903 return;
1904
1905 if (debug_level >= DEBUG_LEVEL_INFO)
1906 printk("%s(%d):mgsl_change_params(%s)\n",
1907 __FILE__,__LINE__, info->device_name );
1908
1909 cflag = info->port.tty->termios.c_cflag;
1910
1911 /* if B0 rate (hangup) specified then negate RTS and DTR */
1912 /* otherwise assert RTS and DTR */
1913 if (cflag & CBAUD)
1914 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1915 else
1916 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
1917
1918 /* byte size and parity */
1919
1920 switch (cflag & CSIZE) {
1921 case CS5: info->params.data_bits = 5; break;
1922 case CS6: info->params.data_bits = 6; break;
1923 case CS7: info->params.data_bits = 7; break;
1924 case CS8: info->params.data_bits = 8; break;
1925 /* Never happens, but GCC is too dumb to figure it out */
1926 default: info->params.data_bits = 7; break;
1927 }
1928
1929 if (cflag & CSTOPB)
1930 info->params.stop_bits = 2;
1931 else
1932 info->params.stop_bits = 1;
1933
1934 info->params.parity = ASYNC_PARITY_NONE;
1935 if (cflag & PARENB) {
1936 if (cflag & PARODD)
1937 info->params.parity = ASYNC_PARITY_ODD;
1938 else
1939 info->params.parity = ASYNC_PARITY_EVEN;
1940#ifdef CMSPAR
1941 if (cflag & CMSPAR)
1942 info->params.parity = ASYNC_PARITY_SPACE;
1943#endif
1944 }
1945
1946 /* calculate number of jiffies to transmit a full
1947 * FIFO (32 bytes) at specified data rate
1948 */
1949 bits_per_char = info->params.data_bits +
1950 info->params.stop_bits + 1;
1951
1952 /* if port data rate is set to 460800 or less then
1953 * allow tty settings to override, otherwise keep the
1954 * current data rate.
1955 */
1956 if (info->params.data_rate <= 460800)
1957 info->params.data_rate = tty_get_baud_rate(info->port.tty);
1958
1959 if ( info->params.data_rate ) {
1960 info->timeout = (32*HZ*bits_per_char) /
1961 info->params.data_rate;
1962 }
1963 info->timeout += HZ/50; /* Add .02 seconds of slop */
1964
1965 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
1966 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
1967
1968 /* process tty input control flags */
1969
1970 info->read_status_mask = RXSTATUS_OVERRUN;
1971 if (I_INPCK(info->port.tty))
1972 info->read_status_mask |= RXSTATUS_PARITY_ERROR | RXSTATUS_FRAMING_ERROR;
1973 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
1974 info->read_status_mask |= RXSTATUS_BREAK_RECEIVED;
1975
1976 if (I_IGNPAR(info->port.tty))
1977 info->ignore_status_mask |= RXSTATUS_PARITY_ERROR | RXSTATUS_FRAMING_ERROR;
1978 if (I_IGNBRK(info->port.tty)) {
1979 info->ignore_status_mask |= RXSTATUS_BREAK_RECEIVED;
1980 /* If ignoring parity and break indicators, ignore
1981 * overruns too. (For real raw support).
1982 */
1983 if (I_IGNPAR(info->port.tty))
1984 info->ignore_status_mask |= RXSTATUS_OVERRUN;
1985 }
1986
1987 mgsl_program_hw(info);
1988
1989} /* end of mgsl_change_params() */
1990
1991/* mgsl_put_char()
1992 *
1993 * Add a character to the transmit buffer.
1994 *
1995 * Arguments: tty pointer to tty information structure
1996 * ch character to add to transmit buffer
1997 *
1998 * Return Value: None
1999 */
2000static int mgsl_put_char(struct tty_struct *tty, unsigned char ch)
2001{
2002 struct mgsl_struct *info = tty->driver_data;
2003 unsigned long flags;
2004 int ret = 0;
2005
2006 if (debug_level >= DEBUG_LEVEL_INFO) {
2007 printk(KERN_DEBUG "%s(%d):mgsl_put_char(%d) on %s\n",
2008 __FILE__, __LINE__, ch, info->device_name);
2009 }
2010
2011 if (mgsl_paranoia_check(info, tty->name, "mgsl_put_char"))
2012 return 0;
2013
2014 if (!info->xmit_buf)
2015 return 0;
2016
2017 spin_lock_irqsave(&info->irq_spinlock, flags);
2018
2019 if ((info->params.mode == MGSL_MODE_ASYNC ) || !info->tx_active) {
2020 if (info->xmit_cnt < SERIAL_XMIT_SIZE - 1) {
2021 info->xmit_buf[info->xmit_head++] = ch;
2022 info->xmit_head &= SERIAL_XMIT_SIZE-1;
2023 info->xmit_cnt++;
2024 ret = 1;
2025 }
2026 }
2027 spin_unlock_irqrestore(&info->irq_spinlock, flags);
2028 return ret;
2029
2030} /* end of mgsl_put_char() */
2031
2032/* mgsl_flush_chars()
2033 *
2034 * Enable transmitter so remaining characters in the
2035 * transmit buffer are sent.
2036 *
2037 * Arguments: tty pointer to tty information structure
2038 * Return Value: None
2039 */
2040static void mgsl_flush_chars(struct tty_struct *tty)
2041{
2042 struct mgsl_struct *info = tty->driver_data;
2043 unsigned long flags;
2044
2045 if ( debug_level >= DEBUG_LEVEL_INFO )
2046 printk( "%s(%d):mgsl_flush_chars() entry on %s xmit_cnt=%d\n",
2047 __FILE__,__LINE__,info->device_name,info->xmit_cnt);
2048
2049 if (mgsl_paranoia_check(info, tty->name, "mgsl_flush_chars"))
2050 return;
2051
2052 if (info->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped ||
2053 !info->xmit_buf)
2054 return;
2055
2056 if ( debug_level >= DEBUG_LEVEL_INFO )
2057 printk( "%s(%d):mgsl_flush_chars() entry on %s starting transmitter\n",
2058 __FILE__,__LINE__,info->device_name );
2059
2060 spin_lock_irqsave(&info->irq_spinlock,flags);
2061
2062 if (!info->tx_active) {
2063 if ( (info->params.mode == MGSL_MODE_HDLC ||
2064 info->params.mode == MGSL_MODE_RAW) && info->xmit_cnt ) {
2065 /* operating in synchronous (frame oriented) mode */
2066 /* copy data from circular xmit_buf to */
2067 /* transmit DMA buffer. */
2068 mgsl_load_tx_dma_buffer(info,
2069 info->xmit_buf,info->xmit_cnt);
2070 }
2071 usc_start_transmitter(info);
2072 }
2073
2074 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2075
2076} /* end of mgsl_flush_chars() */
2077
2078/* mgsl_write()
2079 *
2080 * Send a block of data
2081 *
2082 * Arguments:
2083 *
2084 * tty pointer to tty information structure
2085 * buf pointer to buffer containing send data
2086 * count size of send data in bytes
2087 *
2088 * Return Value: number of characters written
2089 */
2090static int mgsl_write(struct tty_struct * tty,
2091 const unsigned char *buf, int count)
2092{
2093 int c, ret = 0;
2094 struct mgsl_struct *info = tty->driver_data;
2095 unsigned long flags;
2096
2097 if ( debug_level >= DEBUG_LEVEL_INFO )
2098 printk( "%s(%d):mgsl_write(%s) count=%d\n",
2099 __FILE__,__LINE__,info->device_name,count);
2100
2101 if (mgsl_paranoia_check(info, tty->name, "mgsl_write"))
2102 goto cleanup;
2103
2104 if (!info->xmit_buf)
2105 goto cleanup;
2106
2107 if ( info->params.mode == MGSL_MODE_HDLC ||
2108 info->params.mode == MGSL_MODE_RAW ) {
2109 /* operating in synchronous (frame oriented) mode */
2110 if (info->tx_active) {
2111
2112 if ( info->params.mode == MGSL_MODE_HDLC ) {
2113 ret = 0;
2114 goto cleanup;
2115 }
2116 /* transmitter is actively sending data -
2117 * if we have multiple transmit dma and
2118 * holding buffers, attempt to queue this
2119 * frame for transmission at a later time.
2120 */
2121 if (info->tx_holding_count >= info->num_tx_holding_buffers ) {
2122 /* no tx holding buffers available */
2123 ret = 0;
2124 goto cleanup;
2125 }
2126
2127 /* queue transmit frame request */
2128 ret = count;
2129 save_tx_buffer_request(info,buf,count);
2130
2131 /* if we have sufficient tx dma buffers,
2132 * load the next buffered tx request
2133 */
2134 spin_lock_irqsave(&info->irq_spinlock,flags);
2135 load_next_tx_holding_buffer(info);
2136 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2137 goto cleanup;
2138 }
2139
2140 /* if operating in HDLC LoopMode and the adapter */
2141 /* has yet to be inserted into the loop, we can't */
2142 /* transmit */
2143
2144 if ( (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) &&
2145 !usc_loopmode_active(info) )
2146 {
2147 ret = 0;
2148 goto cleanup;
2149 }
2150
2151 if ( info->xmit_cnt ) {
2152 /* Send accumulated from send_char() calls */
2153 /* as frame and wait before accepting more data. */
2154 ret = 0;
2155
2156 /* copy data from circular xmit_buf to */
2157 /* transmit DMA buffer. */
2158 mgsl_load_tx_dma_buffer(info,
2159 info->xmit_buf,info->xmit_cnt);
2160 if ( debug_level >= DEBUG_LEVEL_INFO )
2161 printk( "%s(%d):mgsl_write(%s) sync xmit_cnt flushing\n",
2162 __FILE__,__LINE__,info->device_name);
2163 } else {
2164 if ( debug_level >= DEBUG_LEVEL_INFO )
2165 printk( "%s(%d):mgsl_write(%s) sync transmit accepted\n",
2166 __FILE__,__LINE__,info->device_name);
2167 ret = count;
2168 info->xmit_cnt = count;
2169 mgsl_load_tx_dma_buffer(info,buf,count);
2170 }
2171 } else {
2172 while (1) {
2173 spin_lock_irqsave(&info->irq_spinlock,flags);
2174 c = min_t(int, count,
2175 min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
2176 SERIAL_XMIT_SIZE - info->xmit_head));
2177 if (c <= 0) {
2178 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2179 break;
2180 }
2181 memcpy(info->xmit_buf + info->xmit_head, buf, c);
2182 info->xmit_head = ((info->xmit_head + c) &
2183 (SERIAL_XMIT_SIZE-1));
2184 info->xmit_cnt += c;
2185 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2186 buf += c;
2187 count -= c;
2188 ret += c;
2189 }
2190 }
2191
2192 if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) {
2193 spin_lock_irqsave(&info->irq_spinlock,flags);
2194 if (!info->tx_active)
2195 usc_start_transmitter(info);
2196 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2197 }
2198cleanup:
2199 if ( debug_level >= DEBUG_LEVEL_INFO )
2200 printk( "%s(%d):mgsl_write(%s) returning=%d\n",
2201 __FILE__,__LINE__,info->device_name,ret);
2202
2203 return ret;
2204
2205} /* end of mgsl_write() */
2206
2207/* mgsl_write_room()
2208 *
2209 * Return the count of free bytes in transmit buffer
2210 *
2211 * Arguments: tty pointer to tty info structure
2212 * Return Value: None
2213 */
2214static int mgsl_write_room(struct tty_struct *tty)
2215{
2216 struct mgsl_struct *info = tty->driver_data;
2217 int ret;
2218
2219 if (mgsl_paranoia_check(info, tty->name, "mgsl_write_room"))
2220 return 0;
2221 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
2222 if (ret < 0)
2223 ret = 0;
2224
2225 if (debug_level >= DEBUG_LEVEL_INFO)
2226 printk("%s(%d):mgsl_write_room(%s)=%d\n",
2227 __FILE__,__LINE__, info->device_name,ret );
2228
2229 if ( info->params.mode == MGSL_MODE_HDLC ||
2230 info->params.mode == MGSL_MODE_RAW ) {
2231 /* operating in synchronous (frame oriented) mode */
2232 if ( info->tx_active )
2233 return 0;
2234 else
2235 return HDLC_MAX_FRAME_SIZE;
2236 }
2237
2238 return ret;
2239
2240} /* end of mgsl_write_room() */
2241
2242/* mgsl_chars_in_buffer()
2243 *
2244 * Return the count of bytes in transmit buffer
2245 *
2246 * Arguments: tty pointer to tty info structure
2247 * Return Value: None
2248 */
2249static int mgsl_chars_in_buffer(struct tty_struct *tty)
2250{
2251 struct mgsl_struct *info = tty->driver_data;
2252
2253 if (debug_level >= DEBUG_LEVEL_INFO)
2254 printk("%s(%d):mgsl_chars_in_buffer(%s)\n",
2255 __FILE__,__LINE__, info->device_name );
2256
2257 if (mgsl_paranoia_check(info, tty->name, "mgsl_chars_in_buffer"))
2258 return 0;
2259
2260 if (debug_level >= DEBUG_LEVEL_INFO)
2261 printk("%s(%d):mgsl_chars_in_buffer(%s)=%d\n",
2262 __FILE__,__LINE__, info->device_name,info->xmit_cnt );
2263
2264 if ( info->params.mode == MGSL_MODE_HDLC ||
2265 info->params.mode == MGSL_MODE_RAW ) {
2266 /* operating in synchronous (frame oriented) mode */
2267 if ( info->tx_active )
2268 return info->max_frame_size;
2269 else
2270 return 0;
2271 }
2272
2273 return info->xmit_cnt;
2274} /* end of mgsl_chars_in_buffer() */
2275
2276/* mgsl_flush_buffer()
2277 *
2278 * Discard all data in the send buffer
2279 *
2280 * Arguments: tty pointer to tty info structure
2281 * Return Value: None
2282 */
2283static void mgsl_flush_buffer(struct tty_struct *tty)
2284{
2285 struct mgsl_struct *info = tty->driver_data;
2286 unsigned long flags;
2287
2288 if (debug_level >= DEBUG_LEVEL_INFO)
2289 printk("%s(%d):mgsl_flush_buffer(%s) entry\n",
2290 __FILE__,__LINE__, info->device_name );
2291
2292 if (mgsl_paranoia_check(info, tty->name, "mgsl_flush_buffer"))
2293 return;
2294
2295 spin_lock_irqsave(&info->irq_spinlock,flags);
2296 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2297 del_timer(&info->tx_timer);
2298 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2299
2300 tty_wakeup(tty);
2301}
2302
2303/* mgsl_send_xchar()
2304 *
2305 * Send a high-priority XON/XOFF character
2306 *
2307 * Arguments: tty pointer to tty info structure
2308 * ch character to send
2309 * Return Value: None
2310 */
2311static void mgsl_send_xchar(struct tty_struct *tty, char ch)
2312{
2313 struct mgsl_struct *info = tty->driver_data;
2314 unsigned long flags;
2315
2316 if (debug_level >= DEBUG_LEVEL_INFO)
2317 printk("%s(%d):mgsl_send_xchar(%s,%d)\n",
2318 __FILE__,__LINE__, info->device_name, ch );
2319
2320 if (mgsl_paranoia_check(info, tty->name, "mgsl_send_xchar"))
2321 return;
2322
2323 info->x_char = ch;
2324 if (ch) {
2325 /* Make sure transmit interrupts are on */
2326 spin_lock_irqsave(&info->irq_spinlock,flags);
2327 if (!info->tx_enabled)
2328 usc_start_transmitter(info);
2329 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2330 }
2331} /* end of mgsl_send_xchar() */
2332
2333/* mgsl_throttle()
2334 *
2335 * Signal remote device to throttle send data (our receive data)
2336 *
2337 * Arguments: tty pointer to tty info structure
2338 * Return Value: None
2339 */
2340static void mgsl_throttle(struct tty_struct * tty)
2341{
2342 struct mgsl_struct *info = tty->driver_data;
2343 unsigned long flags;
2344
2345 if (debug_level >= DEBUG_LEVEL_INFO)
2346 printk("%s(%d):mgsl_throttle(%s) entry\n",
2347 __FILE__,__LINE__, info->device_name );
2348
2349 if (mgsl_paranoia_check(info, tty->name, "mgsl_throttle"))
2350 return;
2351
2352 if (I_IXOFF(tty))
2353 mgsl_send_xchar(tty, STOP_CHAR(tty));
2354
2355 if (C_CRTSCTS(tty)) {
2356 spin_lock_irqsave(&info->irq_spinlock,flags);
2357 info->serial_signals &= ~SerialSignal_RTS;
2358 usc_set_serial_signals(info);
2359 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2360 }
2361} /* end of mgsl_throttle() */
2362
2363/* mgsl_unthrottle()
2364 *
2365 * Signal remote device to stop throttling send data (our receive data)
2366 *
2367 * Arguments: tty pointer to tty info structure
2368 * Return Value: None
2369 */
2370static void mgsl_unthrottle(struct tty_struct * tty)
2371{
2372 struct mgsl_struct *info = tty->driver_data;
2373 unsigned long flags;
2374
2375 if (debug_level >= DEBUG_LEVEL_INFO)
2376 printk("%s(%d):mgsl_unthrottle(%s) entry\n",
2377 __FILE__,__LINE__, info->device_name );
2378
2379 if (mgsl_paranoia_check(info, tty->name, "mgsl_unthrottle"))
2380 return;
2381
2382 if (I_IXOFF(tty)) {
2383 if (info->x_char)
2384 info->x_char = 0;
2385 else
2386 mgsl_send_xchar(tty, START_CHAR(tty));
2387 }
2388
2389 if (C_CRTSCTS(tty)) {
2390 spin_lock_irqsave(&info->irq_spinlock,flags);
2391 info->serial_signals |= SerialSignal_RTS;
2392 usc_set_serial_signals(info);
2393 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2394 }
2395
2396} /* end of mgsl_unthrottle() */
2397
2398/* mgsl_get_stats()
2399 *
2400 * get the current serial parameters information
2401 *
2402 * Arguments: info pointer to device instance data
2403 * user_icount pointer to buffer to hold returned stats
2404 *
2405 * Return Value: 0 if success, otherwise error code
2406 */
2407static int mgsl_get_stats(struct mgsl_struct * info, struct mgsl_icount __user *user_icount)
2408{
2409 int err;
2410
2411 if (debug_level >= DEBUG_LEVEL_INFO)
2412 printk("%s(%d):mgsl_get_params(%s)\n",
2413 __FILE__,__LINE__, info->device_name);
2414
2415 if (!user_icount) {
2416 memset(&info->icount, 0, sizeof(info->icount));
2417 } else {
2418 mutex_lock(&info->port.mutex);
2419 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
2420 mutex_unlock(&info->port.mutex);
2421 if (err)
2422 return -EFAULT;
2423 }
2424
2425 return 0;
2426
2427} /* end of mgsl_get_stats() */
2428
2429/* mgsl_get_params()
2430 *
2431 * get the current serial parameters information
2432 *
2433 * Arguments: info pointer to device instance data
2434 * user_params pointer to buffer to hold returned params
2435 *
2436 * Return Value: 0 if success, otherwise error code
2437 */
2438static int mgsl_get_params(struct mgsl_struct * info, MGSL_PARAMS __user *user_params)
2439{
2440 int err;
2441 if (debug_level >= DEBUG_LEVEL_INFO)
2442 printk("%s(%d):mgsl_get_params(%s)\n",
2443 __FILE__,__LINE__, info->device_name);
2444
2445 mutex_lock(&info->port.mutex);
2446 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
2447 mutex_unlock(&info->port.mutex);
2448 if (err) {
2449 if ( debug_level >= DEBUG_LEVEL_INFO )
2450 printk( "%s(%d):mgsl_get_params(%s) user buffer copy failed\n",
2451 __FILE__,__LINE__,info->device_name);
2452 return -EFAULT;
2453 }
2454
2455 return 0;
2456
2457} /* end of mgsl_get_params() */
2458
2459/* mgsl_set_params()
2460 *
2461 * set the serial parameters
2462 *
2463 * Arguments:
2464 *
2465 * info pointer to device instance data
2466 * new_params user buffer containing new serial params
2467 *
2468 * Return Value: 0 if success, otherwise error code
2469 */
2470static int mgsl_set_params(struct mgsl_struct * info, MGSL_PARAMS __user *new_params)
2471{
2472 unsigned long flags;
2473 MGSL_PARAMS tmp_params;
2474 int err;
2475
2476 if (debug_level >= DEBUG_LEVEL_INFO)
2477 printk("%s(%d):mgsl_set_params %s\n", __FILE__,__LINE__,
2478 info->device_name );
2479 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
2480 if (err) {
2481 if ( debug_level >= DEBUG_LEVEL_INFO )
2482 printk( "%s(%d):mgsl_set_params(%s) user buffer copy failed\n",
2483 __FILE__,__LINE__,info->device_name);
2484 return -EFAULT;
2485 }
2486
2487 mutex_lock(&info->port.mutex);
2488 spin_lock_irqsave(&info->irq_spinlock,flags);
2489 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
2490 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2491
2492 mgsl_change_params(info);
2493 mutex_unlock(&info->port.mutex);
2494
2495 return 0;
2496
2497} /* end of mgsl_set_params() */
2498
2499/* mgsl_get_txidle()
2500 *
2501 * get the current transmit idle mode
2502 *
2503 * Arguments: info pointer to device instance data
2504 * idle_mode pointer to buffer to hold returned idle mode
2505 *
2506 * Return Value: 0 if success, otherwise error code
2507 */
2508static int mgsl_get_txidle(struct mgsl_struct * info, int __user *idle_mode)
2509{
2510 int err;
2511
2512 if (debug_level >= DEBUG_LEVEL_INFO)
2513 printk("%s(%d):mgsl_get_txidle(%s)=%d\n",
2514 __FILE__,__LINE__, info->device_name, info->idle_mode);
2515
2516 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2517 if (err) {
2518 if ( debug_level >= DEBUG_LEVEL_INFO )
2519 printk( "%s(%d):mgsl_get_txidle(%s) user buffer copy failed\n",
2520 __FILE__,__LINE__,info->device_name);
2521 return -EFAULT;
2522 }
2523
2524 return 0;
2525
2526} /* end of mgsl_get_txidle() */
2527
2528/* mgsl_set_txidle() service ioctl to set transmit idle mode
2529 *
2530 * Arguments: info pointer to device instance data
2531 * idle_mode new idle mode
2532 *
2533 * Return Value: 0 if success, otherwise error code
2534 */
2535static int mgsl_set_txidle(struct mgsl_struct * info, int idle_mode)
2536{
2537 unsigned long flags;
2538
2539 if (debug_level >= DEBUG_LEVEL_INFO)
2540 printk("%s(%d):mgsl_set_txidle(%s,%d)\n", __FILE__,__LINE__,
2541 info->device_name, idle_mode );
2542
2543 spin_lock_irqsave(&info->irq_spinlock,flags);
2544 info->idle_mode = idle_mode;
2545 usc_set_txidle( info );
2546 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2547 return 0;
2548
2549} /* end of mgsl_set_txidle() */
2550
2551/* mgsl_txenable()
2552 *
2553 * enable or disable the transmitter
2554 *
2555 * Arguments:
2556 *
2557 * info pointer to device instance data
2558 * enable 1 = enable, 0 = disable
2559 *
2560 * Return Value: 0 if success, otherwise error code
2561 */
2562static int mgsl_txenable(struct mgsl_struct * info, int enable)
2563{
2564 unsigned long flags;
2565
2566 if (debug_level >= DEBUG_LEVEL_INFO)
2567 printk("%s(%d):mgsl_txenable(%s,%d)\n", __FILE__,__LINE__,
2568 info->device_name, enable);
2569
2570 spin_lock_irqsave(&info->irq_spinlock,flags);
2571 if ( enable ) {
2572 if ( !info->tx_enabled ) {
2573
2574 usc_start_transmitter(info);
2575 /*--------------------------------------------------
2576 * if HDLC/SDLC Loop mode, attempt to insert the
2577 * station in the 'loop' by setting CMR:13. Upon
2578 * receipt of the next GoAhead (RxAbort) sequence,
2579 * the OnLoop indicator (CCSR:7) should go active
2580 * to indicate that we are on the loop
2581 *--------------------------------------------------*/
2582 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE )
2583 usc_loopmode_insert_request( info );
2584 }
2585 } else {
2586 if ( info->tx_enabled )
2587 usc_stop_transmitter(info);
2588 }
2589 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2590 return 0;
2591
2592} /* end of mgsl_txenable() */
2593
2594/* mgsl_txabort() abort send HDLC frame
2595 *
2596 * Arguments: info pointer to device instance data
2597 * Return Value: 0 if success, otherwise error code
2598 */
2599static int mgsl_txabort(struct mgsl_struct * info)
2600{
2601 unsigned long flags;
2602
2603 if (debug_level >= DEBUG_LEVEL_INFO)
2604 printk("%s(%d):mgsl_txabort(%s)\n", __FILE__,__LINE__,
2605 info->device_name);
2606
2607 spin_lock_irqsave(&info->irq_spinlock,flags);
2608 if ( info->tx_active && info->params.mode == MGSL_MODE_HDLC )
2609 {
2610 if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE )
2611 usc_loopmode_cancel_transmit( info );
2612 else
2613 usc_TCmd(info,TCmd_SendAbort);
2614 }
2615 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2616 return 0;
2617
2618} /* end of mgsl_txabort() */
2619
2620/* mgsl_rxenable() enable or disable the receiver
2621 *
2622 * Arguments: info pointer to device instance data
2623 * enable 1 = enable, 0 = disable
2624 * Return Value: 0 if success, otherwise error code
2625 */
2626static int mgsl_rxenable(struct mgsl_struct * info, int enable)
2627{
2628 unsigned long flags;
2629
2630 if (debug_level >= DEBUG_LEVEL_INFO)
2631 printk("%s(%d):mgsl_rxenable(%s,%d)\n", __FILE__,__LINE__,
2632 info->device_name, enable);
2633
2634 spin_lock_irqsave(&info->irq_spinlock,flags);
2635 if ( enable ) {
2636 if ( !info->rx_enabled )
2637 usc_start_receiver(info);
2638 } else {
2639 if ( info->rx_enabled )
2640 usc_stop_receiver(info);
2641 }
2642 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2643 return 0;
2644
2645} /* end of mgsl_rxenable() */
2646
2647/* mgsl_wait_event() wait for specified event to occur
2648 *
2649 * Arguments: info pointer to device instance data
2650 * mask pointer to bitmask of events to wait for
2651 * Return Value: 0 if successful and bit mask updated with
2652 * of events triggerred,
2653 * otherwise error code
2654 */
2655static int mgsl_wait_event(struct mgsl_struct * info, int __user * mask_ptr)
2656{
2657 unsigned long flags;
2658 int s;
2659 int rc=0;
2660 struct mgsl_icount cprev, cnow;
2661 int events;
2662 int mask;
2663 struct _input_signal_events oldsigs, newsigs;
2664 DECLARE_WAITQUEUE(wait, current);
2665
2666 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2667 if (rc) {
2668 return -EFAULT;
2669 }
2670
2671 if (debug_level >= DEBUG_LEVEL_INFO)
2672 printk("%s(%d):mgsl_wait_event(%s,%d)\n", __FILE__,__LINE__,
2673 info->device_name, mask);
2674
2675 spin_lock_irqsave(&info->irq_spinlock,flags);
2676
2677 /* return immediately if state matches requested events */
2678 usc_get_serial_signals(info);
2679 s = info->serial_signals;
2680 events = mask &
2681 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2682 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2683 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2684 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2685 if (events) {
2686 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2687 goto exit;
2688 }
2689
2690 /* save current irq counts */
2691 cprev = info->icount;
2692 oldsigs = info->input_signal_events;
2693
2694 /* enable hunt and idle irqs if needed */
2695 if (mask & (MgslEvent_ExitHuntMode + MgslEvent_IdleReceived)) {
2696 u16 oldreg = usc_InReg(info,RICR);
2697 u16 newreg = oldreg +
2698 (mask & MgslEvent_ExitHuntMode ? RXSTATUS_EXITED_HUNT:0) +
2699 (mask & MgslEvent_IdleReceived ? RXSTATUS_IDLE_RECEIVED:0);
2700 if (oldreg != newreg)
2701 usc_OutReg(info, RICR, newreg);
2702 }
2703
2704 set_current_state(TASK_INTERRUPTIBLE);
2705 add_wait_queue(&info->event_wait_q, &wait);
2706
2707 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2708
2709
2710 for(;;) {
2711 schedule();
2712 if (signal_pending(current)) {
2713 rc = -ERESTARTSYS;
2714 break;
2715 }
2716
2717 /* get current irq counts */
2718 spin_lock_irqsave(&info->irq_spinlock,flags);
2719 cnow = info->icount;
2720 newsigs = info->input_signal_events;
2721 set_current_state(TASK_INTERRUPTIBLE);
2722 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2723
2724 /* if no change, wait aborted for some reason */
2725 if (newsigs.dsr_up == oldsigs.dsr_up &&
2726 newsigs.dsr_down == oldsigs.dsr_down &&
2727 newsigs.dcd_up == oldsigs.dcd_up &&
2728 newsigs.dcd_down == oldsigs.dcd_down &&
2729 newsigs.cts_up == oldsigs.cts_up &&
2730 newsigs.cts_down == oldsigs.cts_down &&
2731 newsigs.ri_up == oldsigs.ri_up &&
2732 newsigs.ri_down == oldsigs.ri_down &&
2733 cnow.exithunt == cprev.exithunt &&
2734 cnow.rxidle == cprev.rxidle) {
2735 rc = -EIO;
2736 break;
2737 }
2738
2739 events = mask &
2740 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2741 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2742 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2743 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2744 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2745 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2746 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2747 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2748 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2749 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2750 if (events)
2751 break;
2752
2753 cprev = cnow;
2754 oldsigs = newsigs;
2755 }
2756
2757 remove_wait_queue(&info->event_wait_q, &wait);
2758 set_current_state(TASK_RUNNING);
2759
2760 if (mask & (MgslEvent_ExitHuntMode + MgslEvent_IdleReceived)) {
2761 spin_lock_irqsave(&info->irq_spinlock,flags);
2762 if (!waitqueue_active(&info->event_wait_q)) {
2763 /* disable enable exit hunt mode/idle rcvd IRQs */
2764 usc_OutReg(info, RICR, usc_InReg(info,RICR) &
2765 ~(RXSTATUS_EXITED_HUNT | RXSTATUS_IDLE_RECEIVED));
2766 }
2767 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2768 }
2769exit:
2770 if ( rc == 0 )
2771 PUT_USER(rc, events, mask_ptr);
2772
2773 return rc;
2774
2775} /* end of mgsl_wait_event() */
2776
2777static int modem_input_wait(struct mgsl_struct *info,int arg)
2778{
2779 unsigned long flags;
2780 int rc;
2781 struct mgsl_icount cprev, cnow;
2782 DECLARE_WAITQUEUE(wait, current);
2783
2784 /* save current irq counts */
2785 spin_lock_irqsave(&info->irq_spinlock,flags);
2786 cprev = info->icount;
2787 add_wait_queue(&info->status_event_wait_q, &wait);
2788 set_current_state(TASK_INTERRUPTIBLE);
2789 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2790
2791 for(;;) {
2792 schedule();
2793 if (signal_pending(current)) {
2794 rc = -ERESTARTSYS;
2795 break;
2796 }
2797
2798 /* get new irq counts */
2799 spin_lock_irqsave(&info->irq_spinlock,flags);
2800 cnow = info->icount;
2801 set_current_state(TASK_INTERRUPTIBLE);
2802 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2803
2804 /* if no change, wait aborted for some reason */
2805 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2806 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2807 rc = -EIO;
2808 break;
2809 }
2810
2811 /* check for change in caller specified modem input */
2812 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2813 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2814 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2815 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2816 rc = 0;
2817 break;
2818 }
2819
2820 cprev = cnow;
2821 }
2822 remove_wait_queue(&info->status_event_wait_q, &wait);
2823 set_current_state(TASK_RUNNING);
2824 return rc;
2825}
2826
2827/* return the state of the serial control and status signals
2828 */
2829static int tiocmget(struct tty_struct *tty)
2830{
2831 struct mgsl_struct *info = tty->driver_data;
2832 unsigned int result;
2833 unsigned long flags;
2834
2835 spin_lock_irqsave(&info->irq_spinlock,flags);
2836 usc_get_serial_signals(info);
2837 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2838
2839 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2840 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2841 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2842 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2843 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2844 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2845
2846 if (debug_level >= DEBUG_LEVEL_INFO)
2847 printk("%s(%d):%s tiocmget() value=%08X\n",
2848 __FILE__,__LINE__, info->device_name, result );
2849 return result;
2850}
2851
2852/* set modem control signals (DTR/RTS)
2853 */
2854static int tiocmset(struct tty_struct *tty,
2855 unsigned int set, unsigned int clear)
2856{
2857 struct mgsl_struct *info = tty->driver_data;
2858 unsigned long flags;
2859
2860 if (debug_level >= DEBUG_LEVEL_INFO)
2861 printk("%s(%d):%s tiocmset(%x,%x)\n",
2862 __FILE__,__LINE__,info->device_name, set, clear);
2863
2864 if (set & TIOCM_RTS)
2865 info->serial_signals |= SerialSignal_RTS;
2866 if (set & TIOCM_DTR)
2867 info->serial_signals |= SerialSignal_DTR;
2868 if (clear & TIOCM_RTS)
2869 info->serial_signals &= ~SerialSignal_RTS;
2870 if (clear & TIOCM_DTR)
2871 info->serial_signals &= ~SerialSignal_DTR;
2872
2873 spin_lock_irqsave(&info->irq_spinlock,flags);
2874 usc_set_serial_signals(info);
2875 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2876
2877 return 0;
2878}
2879
2880/* mgsl_break() Set or clear transmit break condition
2881 *
2882 * Arguments: tty pointer to tty instance data
2883 * break_state -1=set break condition, 0=clear
2884 * Return Value: error code
2885 */
2886static int mgsl_break(struct tty_struct *tty, int break_state)
2887{
2888 struct mgsl_struct * info = tty->driver_data;
2889 unsigned long flags;
2890
2891 if (debug_level >= DEBUG_LEVEL_INFO)
2892 printk("%s(%d):mgsl_break(%s,%d)\n",
2893 __FILE__,__LINE__, info->device_name, break_state);
2894
2895 if (mgsl_paranoia_check(info, tty->name, "mgsl_break"))
2896 return -EINVAL;
2897
2898 spin_lock_irqsave(&info->irq_spinlock,flags);
2899 if (break_state == -1)
2900 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) | BIT7));
2901 else
2902 usc_OutReg(info,IOCR,(u16)(usc_InReg(info,IOCR) & ~BIT7));
2903 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2904 return 0;
2905
2906} /* end of mgsl_break() */
2907
2908/*
2909 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
2910 * Return: write counters to the user passed counter struct
2911 * NB: both 1->0 and 0->1 transitions are counted except for
2912 * RI where only 0->1 is counted.
2913 */
2914static int msgl_get_icount(struct tty_struct *tty,
2915 struct serial_icounter_struct *icount)
2916
2917{
2918 struct mgsl_struct * info = tty->driver_data;
2919 struct mgsl_icount cnow; /* kernel counter temps */
2920 unsigned long flags;
2921
2922 spin_lock_irqsave(&info->irq_spinlock,flags);
2923 cnow = info->icount;
2924 spin_unlock_irqrestore(&info->irq_spinlock,flags);
2925
2926 icount->cts = cnow.cts;
2927 icount->dsr = cnow.dsr;
2928 icount->rng = cnow.rng;
2929 icount->dcd = cnow.dcd;
2930 icount->rx = cnow.rx;
2931 icount->tx = cnow.tx;
2932 icount->frame = cnow.frame;
2933 icount->overrun = cnow.overrun;
2934 icount->parity = cnow.parity;
2935 icount->brk = cnow.brk;
2936 icount->buf_overrun = cnow.buf_overrun;
2937 return 0;
2938}
2939
2940/* mgsl_ioctl() Service an IOCTL request
2941 *
2942 * Arguments:
2943 *
2944 * tty pointer to tty instance data
2945 * cmd IOCTL command code
2946 * arg command argument/context
2947 *
2948 * Return Value: 0 if success, otherwise error code
2949 */
2950static int mgsl_ioctl(struct tty_struct *tty,
2951 unsigned int cmd, unsigned long arg)
2952{
2953 struct mgsl_struct * info = tty->driver_data;
2954
2955 if (debug_level >= DEBUG_LEVEL_INFO)
2956 printk("%s(%d):mgsl_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2957 info->device_name, cmd );
2958
2959 if (mgsl_paranoia_check(info, tty->name, "mgsl_ioctl"))
2960 return -ENODEV;
2961
2962 if (cmd != TIOCMIWAIT) {
2963 if (tty_io_error(tty))
2964 return -EIO;
2965 }
2966
2967 return mgsl_ioctl_common(info, cmd, arg);
2968}
2969
2970static int mgsl_ioctl_common(struct mgsl_struct *info, unsigned int cmd, unsigned long arg)
2971{
2972 void __user *argp = (void __user *)arg;
2973
2974 switch (cmd) {
2975 case MGSL_IOCGPARAMS:
2976 return mgsl_get_params(info, argp);
2977 case MGSL_IOCSPARAMS:
2978 return mgsl_set_params(info, argp);
2979 case MGSL_IOCGTXIDLE:
2980 return mgsl_get_txidle(info, argp);
2981 case MGSL_IOCSTXIDLE:
2982 return mgsl_set_txidle(info,(int)arg);
2983 case MGSL_IOCTXENABLE:
2984 return mgsl_txenable(info,(int)arg);
2985 case MGSL_IOCRXENABLE:
2986 return mgsl_rxenable(info,(int)arg);
2987 case MGSL_IOCTXABORT:
2988 return mgsl_txabort(info);
2989 case MGSL_IOCGSTATS:
2990 return mgsl_get_stats(info, argp);
2991 case MGSL_IOCWAITEVENT:
2992 return mgsl_wait_event(info, argp);
2993 case MGSL_IOCLOOPTXDONE:
2994 return mgsl_loopmode_send_done(info);
2995 /* Wait for modem input (DCD,RI,DSR,CTS) change
2996 * as specified by mask in arg (TIOCM_RNG/DSR/CD/CTS)
2997 */
2998 case TIOCMIWAIT:
2999 return modem_input_wait(info,(int)arg);
3000
3001 default:
3002 return -ENOIOCTLCMD;
3003 }
3004 return 0;
3005}
3006
3007/* mgsl_set_termios()
3008 *
3009 * Set new termios settings
3010 *
3011 * Arguments:
3012 *
3013 * tty pointer to tty structure
3014 * termios pointer to buffer to hold returned old termios
3015 *
3016 * Return Value: None
3017 */
3018static void mgsl_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3019{
3020 struct mgsl_struct *info = tty->driver_data;
3021 unsigned long flags;
3022
3023 if (debug_level >= DEBUG_LEVEL_INFO)
3024 printk("%s(%d):mgsl_set_termios %s\n", __FILE__,__LINE__,
3025 tty->driver->name );
3026
3027 mgsl_change_params(info);
3028
3029 /* Handle transition to B0 status */
3030 if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
3031 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3032 spin_lock_irqsave(&info->irq_spinlock,flags);
3033 usc_set_serial_signals(info);
3034 spin_unlock_irqrestore(&info->irq_spinlock,flags);
3035 }
3036
3037 /* Handle transition away from B0 status */
3038 if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
3039 info->serial_signals |= SerialSignal_DTR;
3040 if (!C_CRTSCTS(tty) || !tty_throttled(tty))
3041 info->serial_signals |= SerialSignal_RTS;
3042 spin_lock_irqsave(&info->irq_spinlock,flags);
3043 usc_set_serial_signals(info);
3044 spin_unlock_irqrestore(&info->irq_spinlock,flags);
3045 }
3046
3047 /* Handle turning off CRTSCTS */
3048 if (old_termios->c_cflag & CRTSCTS && !C_CRTSCTS(tty)) {
3049 tty->hw_stopped = 0;
3050 mgsl_start(tty);
3051 }
3052
3053} /* end of mgsl_set_termios() */
3054
3055/* mgsl_close()
3056 *
3057 * Called when port is closed. Wait for remaining data to be
3058 * sent. Disable port and free resources.
3059 *
3060 * Arguments:
3061 *
3062 * tty pointer to open tty structure
3063 * filp pointer to open file object
3064 *
3065 * Return Value: None
3066 */
3067static void mgsl_close(struct tty_struct *tty, struct file * filp)
3068{
3069 struct mgsl_struct * info = tty->driver_data;
3070
3071 if (mgsl_paranoia_check(info, tty->name, "mgsl_close"))
3072 return;
3073
3074 if (debug_level >= DEBUG_LEVEL_INFO)
3075 printk("%s(%d):mgsl_close(%s) entry, count=%d\n",
3076 __FILE__,__LINE__, info->device_name, info->port.count);
3077
3078 if (tty_port_close_start(&info->port, tty, filp) == 0)
3079 goto cleanup;
3080
3081 mutex_lock(&info->port.mutex);
3082 if (tty_port_initialized(&info->port))
3083 mgsl_wait_until_sent(tty, info->timeout);
3084 mgsl_flush_buffer(tty);
3085 tty_ldisc_flush(tty);
3086 shutdown(info);
3087 mutex_unlock(&info->port.mutex);
3088
3089 tty_port_close_end(&info->port, tty);
3090 info->port.tty = NULL;
3091cleanup:
3092 if (debug_level >= DEBUG_LEVEL_INFO)
3093 printk("%s(%d):mgsl_close(%s) exit, count=%d\n", __FILE__,__LINE__,
3094 tty->driver->name, info->port.count);
3095
3096} /* end of mgsl_close() */
3097
3098/* mgsl_wait_until_sent()
3099 *
3100 * Wait until the transmitter is empty.
3101 *
3102 * Arguments:
3103 *
3104 * tty pointer to tty info structure
3105 * timeout time to wait for send completion
3106 *
3107 * Return Value: None
3108 */
3109static void mgsl_wait_until_sent(struct tty_struct *tty, int timeout)
3110{
3111 struct mgsl_struct * info = tty->driver_data;
3112 unsigned long orig_jiffies, char_time;
3113
3114 if (!info )
3115 return;
3116
3117 if (debug_level >= DEBUG_LEVEL_INFO)
3118 printk("%s(%d):mgsl_wait_until_sent(%s) entry\n",
3119 __FILE__,__LINE__, info->device_name );
3120
3121 if (mgsl_paranoia_check(info, tty->name, "mgsl_wait_until_sent"))
3122 return;
3123
3124 if (!tty_port_initialized(&info->port))
3125 goto exit;
3126
3127 orig_jiffies = jiffies;
3128
3129 /* Set check interval to 1/5 of estimated time to
3130 * send a character, and make it at least 1. The check
3131 * interval should also be less than the timeout.
3132 * Note: use tight timings here to satisfy the NIST-PCTS.
3133 */
3134
3135 if ( info->params.data_rate ) {
3136 char_time = info->timeout/(32 * 5);
3137 if (!char_time)
3138 char_time++;
3139 } else
3140 char_time = 1;
3141
3142 if (timeout)
3143 char_time = min_t(unsigned long, char_time, timeout);
3144
3145 if ( info->params.mode == MGSL_MODE_HDLC ||
3146 info->params.mode == MGSL_MODE_RAW ) {
3147 while (info->tx_active) {
3148 msleep_interruptible(jiffies_to_msecs(char_time));
3149 if (signal_pending(current))
3150 break;
3151 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3152 break;
3153 }
3154 } else {
3155 while (!(usc_InReg(info,TCSR) & TXSTATUS_ALL_SENT) &&
3156 info->tx_enabled) {
3157 msleep_interruptible(jiffies_to_msecs(char_time));
3158 if (signal_pending(current))
3159 break;
3160 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3161 break;
3162 }
3163 }
3164
3165exit:
3166 if (debug_level >= DEBUG_LEVEL_INFO)
3167 printk("%s(%d):mgsl_wait_until_sent(%s) exit\n",
3168 __FILE__,__LINE__, info->device_name );
3169
3170} /* end of mgsl_wait_until_sent() */
3171
3172/* mgsl_hangup()
3173 *
3174 * Called by tty_hangup() when a hangup is signaled.
3175 * This is the same as to closing all open files for the port.
3176 *
3177 * Arguments: tty pointer to associated tty object
3178 * Return Value: None
3179 */
3180static void mgsl_hangup(struct tty_struct *tty)
3181{
3182 struct mgsl_struct * info = tty->driver_data;
3183
3184 if (debug_level >= DEBUG_LEVEL_INFO)
3185 printk("%s(%d):mgsl_hangup(%s)\n",
3186 __FILE__,__LINE__, info->device_name );
3187
3188 if (mgsl_paranoia_check(info, tty->name, "mgsl_hangup"))
3189 return;
3190
3191 mgsl_flush_buffer(tty);
3192 shutdown(info);
3193
3194 info->port.count = 0;
3195 tty_port_set_active(&info->port, 0);
3196 info->port.tty = NULL;
3197
3198 wake_up_interruptible(&info->port.open_wait);
3199
3200} /* end of mgsl_hangup() */
3201
3202/*
3203 * carrier_raised()
3204 *
3205 * Return true if carrier is raised
3206 */
3207
3208static int carrier_raised(struct tty_port *port)
3209{
3210 unsigned long flags;
3211 struct mgsl_struct *info = container_of(port, struct mgsl_struct, port);
3212
3213 spin_lock_irqsave(&info->irq_spinlock, flags);
3214 usc_get_serial_signals(info);
3215 spin_unlock_irqrestore(&info->irq_spinlock, flags);
3216 return (info->serial_signals & SerialSignal_DCD) ? 1 : 0;
3217}
3218
3219static void dtr_rts(struct tty_port *port, int on)
3220{
3221 struct mgsl_struct *info = container_of(port, struct mgsl_struct, port);
3222 unsigned long flags;
3223
3224 spin_lock_irqsave(&info->irq_spinlock,flags);
3225 if (on)
3226 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
3227 else
3228 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3229 usc_set_serial_signals(info);
3230 spin_unlock_irqrestore(&info->irq_spinlock,flags);
3231}
3232
3233
3234/* block_til_ready()
3235 *
3236 * Block the current process until the specified port
3237 * is ready to be opened.
3238 *
3239 * Arguments:
3240 *
3241 * tty pointer to tty info structure
3242 * filp pointer to open file object
3243 * info pointer to device instance data
3244 *
3245 * Return Value: 0 if success, otherwise error code
3246 */
3247static int block_til_ready(struct tty_struct *tty, struct file * filp,
3248 struct mgsl_struct *info)
3249{
3250 DECLARE_WAITQUEUE(wait, current);
3251 int retval;
3252 bool do_clocal = false;
3253 unsigned long flags;
3254 int dcd;
3255 struct tty_port *port = &info->port;
3256
3257 if (debug_level >= DEBUG_LEVEL_INFO)
3258 printk("%s(%d):block_til_ready on %s\n",
3259 __FILE__,__LINE__, tty->driver->name );
3260
3261 if (filp->f_flags & O_NONBLOCK || tty_io_error(tty)) {
3262 /* nonblock mode is set or port is not enabled */
3263 tty_port_set_active(port, 1);
3264 return 0;
3265 }
3266
3267 if (C_CLOCAL(tty))
3268 do_clocal = true;
3269
3270 /* Wait for carrier detect and the line to become
3271 * free (i.e., not in use by the callout). While we are in
3272 * this loop, port->count is dropped by one, so that
3273 * mgsl_close() knows when to free things. We restore it upon
3274 * exit, either normal or abnormal.
3275 */
3276
3277 retval = 0;
3278 add_wait_queue(&port->open_wait, &wait);
3279
3280 if (debug_level >= DEBUG_LEVEL_INFO)
3281 printk("%s(%d):block_til_ready before block on %s count=%d\n",
3282 __FILE__,__LINE__, tty->driver->name, port->count );
3283
3284 spin_lock_irqsave(&info->irq_spinlock, flags);
3285 port->count--;
3286 spin_unlock_irqrestore(&info->irq_spinlock, flags);
3287 port->blocked_open++;
3288
3289 while (1) {
3290 if (C_BAUD(tty) && tty_port_initialized(port))
3291 tty_port_raise_dtr_rts(port);
3292
3293 set_current_state(TASK_INTERRUPTIBLE);
3294
3295 if (tty_hung_up_p(filp) || !tty_port_initialized(port)) {
3296 retval = (port->flags & ASYNC_HUP_NOTIFY) ?
3297 -EAGAIN : -ERESTARTSYS;
3298 break;
3299 }
3300
3301 dcd = tty_port_carrier_raised(&info->port);
3302 if (do_clocal || dcd)
3303 break;
3304
3305 if (signal_pending(current)) {
3306 retval = -ERESTARTSYS;
3307 break;
3308 }
3309
3310 if (debug_level >= DEBUG_LEVEL_INFO)
3311 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
3312 __FILE__,__LINE__, tty->driver->name, port->count );
3313
3314 tty_unlock(tty);
3315 schedule();
3316 tty_lock(tty);
3317 }
3318
3319 set_current_state(TASK_RUNNING);
3320 remove_wait_queue(&port->open_wait, &wait);
3321
3322 /* FIXME: Racy on hangup during close wait */
3323 if (!tty_hung_up_p(filp))
3324 port->count++;
3325 port->blocked_open--;
3326
3327 if (debug_level >= DEBUG_LEVEL_INFO)
3328 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
3329 __FILE__,__LINE__, tty->driver->name, port->count );
3330
3331 if (!retval)
3332 tty_port_set_active(port, 1);
3333
3334 return retval;
3335
3336} /* end of block_til_ready() */
3337
3338static int mgsl_install(struct tty_driver *driver, struct tty_struct *tty)
3339{
3340 struct mgsl_struct *info;
3341 int line = tty->index;
3342
3343 /* verify range of specified line number */
3344 if (line >= mgsl_device_count) {
3345 printk("%s(%d):mgsl_open with invalid line #%d.\n",
3346 __FILE__, __LINE__, line);
3347 return -ENODEV;
3348 }
3349
3350 /* find the info structure for the specified line */
3351 info = mgsl_device_list;
3352 while (info && info->line != line)
3353 info = info->next_device;
3354 if (mgsl_paranoia_check(info, tty->name, "mgsl_open"))
3355 return -ENODEV;
3356 tty->driver_data = info;
3357
3358 return tty_port_install(&info->port, driver, tty);
3359}
3360
3361/* mgsl_open()
3362 *
3363 * Called when a port is opened. Init and enable port.
3364 * Perform serial-specific initialization for the tty structure.
3365 *
3366 * Arguments: tty pointer to tty info structure
3367 * filp associated file pointer
3368 *
3369 * Return Value: 0 if success, otherwise error code
3370 */
3371static int mgsl_open(struct tty_struct *tty, struct file * filp)
3372{
3373 struct mgsl_struct *info = tty->driver_data;
3374 unsigned long flags;
3375 int retval;
3376
3377 info->port.tty = tty;
3378
3379 if (debug_level >= DEBUG_LEVEL_INFO)
3380 printk("%s(%d):mgsl_open(%s), old ref count = %d\n",
3381 __FILE__,__LINE__,tty->driver->name, info->port.count);
3382
3383 info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3384
3385 spin_lock_irqsave(&info->netlock, flags);
3386 if (info->netcount) {
3387 retval = -EBUSY;
3388 spin_unlock_irqrestore(&info->netlock, flags);
3389 goto cleanup;
3390 }
3391 info->port.count++;
3392 spin_unlock_irqrestore(&info->netlock, flags);
3393
3394 if (info->port.count == 1) {
3395 /* 1st open on this device, init hardware */
3396 retval = startup(info);
3397 if (retval < 0)
3398 goto cleanup;
3399 }
3400
3401 retval = block_til_ready(tty, filp, info);
3402 if (retval) {
3403 if (debug_level >= DEBUG_LEVEL_INFO)
3404 printk("%s(%d):block_til_ready(%s) returned %d\n",
3405 __FILE__,__LINE__, info->device_name, retval);
3406 goto cleanup;
3407 }
3408
3409 if (debug_level >= DEBUG_LEVEL_INFO)
3410 printk("%s(%d):mgsl_open(%s) success\n",
3411 __FILE__,__LINE__, info->device_name);
3412 retval = 0;
3413
3414cleanup:
3415 if (retval) {
3416 if (tty->count == 1)
3417 info->port.tty = NULL; /* tty layer will release tty struct */
3418 if(info->port.count)
3419 info->port.count--;
3420 }
3421
3422 return retval;
3423
3424} /* end of mgsl_open() */
3425
3426/*
3427 * /proc fs routines....
3428 */
3429
3430static inline void line_info(struct seq_file *m, struct mgsl_struct *info)
3431{
3432 char stat_buf[30];
3433 unsigned long flags;
3434
3435 if (info->bus_type == MGSL_BUS_TYPE_PCI) {
3436 seq_printf(m, "%s:PCI io:%04X irq:%d mem:%08X lcr:%08X",
3437 info->device_name, info->io_base, info->irq_level,
3438 info->phys_memory_base, info->phys_lcr_base);
3439 } else {
3440 seq_printf(m, "%s:(E)ISA io:%04X irq:%d dma:%d",
3441 info->device_name, info->io_base,
3442 info->irq_level, info->dma_level);
3443 }
3444
3445 /* output current serial signal states */
3446 spin_lock_irqsave(&info->irq_spinlock,flags);
3447 usc_get_serial_signals(info);
3448 spin_unlock_irqrestore(&info->irq_spinlock,flags);
3449
3450 stat_buf[0] = 0;
3451 stat_buf[1] = 0;
3452 if (info->serial_signals & SerialSignal_RTS)
3453 strcat(stat_buf, "|RTS");
3454 if (info->serial_signals & SerialSignal_CTS)
3455 strcat(stat_buf, "|CTS");
3456 if (info->serial_signals & SerialSignal_DTR)
3457 strcat(stat_buf, "|DTR");
3458 if (info->serial_signals & SerialSignal_DSR)
3459 strcat(stat_buf, "|DSR");
3460 if (info->serial_signals & SerialSignal_DCD)
3461 strcat(stat_buf, "|CD");
3462 if (info->serial_signals & SerialSignal_RI)
3463 strcat(stat_buf, "|RI");
3464
3465 if (info->params.mode == MGSL_MODE_HDLC ||
3466 info->params.mode == MGSL_MODE_RAW ) {
3467 seq_printf(m, " HDLC txok:%d rxok:%d",
3468 info->icount.txok, info->icount.rxok);
3469 if (info->icount.txunder)
3470 seq_printf(m, " txunder:%d", info->icount.txunder);
3471 if (info->icount.txabort)
3472 seq_printf(m, " txabort:%d", info->icount.txabort);
3473 if (info->icount.rxshort)
3474 seq_printf(m, " rxshort:%d", info->icount.rxshort);
3475 if (info->icount.rxlong)
3476 seq_printf(m, " rxlong:%d", info->icount.rxlong);
3477 if (info->icount.rxover)
3478 seq_printf(m, " rxover:%d", info->icount.rxover);
3479 if (info->icount.rxcrc)
3480 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
3481 } else {
3482 seq_printf(m, " ASYNC tx:%d rx:%d",
3483 info->icount.tx, info->icount.rx);
3484 if (info->icount.frame)
3485 seq_printf(m, " fe:%d", info->icount.frame);
3486 if (info->icount.parity)
3487 seq_printf(m, " pe:%d", info->icount.parity);
3488 if (info->icount.brk)
3489 seq_printf(m, " brk:%d", info->icount.brk);
3490 if (info->icount.overrun)
3491 seq_printf(m, " oe:%d", info->icount.overrun);
3492 }
3493
3494 /* Append serial signal status to end */
3495 seq_printf(m, " %s\n", stat_buf+1);
3496
3497 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
3498 info->tx_active,info->bh_requested,info->bh_running,
3499 info->pending_bh);
3500
3501 spin_lock_irqsave(&info->irq_spinlock,flags);
3502 {
3503 u16 Tcsr = usc_InReg( info, TCSR );
3504 u16 Tdmr = usc_InDmaReg( info, TDMR );
3505 u16 Ticr = usc_InReg( info, TICR );
3506 u16 Rscr = usc_InReg( info, RCSR );
3507 u16 Rdmr = usc_InDmaReg( info, RDMR );
3508 u16 Ricr = usc_InReg( info, RICR );
3509 u16 Icr = usc_InReg( info, ICR );
3510 u16 Dccr = usc_InReg( info, DCCR );
3511 u16 Tmr = usc_InReg( info, TMR );
3512 u16 Tccr = usc_InReg( info, TCCR );
3513 u16 Ccar = inw( info->io_base + CCAR );
3514 seq_printf(m, "tcsr=%04X tdmr=%04X ticr=%04X rcsr=%04X rdmr=%04X\n"
3515 "ricr=%04X icr =%04X dccr=%04X tmr=%04X tccr=%04X ccar=%04X\n",
3516 Tcsr,Tdmr,Ticr,Rscr,Rdmr,Ricr,Icr,Dccr,Tmr,Tccr,Ccar );
3517 }
3518 spin_unlock_irqrestore(&info->irq_spinlock,flags);
3519}
3520
3521/* Called to print information about devices */
3522static int mgsl_proc_show(struct seq_file *m, void *v)
3523{
3524 struct mgsl_struct *info;
3525
3526 seq_printf(m, "synclink driver:%s\n", driver_version);
3527
3528 info = mgsl_device_list;
3529 while( info ) {
3530 line_info(m, info);
3531 info = info->next_device;
3532 }
3533 return 0;
3534}
3535
3536/* mgsl_allocate_dma_buffers()
3537 *
3538 * Allocate and format DMA buffers (ISA adapter)
3539 * or format shared memory buffers (PCI adapter).
3540 *
3541 * Arguments: info pointer to device instance data
3542 * Return Value: 0 if success, otherwise error
3543 */
3544static int mgsl_allocate_dma_buffers(struct mgsl_struct *info)
3545{
3546 unsigned short BuffersPerFrame;
3547
3548 info->last_mem_alloc = 0;
3549
3550 /* Calculate the number of DMA buffers necessary to hold the */
3551 /* largest allowable frame size. Note: If the max frame size is */
3552 /* not an even multiple of the DMA buffer size then we need to */
3553 /* round the buffer count per frame up one. */
3554
3555 BuffersPerFrame = (unsigned short)(info->max_frame_size/DMABUFFERSIZE);
3556 if ( info->max_frame_size % DMABUFFERSIZE )
3557 BuffersPerFrame++;
3558
3559 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) {
3560 /*
3561 * The PCI adapter has 256KBytes of shared memory to use.
3562 * This is 64 PAGE_SIZE buffers.
3563 *
3564 * The first page is used for padding at this time so the
3565 * buffer list does not begin at offset 0 of the PCI
3566 * adapter's shared memory.
3567 *
3568 * The 2nd page is used for the buffer list. A 4K buffer
3569 * list can hold 128 DMA_BUFFER structures at 32 bytes
3570 * each.
3571 *
3572 * This leaves 62 4K pages.
3573 *
3574 * The next N pages are used for transmit frame(s). We
3575 * reserve enough 4K page blocks to hold the required
3576 * number of transmit dma buffers (num_tx_dma_buffers),
3577 * each of MaxFrameSize size.
3578 *
3579 * Of the remaining pages (62-N), determine how many can
3580 * be used to receive full MaxFrameSize inbound frames
3581 */
3582 info->tx_buffer_count = info->num_tx_dma_buffers * BuffersPerFrame;
3583 info->rx_buffer_count = 62 - info->tx_buffer_count;
3584 } else {
3585 /* Calculate the number of PAGE_SIZE buffers needed for */
3586 /* receive and transmit DMA buffers. */
3587
3588
3589 /* Calculate the number of DMA buffers necessary to */
3590 /* hold 7 max size receive frames and one max size transmit frame. */
3591 /* The receive buffer count is bumped by one so we avoid an */
3592 /* End of List condition if all receive buffers are used when */
3593 /* using linked list DMA buffers. */
3594
3595 info->tx_buffer_count = info->num_tx_dma_buffers * BuffersPerFrame;
3596 info->rx_buffer_count = (BuffersPerFrame * MAXRXFRAMES) + 6;
3597
3598 /*
3599 * limit total TxBuffers & RxBuffers to 62 4K total
3600 * (ala PCI Allocation)
3601 */
3602
3603 if ( (info->tx_buffer_count + info->rx_buffer_count) > 62 )
3604 info->rx_buffer_count = 62 - info->tx_buffer_count;
3605
3606 }
3607
3608 if ( debug_level >= DEBUG_LEVEL_INFO )
3609 printk("%s(%d):Allocating %d TX and %d RX DMA buffers.\n",
3610 __FILE__,__LINE__, info->tx_buffer_count,info->rx_buffer_count);
3611
3612 if ( mgsl_alloc_buffer_list_memory( info ) < 0 ||
3613 mgsl_alloc_frame_memory(info, info->rx_buffer_list, info->rx_buffer_count) < 0 ||
3614 mgsl_alloc_frame_memory(info, info->tx_buffer_list, info->tx_buffer_count) < 0 ||
3615 mgsl_alloc_intermediate_rxbuffer_memory(info) < 0 ||
3616 mgsl_alloc_intermediate_txbuffer_memory(info) < 0 ) {
3617 printk("%s(%d):Can't allocate DMA buffer memory\n",__FILE__,__LINE__);
3618 return -ENOMEM;
3619 }
3620
3621 mgsl_reset_rx_dma_buffers( info );
3622 mgsl_reset_tx_dma_buffers( info );
3623
3624 return 0;
3625
3626} /* end of mgsl_allocate_dma_buffers() */
3627
3628/*
3629 * mgsl_alloc_buffer_list_memory()
3630 *
3631 * Allocate a common DMA buffer for use as the
3632 * receive and transmit buffer lists.
3633 *
3634 * A buffer list is a set of buffer entries where each entry contains
3635 * a pointer to an actual buffer and a pointer to the next buffer entry
3636 * (plus some other info about the buffer).
3637 *
3638 * The buffer entries for a list are built to form a circular list so
3639 * that when the entire list has been traversed you start back at the
3640 * beginning.
3641 *
3642 * This function allocates memory for just the buffer entries.
3643 * The links (pointer to next entry) are filled in with the physical
3644 * address of the next entry so the adapter can navigate the list
3645 * using bus master DMA. The pointers to the actual buffers are filled
3646 * out later when the actual buffers are allocated.
3647 *
3648 * Arguments: info pointer to device instance data
3649 * Return Value: 0 if success, otherwise error
3650 */
3651static int mgsl_alloc_buffer_list_memory( struct mgsl_struct *info )
3652{
3653 unsigned int i;
3654
3655 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) {
3656 /* PCI adapter uses shared memory. */
3657 info->buffer_list = info->memory_base + info->last_mem_alloc;
3658 info->buffer_list_phys = info->last_mem_alloc;
3659 info->last_mem_alloc += BUFFERLISTSIZE;
3660 } else {
3661 /* ISA adapter uses system memory. */
3662 /* The buffer lists are allocated as a common buffer that both */
3663 /* the processor and adapter can access. This allows the driver to */
3664 /* inspect portions of the buffer while other portions are being */
3665 /* updated by the adapter using Bus Master DMA. */
3666
3667 info->buffer_list = dma_alloc_coherent(NULL, BUFFERLISTSIZE, &info->buffer_list_dma_addr, GFP_KERNEL);
3668 if (info->buffer_list == NULL)
3669 return -ENOMEM;
3670 info->buffer_list_phys = (u32)(info->buffer_list_dma_addr);
3671 }
3672
3673 /* We got the memory for the buffer entry lists. */
3674 /* Initialize the memory block to all zeros. */
3675 memset( info->buffer_list, 0, BUFFERLISTSIZE );
3676
3677 /* Save virtual address pointers to the receive and */
3678 /* transmit buffer lists. (Receive 1st). These pointers will */
3679 /* be used by the processor to access the lists. */
3680 info->rx_buffer_list = (DMABUFFERENTRY *)info->buffer_list;
3681 info->tx_buffer_list = (DMABUFFERENTRY *)info->buffer_list;
3682 info->tx_buffer_list += info->rx_buffer_count;
3683
3684 /*
3685 * Build the links for the buffer entry lists such that
3686 * two circular lists are built. (Transmit and Receive).
3687 *
3688 * Note: the links are physical addresses
3689 * which are read by the adapter to determine the next
3690 * buffer entry to use.
3691 */
3692
3693 for ( i = 0; i < info->rx_buffer_count; i++ ) {
3694 /* calculate and store physical address of this buffer entry */
3695 info->rx_buffer_list[i].phys_entry =
3696 info->buffer_list_phys + (i * sizeof(DMABUFFERENTRY));
3697
3698 /* calculate and store physical address of */
3699 /* next entry in cirular list of entries */
3700
3701 info->rx_buffer_list[i].link = info->buffer_list_phys;
3702
3703 if ( i < info->rx_buffer_count - 1 )
3704 info->rx_buffer_list[i].link += (i + 1) * sizeof(DMABUFFERENTRY);
3705 }
3706
3707 for ( i = 0; i < info->tx_buffer_count; i++ ) {
3708 /* calculate and store physical address of this buffer entry */
3709 info->tx_buffer_list[i].phys_entry = info->buffer_list_phys +
3710 ((info->rx_buffer_count + i) * sizeof(DMABUFFERENTRY));
3711
3712 /* calculate and store physical address of */
3713 /* next entry in cirular list of entries */
3714
3715 info->tx_buffer_list[i].link = info->buffer_list_phys +
3716 info->rx_buffer_count * sizeof(DMABUFFERENTRY);
3717
3718 if ( i < info->tx_buffer_count - 1 )
3719 info->tx_buffer_list[i].link += (i + 1) * sizeof(DMABUFFERENTRY);
3720 }
3721
3722 return 0;
3723
3724} /* end of mgsl_alloc_buffer_list_memory() */
3725
3726/* Free DMA buffers allocated for use as the
3727 * receive and transmit buffer lists.
3728 * Warning:
3729 *
3730 * The data transfer buffers associated with the buffer list
3731 * MUST be freed before freeing the buffer list itself because
3732 * the buffer list contains the information necessary to free
3733 * the individual buffers!
3734 */
3735static void mgsl_free_buffer_list_memory( struct mgsl_struct *info )
3736{
3737 if (info->buffer_list && info->bus_type != MGSL_BUS_TYPE_PCI)
3738 dma_free_coherent(NULL, BUFFERLISTSIZE, info->buffer_list, info->buffer_list_dma_addr);
3739
3740 info->buffer_list = NULL;
3741 info->rx_buffer_list = NULL;
3742 info->tx_buffer_list = NULL;
3743
3744} /* end of mgsl_free_buffer_list_memory() */
3745
3746/*
3747 * mgsl_alloc_frame_memory()
3748 *
3749 * Allocate the frame DMA buffers used by the specified buffer list.
3750 * Each DMA buffer will be one memory page in size. This is necessary
3751 * because memory can fragment enough that it may be impossible
3752 * contiguous pages.
3753 *
3754 * Arguments:
3755 *
3756 * info pointer to device instance data
3757 * BufferList pointer to list of buffer entries
3758 * Buffercount count of buffer entries in buffer list
3759 *
3760 * Return Value: 0 if success, otherwise -ENOMEM
3761 */
3762static int mgsl_alloc_frame_memory(struct mgsl_struct *info,DMABUFFERENTRY *BufferList,int Buffercount)
3763{
3764 int i;
3765 u32 phys_addr;
3766
3767 /* Allocate page sized buffers for the receive buffer list */
3768
3769 for ( i = 0; i < Buffercount; i++ ) {
3770 if ( info->bus_type == MGSL_BUS_TYPE_PCI ) {
3771 /* PCI adapter uses shared memory buffers. */
3772 BufferList[i].virt_addr = info->memory_base + info->last_mem_alloc;
3773 phys_addr = info->last_mem_alloc;
3774 info->last_mem_alloc += DMABUFFERSIZE;
3775 } else {
3776 /* ISA adapter uses system memory. */
3777 BufferList[i].virt_addr = dma_alloc_coherent(NULL, DMABUFFERSIZE, &BufferList[i].dma_addr, GFP_KERNEL);
3778 if (BufferList[i].virt_addr == NULL)
3779 return -ENOMEM;
3780 phys_addr = (u32)(BufferList[i].dma_addr);
3781 }
3782 BufferList[i].phys_addr = phys_addr;
3783 }
3784
3785 return 0;
3786
3787} /* end of mgsl_alloc_frame_memory() */
3788
3789/*
3790 * mgsl_free_frame_memory()
3791 *
3792 * Free the buffers associated with
3793 * each buffer entry of a buffer list.
3794 *
3795 * Arguments:
3796 *
3797 * info pointer to device instance data
3798 * BufferList pointer to list of buffer entries
3799 * Buffercount count of buffer entries in buffer list
3800 *
3801 * Return Value: None
3802 */
3803static void mgsl_free_frame_memory(struct mgsl_struct *info, DMABUFFERENTRY *BufferList, int Buffercount)
3804{
3805 int i;
3806
3807 if ( BufferList ) {
3808 for ( i = 0 ; i < Buffercount ; i++ ) {
3809 if ( BufferList[i].virt_addr ) {
3810 if ( info->bus_type != MGSL_BUS_TYPE_PCI )
3811 dma_free_coherent(NULL, DMABUFFERSIZE, BufferList[i].virt_addr, BufferList[i].dma_addr);
3812 BufferList[i].virt_addr = NULL;
3813 }
3814 }
3815 }
3816
3817} /* end of mgsl_free_frame_memory() */
3818
3819/* mgsl_free_dma_buffers()
3820 *
3821 * Free DMA buffers
3822 *
3823 * Arguments: info pointer to device instance data
3824 * Return Value: None
3825 */
3826static void mgsl_free_dma_buffers( struct mgsl_struct *info )