1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29#include "trace.h"
30
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
33ctrl_endpt_out_desc = {
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
52static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
53 struct td_node *node);
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + ((dir == TX) ? 16 : 0);
64}
65
66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67{
68 int fill = 16 - ci->hw_ep_max / 2;
69
70 if (n >= ci->hw_ep_max / 2)
71 n += fill;
72
73 return n;
74}
75
76/**
77 * hw_device_state: enables/disables interrupts (execute without interruption)
78 * @ci: the controller
79 * @dma: 0 => disable, !0 => enable and set dma engine
80 *
81 * This function returns an error code
82 */
83static int hw_device_state(struct ci_hdrc *ci, u32 dma)
84{
85 if (dma) {
86 hw_write(ci, reg: OP_ENDPTLISTADDR, mask: ~0, data: dma);
87 /* interrupt, error, port change, reset, sleep/suspend */
88 hw_write(ci, reg: OP_USBINTR, mask: ~0,
89 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
90 } else {
91 hw_write(ci, reg: OP_USBINTR, mask: ~0, data: 0);
92 }
93 return 0;
94}
95
96/**
97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
98 * @ci: the controller
99 * @num: endpoint number
100 * @dir: endpoint direction
101 *
102 * This function returns an error code
103 */
104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
105{
106 int n = hw_ep_bit(num, dir);
107
108 do {
109 /* flush any pending transfer */
110 hw_write(ci, reg: OP_ENDPTFLUSH, mask: ~0, BIT(n));
111 while (hw_read(ci, reg: OP_ENDPTFLUSH, BIT(n)))
112 cpu_relax();
113 } while (hw_read(ci, reg: OP_ENDPTSTAT, BIT(n)));
114
115 return 0;
116}
117
118/**
119 * hw_ep_disable: disables endpoint (execute without interruption)
120 * @ci: the controller
121 * @num: endpoint number
122 * @dir: endpoint direction
123 *
124 * This function returns an error code
125 */
126static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
127{
128 hw_write(ci, reg: OP_ENDPTCTRL + num,
129 mask: (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, data: 0);
130 return 0;
131}
132
133/**
134 * hw_ep_enable: enables endpoint (execute without interruption)
135 * @ci: the controller
136 * @num: endpoint number
137 * @dir: endpoint direction
138 * @type: endpoint type
139 *
140 * This function returns an error code
141 */
142static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
143{
144 u32 mask, data;
145
146 if (dir == TX) {
147 mask = ENDPTCTRL_TXT; /* type */
148 data = type << __ffs(mask);
149
150 mask |= ENDPTCTRL_TXS; /* unstall */
151 mask |= ENDPTCTRL_TXR; /* reset data toggle */
152 data |= ENDPTCTRL_TXR;
153 mask |= ENDPTCTRL_TXE; /* enable */
154 data |= ENDPTCTRL_TXE;
155 } else {
156 mask = ENDPTCTRL_RXT; /* type */
157 data = type << __ffs(mask);
158
159 mask |= ENDPTCTRL_RXS; /* unstall */
160 mask |= ENDPTCTRL_RXR; /* reset data toggle */
161 data |= ENDPTCTRL_RXR;
162 mask |= ENDPTCTRL_RXE; /* enable */
163 data |= ENDPTCTRL_RXE;
164 }
165 hw_write(ci, reg: OP_ENDPTCTRL + num, mask, data);
166 return 0;
167}
168
169/**
170 * hw_ep_get_halt: return endpoint halt status
171 * @ci: the controller
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
178{
179 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(ci, reg: OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_ep_prime: primes endpoint (execute without interruption)
186 * @ci: the controller
187 * @num: endpoint number
188 * @dir: endpoint direction
189 * @is_ctrl: true if control endpoint
190 *
191 * This function returns an error code
192 */
193static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
194{
195 int n = hw_ep_bit(num, dir);
196
197 /* Synchronize before ep prime */
198 wmb();
199
200 if (is_ctrl && dir == RX && hw_read(ci, reg: OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 hw_write(ci, reg: OP_ENDPTPRIME, mask: ~0, BIT(n));
204
205 while (hw_read(ci, reg: OP_ENDPTPRIME, BIT(n)))
206 cpu_relax();
207 if (is_ctrl && dir == RX && hw_read(ci, reg: OP_ENDPTSETUPSTAT, BIT(num)))
208 return -EAGAIN;
209
210 /* status shoult be tested according with manual but it doesn't work */
211 return 0;
212}
213
214/**
215 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
216 * without interruption)
217 * @ci: the controller
218 * @num: endpoint number
219 * @dir: endpoint direction
220 * @value: true => stall, false => unstall
221 *
222 * This function returns an error code
223 */
224static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
225{
226 if (value != 0 && value != 1)
227 return -EINVAL;
228
229 do {
230 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
231 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
232 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
233
234 /* data toggle - reserved for EP0 but it's in ESS */
235 hw_write(ci, reg, mask: mask_xs|mask_xr,
236 data: value ? mask_xs : mask_xr);
237 } while (value != hw_ep_get_halt(ci, num, dir));
238
239 return 0;
240}
241
242/**
243 * hw_port_is_high_speed: test if port is high speed
244 * @ci: the controller
245 *
246 * This function returns true if high speed port
247 */
248static int hw_port_is_high_speed(struct ci_hdrc *ci)
249{
250 return ci->hw_bank.lpm ? hw_read(ci, reg: OP_DEVLC, DEVLC_PSPD) :
251 hw_read(ci, reg: OP_PORTSC, PORTSC_HSP);
252}
253
254/**
255 * hw_test_and_clear_complete: test & clear complete status (execute without
256 * interruption)
257 * @ci: the controller
258 * @n: endpoint number
259 *
260 * This function returns complete status
261 */
262static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
263{
264 n = ep_to_bit(ci, n);
265 return hw_test_and_clear(ci, reg: OP_ENDPTCOMPLETE, BIT(n));
266}
267
268/**
269 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
270 * without interruption)
271 * @ci: the controller
272 *
273 * This function returns active interrutps
274 */
275static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
276{
277 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
278
279 hw_write(ci, reg: OP_USBSTS, mask: ~0, data: reg);
280 return reg;
281}
282
283/**
284 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
285 * interruption)
286 * @ci: the controller
287 *
288 * This function returns guard value
289 */
290static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
291{
292 return hw_test_and_write(ci, reg: OP_USBCMD, USBCMD_SUTW, data: 0);
293}
294
295/**
296 * hw_test_and_set_setup_guard: test & set setup guard (execute without
297 * interruption)
298 * @ci: the controller
299 *
300 * This function returns guard value
301 */
302static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
303{
304 return hw_test_and_write(ci, reg: OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
305}
306
307/**
308 * hw_usb_set_address: configures USB address (execute without interruption)
309 * @ci: the controller
310 * @value: new USB address
311 *
312 * This function explicitly sets the address, without the "USBADRA" (advance)
313 * feature, which is not supported by older versions of the controller.
314 */
315static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
316{
317 hw_write(ci, reg: OP_DEVICEADDR, DEVICEADDR_USBADR,
318 data: value << __ffs(DEVICEADDR_USBADR));
319}
320
321/**
322 * hw_usb_reset: restart device after a bus reset (execute without
323 * interruption)
324 * @ci: the controller
325 *
326 * This function returns an error code
327 */
328static int hw_usb_reset(struct ci_hdrc *ci)
329{
330 hw_usb_set_address(ci, value: 0);
331
332 /* ESS flushes only at end?!? */
333 hw_write(ci, reg: OP_ENDPTFLUSH, mask: ~0, data: ~0);
334
335 /* clear setup token semaphores */
336 hw_write(ci, reg: OP_ENDPTSETUPSTAT, mask: 0, data: 0);
337
338 /* clear complete status */
339 hw_write(ci, reg: OP_ENDPTCOMPLETE, mask: 0, data: 0);
340
341 /* wait until all bits cleared */
342 while (hw_read(ci, reg: OP_ENDPTPRIME, mask: ~0))
343 udelay(10); /* not RTOS friendly */
344
345 /* reset all endpoints ? */
346
347 /* reset internal status and wait for further instructions
348 no need to verify the port reset status (ESS does it) */
349
350 return 0;
351}
352
353/******************************************************************************
354 * UTIL block
355 *****************************************************************************/
356
357static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
358 unsigned int length, struct scatterlist *s)
359{
360 int i;
361 u32 temp;
362 struct td_node *lastnode, *node = kzalloc(size: sizeof(struct td_node),
363 GFP_ATOMIC);
364
365 if (node == NULL)
366 return -ENOMEM;
367
368 node->ptr = dma_pool_zalloc(pool: hwep->td_pool, GFP_ATOMIC, handle: &node->dma);
369 if (node->ptr == NULL) {
370 kfree(objp: node);
371 return -ENOMEM;
372 }
373
374 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
375 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
376 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
377 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
378 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
379
380 if (hwreq->req.length == 0
381 || hwreq->req.length % hwep->ep.maxpacket)
382 mul++;
383 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
384 }
385
386 if (s) {
387 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
388 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
389 } else {
390 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
391 }
392
393 if (length) {
394 node->ptr->page[0] = cpu_to_le32(temp);
395 for (i = 1; i < TD_PAGE_COUNT; i++) {
396 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 page &= ~TD_RESERVED_MASK;
398 node->ptr->page[i] = cpu_to_le32(page);
399 }
400 }
401
402 hwreq->req.actual += length;
403
404 if (!list_empty(head: &hwreq->tds)) {
405 /* get the last entry */
406 lastnode = list_entry(hwreq->tds.prev,
407 struct td_node, td);
408 lastnode->ptr->next = cpu_to_le32(node->dma);
409 }
410
411 INIT_LIST_HEAD(list: &node->td);
412 list_add_tail(new: &node->td, head: &hwreq->tds);
413
414 return 0;
415}
416
417/**
418 * _usb_addr: calculates endpoint address from direction & number
419 * @ep: endpoint
420 */
421static inline u8 _usb_addr(struct ci_hw_ep *ep)
422{
423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424}
425
426static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
427 struct ci_hw_req *hwreq)
428{
429 unsigned int rest = hwreq->req.length;
430 int pages = TD_PAGE_COUNT;
431 int ret = 0;
432
433 if (rest == 0) {
434 ret = add_td_to_list(hwep, hwreq, length: 0, NULL);
435 if (ret < 0)
436 return ret;
437 }
438
439 /*
440 * The first buffer could be not page aligned.
441 * In that case we have to span into one extra td.
442 */
443 if (hwreq->req.dma % PAGE_SIZE)
444 pages--;
445
446 while (rest > 0) {
447 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
448 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
449
450 ret = add_td_to_list(hwep, hwreq, length: count, NULL);
451 if (ret < 0)
452 return ret;
453
454 rest -= count;
455 }
456
457 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
458 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
459 ret = add_td_to_list(hwep, hwreq, length: 0, NULL);
460 if (ret < 0)
461 return ret;
462 }
463
464 return ret;
465}
466
467static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
468 struct scatterlist *s)
469{
470 unsigned int rest = sg_dma_len(s);
471 int ret = 0;
472
473 hwreq->req.actual = 0;
474 while (rest > 0) {
475 unsigned int count = min_t(unsigned int, rest,
476 CI_MAX_BUF_SIZE);
477
478 ret = add_td_to_list(hwep, hwreq, length: count, s);
479 if (ret < 0)
480 return ret;
481
482 rest -= count;
483 }
484
485 return ret;
486}
487
488static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
489{
490 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
491 / CI_HDRC_PAGE_SIZE;
492 int i;
493 u32 token;
494
495 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
496 node->ptr->token = cpu_to_le32(token);
497
498 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
499 u32 page = (u32) sg_dma_address(s) +
500 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
501
502 page &= ~TD_RESERVED_MASK;
503 node->ptr->page[i] = cpu_to_le32(page);
504 }
505}
506
507static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
508{
509 struct usb_request *req = &hwreq->req;
510 struct scatterlist *s = req->sg;
511 int ret = 0, i = 0;
512 struct td_node *node = NULL;
513
514 if (!s || req->zero || req->length == 0) {
515 dev_err(hwep->ci->dev, "not supported operation for sg\n");
516 return -EINVAL;
517 }
518
519 while (i++ < req->num_mapped_sgs) {
520 if (sg_dma_address(s) % PAGE_SIZE) {
521 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
522 return -EINVAL;
523 }
524
525 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
526 ci_add_buffer_entry(node, s);
527 node->td_remaining_size -= sg_dma_len(s);
528 } else {
529 ret = prepare_td_per_sg(hwep, hwreq, s);
530 if (ret)
531 return ret;
532
533 node = list_entry(hwreq->tds.prev,
534 struct td_node, td);
535 }
536
537 s = sg_next(s);
538 }
539
540 return ret;
541}
542
543/**
544 * _hardware_enqueue: configures a request at hardware level
545 * @hwep: endpoint
546 * @hwreq: request
547 *
548 * This function returns an error code
549 */
550static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551{
552 struct ci_hdrc *ci = hwep->ci;
553 int ret = 0;
554 struct td_node *firstnode, *lastnode;
555
556 /* don't queue twice */
557 if (hwreq->req.status == -EALREADY)
558 return -EALREADY;
559
560 hwreq->req.status = -EALREADY;
561
562 ret = usb_gadget_map_request_by_dev(dev: ci->dev->parent,
563 req: &hwreq->req, is_in: hwep->dir);
564 if (ret)
565 return ret;
566
567 if (hwreq->req.num_mapped_sgs)
568 ret = prepare_td_for_sg(hwep, hwreq);
569 else
570 ret = prepare_td_for_non_sg(hwep, hwreq);
571
572 if (ret)
573 return ret;
574
575 lastnode = list_entry(hwreq->tds.prev,
576 struct td_node, td);
577
578 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
579 if (!hwreq->req.no_interrupt)
580 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
581
582 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
583 trace_ci_prepare_td(hwep, hwreq, td: firstnode);
584
585 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
586
587 wmb();
588
589 hwreq->req.actual = 0;
590 if (!list_empty(head: &hwep->qh.queue)) {
591 struct ci_hw_req *hwreqprev;
592 int n = hw_ep_bit(num: hwep->num, dir: hwep->dir);
593 int tmp_stat;
594 struct td_node *prevlastnode;
595 u32 next = firstnode->dma & TD_ADDR_MASK;
596
597 hwreqprev = list_entry(hwep->qh.queue.prev,
598 struct ci_hw_req, queue);
599 prevlastnode = list_entry(hwreqprev->tds.prev,
600 struct td_node, td);
601
602 prevlastnode->ptr->next = cpu_to_le32(next);
603 wmb();
604
605 if (ci->rev == CI_REVISION_22) {
606 if (!hw_read(ci, reg: OP_ENDPTSTAT, BIT(n)))
607 reprime_dtd(ci, hwep, node: prevlastnode);
608 }
609
610 if (hw_read(ci, reg: OP_ENDPTPRIME, BIT(n)))
611 goto done;
612 do {
613 hw_write(ci, reg: OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
614 tmp_stat = hw_read(ci, reg: OP_ENDPTSTAT, BIT(n));
615 } while (!hw_read(ci, reg: OP_USBCMD, USBCMD_ATDTW));
616 hw_write(ci, reg: OP_USBCMD, USBCMD_ATDTW, data: 0);
617 if (tmp_stat)
618 goto done;
619 }
620
621 /* QH configuration */
622 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
623 hwep->qh.ptr->td.token &=
624 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
625
626 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
627 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
628
629 if (hwreq->req.length == 0
630 || hwreq->req.length % hwep->ep.maxpacket)
631 mul++;
632 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
633 }
634
635 ret = hw_ep_prime(ci, num: hwep->num, dir: hwep->dir,
636 is_ctrl: hwep->type == USB_ENDPOINT_XFER_CONTROL);
637done:
638 return ret;
639}
640
641/**
642 * free_pending_td: remove a pending request for the endpoint
643 * @hwep: endpoint
644 */
645static void free_pending_td(struct ci_hw_ep *hwep)
646{
647 struct td_node *pending = hwep->pending_td;
648
649 dma_pool_free(pool: hwep->td_pool, vaddr: pending->ptr, addr: pending->dma);
650 hwep->pending_td = NULL;
651 kfree(objp: pending);
652}
653
654static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
655 struct td_node *node)
656{
657 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
658 hwep->qh.ptr->td.token &=
659 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
660
661 return hw_ep_prime(ci, num: hwep->num, dir: hwep->dir,
662 is_ctrl: hwep->type == USB_ENDPOINT_XFER_CONTROL);
663}
664
665/**
666 * _hardware_dequeue: handles a request at hardware level
667 * @hwep: endpoint
668 * @hwreq: request
669 *
670 * This function returns an error code
671 */
672static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
673{
674 u32 tmptoken;
675 struct td_node *node, *tmpnode;
676 unsigned remaining_length;
677 unsigned actual = hwreq->req.length;
678 struct ci_hdrc *ci = hwep->ci;
679
680 if (hwreq->req.status != -EALREADY)
681 return -EINVAL;
682
683 hwreq->req.status = 0;
684
685 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
686 tmptoken = le32_to_cpu(node->ptr->token);
687 trace_ci_complete_td(hwep, hwreq, td: node);
688 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
689 int n = hw_ep_bit(num: hwep->num, dir: hwep->dir);
690
691 if (ci->rev == CI_REVISION_24)
692 if (!hw_read(ci, reg: OP_ENDPTSTAT, BIT(n)))
693 reprime_dtd(ci, hwep, node);
694 hwreq->req.status = -EALREADY;
695 return -EBUSY;
696 }
697
698 remaining_length = (tmptoken & TD_TOTAL_BYTES);
699 remaining_length >>= __ffs(TD_TOTAL_BYTES);
700 actual -= remaining_length;
701
702 hwreq->req.status = tmptoken & TD_STATUS;
703 if ((TD_STATUS_HALTED & hwreq->req.status)) {
704 hwreq->req.status = -EPIPE;
705 break;
706 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
707 hwreq->req.status = -EPROTO;
708 break;
709 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
710 hwreq->req.status = -EILSEQ;
711 break;
712 }
713
714 if (remaining_length) {
715 if (hwep->dir == TX) {
716 hwreq->req.status = -EPROTO;
717 break;
718 }
719 }
720 /*
721 * As the hardware could still address the freed td
722 * which will run the udc unusable, the cleanup of the
723 * td has to be delayed by one.
724 */
725 if (hwep->pending_td)
726 free_pending_td(hwep);
727
728 hwep->pending_td = node;
729 list_del_init(entry: &node->td);
730 }
731
732 usb_gadget_unmap_request_by_dev(dev: hwep->ci->dev->parent,
733 req: &hwreq->req, is_in: hwep->dir);
734
735 hwreq->req.actual += actual;
736
737 if (hwreq->req.status)
738 return hwreq->req.status;
739
740 return hwreq->req.actual;
741}
742
743/**
744 * _ep_nuke: dequeues all endpoint requests
745 * @hwep: endpoint
746 *
747 * This function returns an error code
748 * Caller must hold lock
749 */
750static int _ep_nuke(struct ci_hw_ep *hwep)
751__releases(hwep->lock)
752__acquires(hwep->lock)
753{
754 struct td_node *node, *tmpnode;
755 if (hwep == NULL)
756 return -EINVAL;
757
758 hw_ep_flush(ci: hwep->ci, num: hwep->num, dir: hwep->dir);
759
760 while (!list_empty(head: &hwep->qh.queue)) {
761
762 /* pop oldest request */
763 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
764 struct ci_hw_req, queue);
765
766 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
767 dma_pool_free(pool: hwep->td_pool, vaddr: node->ptr, addr: node->dma);
768 list_del_init(entry: &node->td);
769 node->ptr = NULL;
770 kfree(objp: node);
771 }
772
773 list_del_init(entry: &hwreq->queue);
774 hwreq->req.status = -ESHUTDOWN;
775
776 if (hwreq->req.complete != NULL) {
777 spin_unlock(lock: hwep->lock);
778 usb_gadget_giveback_request(ep: &hwep->ep, req: &hwreq->req);
779 spin_lock(lock: hwep->lock);
780 }
781 }
782
783 if (hwep->pending_td)
784 free_pending_td(hwep);
785
786 return 0;
787}
788
789static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
790{
791 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
792 int direction, retval = 0;
793 unsigned long flags;
794
795 if (ep == NULL || hwep->ep.desc == NULL)
796 return -EINVAL;
797
798 if (usb_endpoint_xfer_isoc(epd: hwep->ep.desc))
799 return -EOPNOTSUPP;
800
801 spin_lock_irqsave(hwep->lock, flags);
802
803 if (value && hwep->dir == TX && check_transfer &&
804 !list_empty(head: &hwep->qh.queue) &&
805 !usb_endpoint_xfer_control(epd: hwep->ep.desc)) {
806 spin_unlock_irqrestore(lock: hwep->lock, flags);
807 return -EAGAIN;
808 }
809
810 direction = hwep->dir;
811 do {
812 retval |= hw_ep_set_halt(ci: hwep->ci, num: hwep->num, dir: hwep->dir, value);
813
814 if (!value)
815 hwep->wedge = 0;
816
817 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
818 hwep->dir = (hwep->dir == TX) ? RX : TX;
819
820 } while (hwep->dir != direction);
821
822 spin_unlock_irqrestore(lock: hwep->lock, flags);
823 return retval;
824}
825
826
827/**
828 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
829 * @gadget: gadget
830 *
831 * This function returns an error code
832 */
833static int _gadget_stop_activity(struct usb_gadget *gadget)
834{
835 struct usb_ep *ep;
836 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
837 unsigned long flags;
838
839 /* flush all endpoints */
840 gadget_for_each_ep(ep, gadget) {
841 usb_ep_fifo_flush(ep);
842 }
843 usb_ep_fifo_flush(ep: &ci->ep0out->ep);
844 usb_ep_fifo_flush(ep: &ci->ep0in->ep);
845
846 /* make sure to disable all endpoints */
847 gadget_for_each_ep(ep, gadget) {
848 usb_ep_disable(ep);
849 }
850
851 if (ci->status != NULL) {
852 usb_ep_free_request(ep: &ci->ep0in->ep, req: ci->status);
853 ci->status = NULL;
854 }
855
856 spin_lock_irqsave(&ci->lock, flags);
857 ci->gadget.speed = USB_SPEED_UNKNOWN;
858 ci->remote_wakeup = 0;
859 ci->suspended = 0;
860 spin_unlock_irqrestore(lock: &ci->lock, flags);
861
862 return 0;
863}
864
865/******************************************************************************
866 * ISR block
867 *****************************************************************************/
868/**
869 * isr_reset_handler: USB reset interrupt handler
870 * @ci: UDC device
871 *
872 * This function resets USB engine after a bus reset occurred
873 */
874static void isr_reset_handler(struct ci_hdrc *ci)
875__releases(ci->lock)
876__acquires(ci->lock)
877{
878 int retval;
879
880 spin_unlock(lock: &ci->lock);
881 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
882 usb_gadget_udc_reset(gadget: &ci->gadget, driver: ci->driver);
883
884 retval = _gadget_stop_activity(gadget: &ci->gadget);
885 if (retval)
886 goto done;
887
888 retval = hw_usb_reset(ci);
889 if (retval)
890 goto done;
891
892 ci->status = usb_ep_alloc_request(ep: &ci->ep0in->ep, GFP_ATOMIC);
893 if (ci->status == NULL)
894 retval = -ENOMEM;
895
896done:
897 spin_lock(lock: &ci->lock);
898
899 if (retval)
900 dev_err(ci->dev, "error: %i\n", retval);
901}
902
903/**
904 * isr_get_status_complete: get_status request complete function
905 * @ep: endpoint
906 * @req: request handled
907 *
908 * Caller must release lock
909 */
910static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
911{
912 if (ep == NULL || req == NULL)
913 return;
914
915 kfree(objp: req->buf);
916 usb_ep_free_request(ep, req);
917}
918
919/**
920 * _ep_queue: queues (submits) an I/O request to an endpoint
921 * @ep: endpoint
922 * @req: request
923 * @gfp_flags: GFP flags (not used)
924 *
925 * Caller must hold lock
926 * This function returns an error code
927 */
928static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
929 gfp_t __maybe_unused gfp_flags)
930{
931 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
932 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
933 struct ci_hdrc *ci = hwep->ci;
934 int retval = 0;
935
936 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
937 return -EINVAL;
938
939 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
940 if (req->length)
941 hwep = (ci->ep0_dir == RX) ?
942 ci->ep0out : ci->ep0in;
943 if (!list_empty(head: &hwep->qh.queue)) {
944 _ep_nuke(hwep);
945 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
946 _usb_addr(hwep));
947 }
948 }
949
950 if (usb_endpoint_xfer_isoc(epd: hwep->ep.desc) &&
951 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
952 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
953 return -EMSGSIZE;
954 }
955
956 /* first nuke then test link, e.g. previous status has not sent */
957 if (!list_empty(head: &hwreq->queue)) {
958 dev_err(hwep->ci->dev, "request already in queue\n");
959 return -EBUSY;
960 }
961
962 /* push request */
963 hwreq->req.status = -EINPROGRESS;
964 hwreq->req.actual = 0;
965
966 retval = _hardware_enqueue(hwep, hwreq);
967
968 if (retval == -EALREADY)
969 retval = 0;
970 if (!retval)
971 list_add_tail(new: &hwreq->queue, head: &hwep->qh.queue);
972
973 return retval;
974}
975
976/**
977 * isr_get_status_response: get_status request response
978 * @ci: ci struct
979 * @setup: setup request packet
980 *
981 * This function returns an error code
982 */
983static int isr_get_status_response(struct ci_hdrc *ci,
984 struct usb_ctrlrequest *setup)
985__releases(hwep->lock)
986__acquires(hwep->lock)
987{
988 struct ci_hw_ep *hwep = ci->ep0in;
989 struct usb_request *req = NULL;
990 gfp_t gfp_flags = GFP_ATOMIC;
991 int dir, num, retval;
992
993 if (hwep == NULL || setup == NULL)
994 return -EINVAL;
995
996 spin_unlock(lock: hwep->lock);
997 req = usb_ep_alloc_request(ep: &hwep->ep, gfp_flags);
998 spin_lock(lock: hwep->lock);
999 if (req == NULL)
1000 return -ENOMEM;
1001
1002 req->complete = isr_get_status_complete;
1003 req->length = 2;
1004 req->buf = kzalloc(size: req->length, flags: gfp_flags);
1005 if (req->buf == NULL) {
1006 retval = -ENOMEM;
1007 goto err_free_req;
1008 }
1009
1010 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1011 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1012 ci->gadget.is_selfpowered;
1013 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1014 == USB_RECIP_ENDPOINT) {
1015 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1016 TX : RX;
1017 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1018 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1019 }
1020 /* else do nothing; reserved for future use */
1021
1022 retval = _ep_queue(ep: &hwep->ep, req, gfp_flags);
1023 if (retval)
1024 goto err_free_buf;
1025
1026 return 0;
1027
1028 err_free_buf:
1029 kfree(objp: req->buf);
1030 err_free_req:
1031 spin_unlock(lock: hwep->lock);
1032 usb_ep_free_request(ep: &hwep->ep, req);
1033 spin_lock(lock: hwep->lock);
1034 return retval;
1035}
1036
1037/**
1038 * isr_setup_status_complete: setup_status request complete function
1039 * @ep: endpoint
1040 * @req: request handled
1041 *
1042 * Caller must release lock. Put the port in test mode if test mode
1043 * feature is selected.
1044 */
1045static void
1046isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1047{
1048 struct ci_hdrc *ci = req->context;
1049 unsigned long flags;
1050
1051 if (req->status < 0)
1052 return;
1053
1054 if (ci->setaddr) {
1055 hw_usb_set_address(ci, value: ci->address);
1056 ci->setaddr = false;
1057 if (ci->address)
1058 usb_gadget_set_state(gadget: &ci->gadget, state: USB_STATE_ADDRESS);
1059 }
1060
1061 spin_lock_irqsave(&ci->lock, flags);
1062 if (ci->test_mode)
1063 hw_port_test_set(ci, mode: ci->test_mode);
1064 spin_unlock_irqrestore(lock: &ci->lock, flags);
1065}
1066
1067/**
1068 * isr_setup_status_phase: queues the status phase of a setup transation
1069 * @ci: ci struct
1070 *
1071 * This function returns an error code
1072 */
1073static int isr_setup_status_phase(struct ci_hdrc *ci)
1074{
1075 struct ci_hw_ep *hwep;
1076
1077 /*
1078 * Unexpected USB controller behavior, caused by bad signal integrity
1079 * or ground reference problems, can lead to isr_setup_status_phase
1080 * being called with ci->status equal to NULL.
1081 * If this situation occurs, you should review your USB hardware design.
1082 */
1083 if (WARN_ON_ONCE(!ci->status))
1084 return -EPIPE;
1085
1086 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1087 ci->status->context = ci;
1088 ci->status->complete = isr_setup_status_complete;
1089
1090 return _ep_queue(ep: &hwep->ep, req: ci->status, GFP_ATOMIC);
1091}
1092
1093/**
1094 * isr_tr_complete_low: transaction complete low level handler
1095 * @hwep: endpoint
1096 *
1097 * This function returns an error code
1098 * Caller must hold lock
1099 */
1100static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1101__releases(hwep->lock)
1102__acquires(hwep->lock)
1103{
1104 struct ci_hw_req *hwreq, *hwreqtemp;
1105 struct ci_hw_ep *hweptemp = hwep;
1106 int retval = 0;
1107
1108 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1109 queue) {
1110 retval = _hardware_dequeue(hwep, hwreq);
1111 if (retval < 0)
1112 break;
1113 list_del_init(entry: &hwreq->queue);
1114 if (hwreq->req.complete != NULL) {
1115 spin_unlock(lock: hwep->lock);
1116 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1117 hwreq->req.length)
1118 hweptemp = hwep->ci->ep0in;
1119 usb_gadget_giveback_request(ep: &hweptemp->ep, req: &hwreq->req);
1120 spin_lock(lock: hwep->lock);
1121 }
1122 }
1123
1124 if (retval == -EBUSY)
1125 retval = 0;
1126
1127 return retval;
1128}
1129
1130static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1131{
1132 dev_warn(&ci->gadget.dev,
1133 "connect the device to an alternate port if you want HNP\n");
1134 return isr_setup_status_phase(ci);
1135}
1136
1137/**
1138 * isr_setup_packet_handler: setup packet handler
1139 * @ci: UDC descriptor
1140 *
1141 * This function handles setup packet
1142 */
1143static void isr_setup_packet_handler(struct ci_hdrc *ci)
1144__releases(ci->lock)
1145__acquires(ci->lock)
1146{
1147 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1148 struct usb_ctrlrequest req;
1149 int type, num, dir, err = -EINVAL;
1150 u8 tmode = 0;
1151
1152 /*
1153 * Flush data and handshake transactions of previous
1154 * setup packet.
1155 */
1156 _ep_nuke(hwep: ci->ep0out);
1157 _ep_nuke(hwep: ci->ep0in);
1158
1159 /* read_setup_packet */
1160 do {
1161 hw_test_and_set_setup_guard(ci);
1162 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1163 } while (!hw_test_and_clear_setup_guard(ci));
1164
1165 type = req.bRequestType;
1166
1167 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1168
1169 switch (req.bRequest) {
1170 case USB_REQ_CLEAR_FEATURE:
1171 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1172 le16_to_cpu(req.wValue) ==
1173 USB_ENDPOINT_HALT) {
1174 if (req.wLength != 0)
1175 break;
1176 num = le16_to_cpu(req.wIndex);
1177 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1178 num &= USB_ENDPOINT_NUMBER_MASK;
1179 if (dir == TX)
1180 num += ci->hw_ep_max / 2;
1181 if (!ci->ci_hw_ep[num].wedge) {
1182 spin_unlock(lock: &ci->lock);
1183 err = usb_ep_clear_halt(
1184 ep: &ci->ci_hw_ep[num].ep);
1185 spin_lock(lock: &ci->lock);
1186 if (err)
1187 break;
1188 }
1189 err = isr_setup_status_phase(ci);
1190 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1191 le16_to_cpu(req.wValue) ==
1192 USB_DEVICE_REMOTE_WAKEUP) {
1193 if (req.wLength != 0)
1194 break;
1195 ci->remote_wakeup = 0;
1196 err = isr_setup_status_phase(ci);
1197 } else {
1198 goto delegate;
1199 }
1200 break;
1201 case USB_REQ_GET_STATUS:
1202 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1203 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1204 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1205 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1206 goto delegate;
1207 if (le16_to_cpu(req.wLength) != 2 ||
1208 le16_to_cpu(req.wValue) != 0)
1209 break;
1210 err = isr_get_status_response(ci, setup: &req);
1211 break;
1212 case USB_REQ_SET_ADDRESS:
1213 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1214 goto delegate;
1215 if (le16_to_cpu(req.wLength) != 0 ||
1216 le16_to_cpu(req.wIndex) != 0)
1217 break;
1218 ci->address = (u8)le16_to_cpu(req.wValue);
1219 ci->setaddr = true;
1220 err = isr_setup_status_phase(ci);
1221 break;
1222 case USB_REQ_SET_FEATURE:
1223 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1224 le16_to_cpu(req.wValue) ==
1225 USB_ENDPOINT_HALT) {
1226 if (req.wLength != 0)
1227 break;
1228 num = le16_to_cpu(req.wIndex);
1229 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1230 num &= USB_ENDPOINT_NUMBER_MASK;
1231 if (dir == TX)
1232 num += ci->hw_ep_max / 2;
1233
1234 spin_unlock(lock: &ci->lock);
1235 err = _ep_set_halt(ep: &ci->ci_hw_ep[num].ep, value: 1, check_transfer: false);
1236 spin_lock(lock: &ci->lock);
1237 if (!err)
1238 isr_setup_status_phase(ci);
1239 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1240 if (req.wLength != 0)
1241 break;
1242 switch (le16_to_cpu(req.wValue)) {
1243 case USB_DEVICE_REMOTE_WAKEUP:
1244 ci->remote_wakeup = 1;
1245 err = isr_setup_status_phase(ci);
1246 break;
1247 case USB_DEVICE_TEST_MODE:
1248 tmode = le16_to_cpu(req.wIndex) >> 8;
1249 switch (tmode) {
1250 case USB_TEST_J:
1251 case USB_TEST_K:
1252 case USB_TEST_SE0_NAK:
1253 case USB_TEST_PACKET:
1254 case USB_TEST_FORCE_ENABLE:
1255 ci->test_mode = tmode;
1256 err = isr_setup_status_phase(
1257 ci);
1258 break;
1259 default:
1260 break;
1261 }
1262 break;
1263 case USB_DEVICE_B_HNP_ENABLE:
1264 if (ci_otg_is_fsm_mode(ci)) {
1265 ci->gadget.b_hnp_enable = 1;
1266 err = isr_setup_status_phase(
1267 ci);
1268 }
1269 break;
1270 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1271 if (ci_otg_is_fsm_mode(ci))
1272 err = otg_a_alt_hnp_support(ci);
1273 break;
1274 case USB_DEVICE_A_HNP_SUPPORT:
1275 if (ci_otg_is_fsm_mode(ci)) {
1276 ci->gadget.a_hnp_support = 1;
1277 err = isr_setup_status_phase(
1278 ci);
1279 }
1280 break;
1281 default:
1282 goto delegate;
1283 }
1284 } else {
1285 goto delegate;
1286 }
1287 break;
1288 default:
1289delegate:
1290 if (req.wLength == 0) /* no data phase */
1291 ci->ep0_dir = TX;
1292
1293 spin_unlock(lock: &ci->lock);
1294 err = ci->driver->setup(&ci->gadget, &req);
1295 spin_lock(lock: &ci->lock);
1296 break;
1297 }
1298
1299 if (err < 0) {
1300 spin_unlock(lock: &ci->lock);
1301 if (_ep_set_halt(ep: &hwep->ep, value: 1, check_transfer: false))
1302 dev_err(ci->dev, "error: _ep_set_halt\n");
1303 spin_lock(lock: &ci->lock);
1304 }
1305}
1306
1307/**
1308 * isr_tr_complete_handler: transaction complete interrupt handler
1309 * @ci: UDC descriptor
1310 *
1311 * This function handles traffic events
1312 */
1313static void isr_tr_complete_handler(struct ci_hdrc *ci)
1314__releases(ci->lock)
1315__acquires(ci->lock)
1316{
1317 unsigned i;
1318 int err;
1319
1320 for (i = 0; i < ci->hw_ep_max; i++) {
1321 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1322
1323 if (hwep->ep.desc == NULL)
1324 continue; /* not configured */
1325
1326 if (hw_test_and_clear_complete(ci, n: i)) {
1327 err = isr_tr_complete_low(hwep);
1328 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1329 if (err > 0) /* needs status phase */
1330 err = isr_setup_status_phase(ci);
1331 if (err < 0) {
1332 spin_unlock(lock: &ci->lock);
1333 if (_ep_set_halt(ep: &hwep->ep, value: 1, check_transfer: false))
1334 dev_err(ci->dev,
1335 "error: _ep_set_halt\n");
1336 spin_lock(lock: &ci->lock);
1337 }
1338 }
1339 }
1340
1341 /* Only handle setup packet below */
1342 if (i == 0 &&
1343 hw_test_and_clear(ci, reg: OP_ENDPTSETUPSTAT, BIT(0)))
1344 isr_setup_packet_handler(ci);
1345 }
1346}
1347
1348/******************************************************************************
1349 * ENDPT block
1350 *****************************************************************************/
1351/*
1352 * ep_enable: configure endpoint, making it usable
1353 *
1354 * Check usb_ep_enable() at "usb_gadget.h" for details
1355 */
1356static int ep_enable(struct usb_ep *ep,
1357 const struct usb_endpoint_descriptor *desc)
1358{
1359 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1360 int retval = 0;
1361 unsigned long flags;
1362 u32 cap = 0;
1363
1364 if (ep == NULL || desc == NULL)
1365 return -EINVAL;
1366
1367 spin_lock_irqsave(hwep->lock, flags);
1368
1369 /* only internal SW should enable ctrl endpts */
1370
1371 if (!list_empty(head: &hwep->qh.queue)) {
1372 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1373 spin_unlock_irqrestore(lock: hwep->lock, flags);
1374 return -EBUSY;
1375 }
1376
1377 hwep->ep.desc = desc;
1378
1379 hwep->dir = usb_endpoint_dir_in(epd: desc) ? TX : RX;
1380 hwep->num = usb_endpoint_num(epd: desc);
1381 hwep->type = usb_endpoint_type(epd: desc);
1382
1383 hwep->ep.maxpacket = usb_endpoint_maxp(epd: desc);
1384 hwep->ep.mult = usb_endpoint_maxp_mult(epd: desc);
1385
1386 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1387 cap |= QH_IOS;
1388
1389 cap |= QH_ZLT;
1390 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1391 /*
1392 * For ISO-TX, we set mult at QH as the largest value, and use
1393 * MultO at TD as real mult value.
1394 */
1395 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1396 cap |= 3 << __ffs(QH_MULT);
1397
1398 hwep->qh.ptr->cap = cpu_to_le32(cap);
1399
1400 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1401
1402 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1403 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1404 retval = -EINVAL;
1405 }
1406
1407 /*
1408 * Enable endpoints in the HW other than ep0 as ep0
1409 * is always enabled
1410 */
1411 if (hwep->num)
1412 retval |= hw_ep_enable(ci: hwep->ci, num: hwep->num, dir: hwep->dir,
1413 type: hwep->type);
1414
1415 spin_unlock_irqrestore(lock: hwep->lock, flags);
1416 return retval;
1417}
1418
1419/*
1420 * ep_disable: endpoint is no longer usable
1421 *
1422 * Check usb_ep_disable() at "usb_gadget.h" for details
1423 */
1424static int ep_disable(struct usb_ep *ep)
1425{
1426 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1427 int direction, retval = 0;
1428 unsigned long flags;
1429
1430 if (ep == NULL)
1431 return -EINVAL;
1432 else if (hwep->ep.desc == NULL)
1433 return -EBUSY;
1434
1435 spin_lock_irqsave(hwep->lock, flags);
1436 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1437 spin_unlock_irqrestore(lock: hwep->lock, flags);
1438 return 0;
1439 }
1440
1441 /* only internal SW should disable ctrl endpts */
1442
1443 direction = hwep->dir;
1444 do {
1445 retval |= _ep_nuke(hwep);
1446 retval |= hw_ep_disable(ci: hwep->ci, num: hwep->num, dir: hwep->dir);
1447
1448 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1449 hwep->dir = (hwep->dir == TX) ? RX : TX;
1450
1451 } while (hwep->dir != direction);
1452
1453 hwep->ep.desc = NULL;
1454
1455 spin_unlock_irqrestore(lock: hwep->lock, flags);
1456 return retval;
1457}
1458
1459/*
1460 * ep_alloc_request: allocate a request object to use with this endpoint
1461 *
1462 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1463 */
1464static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1465{
1466 struct ci_hw_req *hwreq;
1467
1468 if (ep == NULL)
1469 return NULL;
1470
1471 hwreq = kzalloc(size: sizeof(struct ci_hw_req), flags: gfp_flags);
1472 if (hwreq != NULL) {
1473 INIT_LIST_HEAD(list: &hwreq->queue);
1474 INIT_LIST_HEAD(list: &hwreq->tds);
1475 }
1476
1477 return (hwreq == NULL) ? NULL : &hwreq->req;
1478}
1479
1480/*
1481 * ep_free_request: frees a request object
1482 *
1483 * Check usb_ep_free_request() at "usb_gadget.h" for details
1484 */
1485static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1486{
1487 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1488 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1489 struct td_node *node, *tmpnode;
1490 unsigned long flags;
1491
1492 if (ep == NULL || req == NULL) {
1493 return;
1494 } else if (!list_empty(head: &hwreq->queue)) {
1495 dev_err(hwep->ci->dev, "freeing queued request\n");
1496 return;
1497 }
1498
1499 spin_lock_irqsave(hwep->lock, flags);
1500
1501 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1502 dma_pool_free(pool: hwep->td_pool, vaddr: node->ptr, addr: node->dma);
1503 list_del_init(entry: &node->td);
1504 node->ptr = NULL;
1505 kfree(objp: node);
1506 }
1507
1508 kfree(objp: hwreq);
1509
1510 spin_unlock_irqrestore(lock: hwep->lock, flags);
1511}
1512
1513/*
1514 * ep_queue: queues (submits) an I/O request to an endpoint
1515 *
1516 * Check usb_ep_queue()* at usb_gadget.h" for details
1517 */
1518static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1519 gfp_t __maybe_unused gfp_flags)
1520{
1521 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1522 int retval = 0;
1523 unsigned long flags;
1524
1525 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1526 return -EINVAL;
1527
1528 spin_lock_irqsave(hwep->lock, flags);
1529 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1530 spin_unlock_irqrestore(lock: hwep->lock, flags);
1531 return 0;
1532 }
1533 retval = _ep_queue(ep, req, gfp_flags);
1534 spin_unlock_irqrestore(lock: hwep->lock, flags);
1535 return retval;
1536}
1537
1538/*
1539 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1540 *
1541 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1542 */
1543static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1544{
1545 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1546 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1547 unsigned long flags;
1548 struct td_node *node, *tmpnode;
1549
1550 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1551 hwep->ep.desc == NULL || list_empty(head: &hwreq->queue) ||
1552 list_empty(head: &hwep->qh.queue))
1553 return -EINVAL;
1554
1555 spin_lock_irqsave(hwep->lock, flags);
1556 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1557 hw_ep_flush(ci: hwep->ci, num: hwep->num, dir: hwep->dir);
1558
1559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1560 dma_pool_free(pool: hwep->td_pool, vaddr: node->ptr, addr: node->dma);
1561 list_del(entry: &node->td);
1562 kfree(objp: node);
1563 }
1564
1565 /* pop request */
1566 list_del_init(entry: &hwreq->queue);
1567
1568 usb_gadget_unmap_request(gadget: &hwep->ci->gadget, req, is_in: hwep->dir);
1569
1570 req->status = -ECONNRESET;
1571
1572 if (hwreq->req.complete != NULL) {
1573 spin_unlock(lock: hwep->lock);
1574 usb_gadget_giveback_request(ep: &hwep->ep, req: &hwreq->req);
1575 spin_lock(lock: hwep->lock);
1576 }
1577
1578 spin_unlock_irqrestore(lock: hwep->lock, flags);
1579 return 0;
1580}
1581
1582/*
1583 * ep_set_halt: sets the endpoint halt feature
1584 *
1585 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1586 */
1587static int ep_set_halt(struct usb_ep *ep, int value)
1588{
1589 return _ep_set_halt(ep, value, check_transfer: true);
1590}
1591
1592/*
1593 * ep_set_wedge: sets the halt feature and ignores clear requests
1594 *
1595 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1596 */
1597static int ep_set_wedge(struct usb_ep *ep)
1598{
1599 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1600 unsigned long flags;
1601
1602 if (ep == NULL || hwep->ep.desc == NULL)
1603 return -EINVAL;
1604
1605 spin_lock_irqsave(hwep->lock, flags);
1606 hwep->wedge = 1;
1607 spin_unlock_irqrestore(lock: hwep->lock, flags);
1608
1609 return usb_ep_set_halt(ep);
1610}
1611
1612/*
1613 * ep_fifo_flush: flushes contents of a fifo
1614 *
1615 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1616 */
1617static void ep_fifo_flush(struct usb_ep *ep)
1618{
1619 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1620 unsigned long flags;
1621
1622 if (ep == NULL) {
1623 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1624 return;
1625 }
1626
1627 spin_lock_irqsave(hwep->lock, flags);
1628 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1629 spin_unlock_irqrestore(lock: hwep->lock, flags);
1630 return;
1631 }
1632
1633 hw_ep_flush(ci: hwep->ci, num: hwep->num, dir: hwep->dir);
1634
1635 spin_unlock_irqrestore(lock: hwep->lock, flags);
1636}
1637
1638/*
1639 * Endpoint-specific part of the API to the USB controller hardware
1640 * Check "usb_gadget.h" for details
1641 */
1642static const struct usb_ep_ops usb_ep_ops = {
1643 .enable = ep_enable,
1644 .disable = ep_disable,
1645 .alloc_request = ep_alloc_request,
1646 .free_request = ep_free_request,
1647 .queue = ep_queue,
1648 .dequeue = ep_dequeue,
1649 .set_halt = ep_set_halt,
1650 .set_wedge = ep_set_wedge,
1651 .fifo_flush = ep_fifo_flush,
1652};
1653
1654/******************************************************************************
1655 * GADGET block
1656 *****************************************************************************/
1657
1658static int ci_udc_get_frame(struct usb_gadget *_gadget)
1659{
1660 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1661 unsigned long flags;
1662 int ret;
1663
1664 spin_lock_irqsave(&ci->lock, flags);
1665 ret = hw_read(ci, reg: OP_FRINDEX, mask: 0x3fff);
1666 spin_unlock_irqrestore(lock: &ci->lock, flags);
1667 return ret >> 3;
1668}
1669
1670/*
1671 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1672 */
1673static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1674{
1675 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1676
1677 if (is_active) {
1678 pm_runtime_get_sync(dev: ci->dev);
1679 hw_device_reset(ci);
1680 spin_lock_irq(lock: &ci->lock);
1681 if (ci->driver) {
1682 hw_device_state(ci, dma: ci->ep0out->qh.dma);
1683 usb_gadget_set_state(gadget: _gadget, state: USB_STATE_POWERED);
1684 spin_unlock_irq(lock: &ci->lock);
1685 usb_udc_vbus_handler(gadget: _gadget, status: true);
1686 } else {
1687 spin_unlock_irq(lock: &ci->lock);
1688 }
1689 } else {
1690 usb_udc_vbus_handler(gadget: _gadget, status: false);
1691 if (ci->driver)
1692 ci->driver->disconnect(&ci->gadget);
1693 hw_device_state(ci, dma: 0);
1694 if (ci->platdata->notify_event)
1695 ci->platdata->notify_event(ci,
1696 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1697 _gadget_stop_activity(gadget: &ci->gadget);
1698 pm_runtime_put_sync(dev: ci->dev);
1699 usb_gadget_set_state(gadget: _gadget, state: USB_STATE_NOTATTACHED);
1700 }
1701}
1702
1703static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1704{
1705 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1706 unsigned long flags;
1707 int ret = 0;
1708
1709 spin_lock_irqsave(&ci->lock, flags);
1710 ci->vbus_active = is_active;
1711 spin_unlock_irqrestore(lock: &ci->lock, flags);
1712
1713 if (ci->usb_phy)
1714 usb_phy_set_charger_state(usb_phy: ci->usb_phy, state: is_active ?
1715 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1716
1717 if (ci->platdata->notify_event)
1718 ret = ci->platdata->notify_event(ci,
1719 CI_HDRC_CONTROLLER_VBUS_EVENT);
1720
1721 if (ci->usb_phy) {
1722 if (is_active)
1723 usb_phy_set_event(x: ci->usb_phy, event: USB_EVENT_VBUS);
1724 else
1725 usb_phy_set_event(x: ci->usb_phy, event: USB_EVENT_NONE);
1726 }
1727
1728 if (ci->driver)
1729 ci_hdrc_gadget_connect(_gadget, is_active);
1730
1731 return ret;
1732}
1733
1734static int ci_udc_wakeup(struct usb_gadget *_gadget)
1735{
1736 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1737 unsigned long flags;
1738 int ret = 0;
1739
1740 spin_lock_irqsave(&ci->lock, flags);
1741 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1742 spin_unlock_irqrestore(lock: &ci->lock, flags);
1743 return 0;
1744 }
1745 if (!ci->remote_wakeup) {
1746 ret = -EOPNOTSUPP;
1747 goto out;
1748 }
1749 if (!hw_read(ci, reg: OP_PORTSC, PORTSC_SUSP)) {
1750 ret = -EINVAL;
1751 goto out;
1752 }
1753 hw_write(ci, reg: OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1754out:
1755 spin_unlock_irqrestore(lock: &ci->lock, flags);
1756 return ret;
1757}
1758
1759static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1760{
1761 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1762
1763 if (ci->usb_phy)
1764 return usb_phy_set_power(x: ci->usb_phy, mA: ma);
1765 return -ENOTSUPP;
1766}
1767
1768static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1769{
1770 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1771 struct ci_hw_ep *hwep = ci->ep0in;
1772 unsigned long flags;
1773
1774 spin_lock_irqsave(hwep->lock, flags);
1775 _gadget->is_selfpowered = (is_on != 0);
1776 spin_unlock_irqrestore(lock: hwep->lock, flags);
1777
1778 return 0;
1779}
1780
1781/* Change Data+ pullup status
1782 * this func is used by usb_gadget_connect/disconnect
1783 */
1784static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1785{
1786 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1787
1788 /*
1789 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1790 * and don't touch Data+ in host mode for dual role config.
1791 */
1792 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1793 return 0;
1794
1795 pm_runtime_get_sync(dev: ci->dev);
1796 if (is_on)
1797 hw_write(ci, reg: OP_USBCMD, USBCMD_RS, USBCMD_RS);
1798 else
1799 hw_write(ci, reg: OP_USBCMD, USBCMD_RS, data: 0);
1800 pm_runtime_put_sync(dev: ci->dev);
1801
1802 return 0;
1803}
1804
1805static int ci_udc_start(struct usb_gadget *gadget,
1806 struct usb_gadget_driver *driver);
1807static int ci_udc_stop(struct usb_gadget *gadget);
1808
1809/* Match ISOC IN from the highest endpoint */
1810static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1811 struct usb_endpoint_descriptor *desc,
1812 struct usb_ss_ep_comp_descriptor *comp_desc)
1813{
1814 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1815 struct usb_ep *ep;
1816
1817 if (usb_endpoint_xfer_isoc(epd: desc) && usb_endpoint_dir_in(epd: desc)) {
1818 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1819 if (ep->caps.dir_in && !ep->claimed)
1820 return ep;
1821 }
1822 }
1823
1824 return NULL;
1825}
1826
1827/*
1828 * Device operations part of the API to the USB controller hardware,
1829 * which don't involve endpoints (or i/o)
1830 * Check "usb_gadget.h" for details
1831 */
1832static const struct usb_gadget_ops usb_gadget_ops = {
1833 .get_frame = ci_udc_get_frame,
1834 .vbus_session = ci_udc_vbus_session,
1835 .wakeup = ci_udc_wakeup,
1836 .set_selfpowered = ci_udc_selfpowered,
1837 .pullup = ci_udc_pullup,
1838 .vbus_draw = ci_udc_vbus_draw,
1839 .udc_start = ci_udc_start,
1840 .udc_stop = ci_udc_stop,
1841 .match_ep = ci_udc_match_ep,
1842};
1843
1844static int init_eps(struct ci_hdrc *ci)
1845{
1846 int retval = 0, i, j;
1847
1848 for (i = 0; i < ci->hw_ep_max/2; i++)
1849 for (j = RX; j <= TX; j++) {
1850 int k = i + j * ci->hw_ep_max/2;
1851 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1852
1853 scnprintf(buf: hwep->name, size: sizeof(hwep->name), fmt: "ep%i%s", i,
1854 (j == TX) ? "in" : "out");
1855
1856 hwep->ci = ci;
1857 hwep->lock = &ci->lock;
1858 hwep->td_pool = ci->td_pool;
1859
1860 hwep->ep.name = hwep->name;
1861 hwep->ep.ops = &usb_ep_ops;
1862
1863 if (i == 0) {
1864 hwep->ep.caps.type_control = true;
1865 } else {
1866 hwep->ep.caps.type_iso = true;
1867 hwep->ep.caps.type_bulk = true;
1868 hwep->ep.caps.type_int = true;
1869 }
1870
1871 if (j == TX)
1872 hwep->ep.caps.dir_in = true;
1873 else
1874 hwep->ep.caps.dir_out = true;
1875
1876 /*
1877 * for ep0: maxP defined in desc, for other
1878 * eps, maxP is set by epautoconfig() called
1879 * by gadget layer
1880 */
1881 usb_ep_set_maxpacket_limit(ep: &hwep->ep, maxpacket_limit: (unsigned short)~0);
1882
1883 INIT_LIST_HEAD(list: &hwep->qh.queue);
1884 hwep->qh.ptr = dma_pool_zalloc(pool: ci->qh_pool, GFP_KERNEL,
1885 handle: &hwep->qh.dma);
1886 if (hwep->qh.ptr == NULL)
1887 retval = -ENOMEM;
1888
1889 /*
1890 * set up shorthands for ep0 out and in endpoints,
1891 * don't add to gadget's ep_list
1892 */
1893 if (i == 0) {
1894 if (j == RX)
1895 ci->ep0out = hwep;
1896 else
1897 ci->ep0in = hwep;
1898
1899 usb_ep_set_maxpacket_limit(ep: &hwep->ep, CTRL_PAYLOAD_MAX);
1900 continue;
1901 }
1902
1903 list_add_tail(new: &hwep->ep.ep_list, head: &ci->gadget.ep_list);
1904 }
1905
1906 return retval;
1907}
1908
1909static void destroy_eps(struct ci_hdrc *ci)
1910{
1911 int i;
1912
1913 for (i = 0; i < ci->hw_ep_max; i++) {
1914 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1915
1916 if (hwep->pending_td)
1917 free_pending_td(hwep);
1918 dma_pool_free(pool: ci->qh_pool, vaddr: hwep->qh.ptr, addr: hwep->qh.dma);
1919 }
1920}
1921
1922/**
1923 * ci_udc_start: register a gadget driver
1924 * @gadget: our gadget
1925 * @driver: the driver being registered
1926 *
1927 * Interrupts are enabled here.
1928 */
1929static int ci_udc_start(struct usb_gadget *gadget,
1930 struct usb_gadget_driver *driver)
1931{
1932 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1933 int retval;
1934
1935 if (driver->disconnect == NULL)
1936 return -EINVAL;
1937
1938 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1939 retval = usb_ep_enable(ep: &ci->ep0out->ep);
1940 if (retval)
1941 return retval;
1942
1943 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1944 retval = usb_ep_enable(ep: &ci->ep0in->ep);
1945 if (retval)
1946 return retval;
1947
1948 ci->driver = driver;
1949
1950 /* Start otg fsm for B-device */
1951 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1952 ci_hdrc_otg_fsm_start(ci);
1953 return retval;
1954 }
1955
1956 if (ci->vbus_active)
1957 ci_hdrc_gadget_connect(gadget: gadget, is_active: 1);
1958 else
1959 usb_udc_vbus_handler(gadget: &ci->gadget, status: false);
1960
1961 return retval;
1962}
1963
1964static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1965{
1966 if (!ci_otg_is_fsm_mode(ci))
1967 return;
1968
1969 mutex_lock(&ci->fsm.lock);
1970 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1971 ci->fsm.a_bidl_adis_tmout = 1;
1972 ci_hdrc_otg_fsm_start(ci);
1973 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1974 ci->fsm.protocol = PROTO_UNDEF;
1975 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1976 }
1977 mutex_unlock(lock: &ci->fsm.lock);
1978}
1979
1980/*
1981 * ci_udc_stop: unregister a gadget driver
1982 */
1983static int ci_udc_stop(struct usb_gadget *gadget)
1984{
1985 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1986 unsigned long flags;
1987
1988 spin_lock_irqsave(&ci->lock, flags);
1989 ci->driver = NULL;
1990
1991 if (ci->vbus_active) {
1992 hw_device_state(ci, dma: 0);
1993 spin_unlock_irqrestore(lock: &ci->lock, flags);
1994 if (ci->platdata->notify_event)
1995 ci->platdata->notify_event(ci,
1996 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1997 _gadget_stop_activity(gadget: &ci->gadget);
1998 spin_lock_irqsave(&ci->lock, flags);
1999 pm_runtime_put(dev: ci->dev);
2000 }
2001
2002 spin_unlock_irqrestore(lock: &ci->lock, flags);
2003
2004 ci_udc_stop_for_otg_fsm(ci);
2005 return 0;
2006}
2007
2008/******************************************************************************
2009 * BUS block
2010 *****************************************************************************/
2011/*
2012 * udc_irq: ci interrupt handler
2013 *
2014 * This function returns IRQ_HANDLED if the IRQ has been handled
2015 * It locks access to registers
2016 */
2017static irqreturn_t udc_irq(struct ci_hdrc *ci)
2018{
2019 irqreturn_t retval;
2020 u32 intr;
2021
2022 if (ci == NULL)
2023 return IRQ_HANDLED;
2024
2025 spin_lock(lock: &ci->lock);
2026
2027 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2028 if (hw_read(ci, reg: OP_USBMODE, USBMODE_CM) !=
2029 USBMODE_CM_DC) {
2030 spin_unlock(lock: &ci->lock);
2031 return IRQ_NONE;
2032 }
2033 }
2034 intr = hw_test_and_clear_intr_active(ci);
2035
2036 if (intr) {
2037 /* order defines priority - do NOT change it */
2038 if (USBi_URI & intr)
2039 isr_reset_handler(ci);
2040
2041 if (USBi_PCI & intr) {
2042 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2043 USB_SPEED_HIGH : USB_SPEED_FULL;
2044 if (ci->usb_phy)
2045 usb_phy_set_event(x: ci->usb_phy,
2046 event: USB_EVENT_ENUMERATED);
2047 if (ci->suspended) {
2048 if (ci->driver->resume) {
2049 spin_unlock(lock: &ci->lock);
2050 ci->driver->resume(&ci->gadget);
2051 spin_lock(lock: &ci->lock);
2052 }
2053 ci->suspended = 0;
2054 usb_gadget_set_state(gadget: &ci->gadget,
2055 state: ci->resume_state);
2056 }
2057 }
2058
2059 if (USBi_UI & intr)
2060 isr_tr_complete_handler(ci);
2061
2062 if ((USBi_SLI & intr) && !(ci->suspended)) {
2063 ci->suspended = 1;
2064 ci->resume_state = ci->gadget.state;
2065 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2066 ci->driver->suspend) {
2067 spin_unlock(lock: &ci->lock);
2068 ci->driver->suspend(&ci->gadget);
2069 spin_lock(lock: &ci->lock);
2070 }
2071 usb_gadget_set_state(gadget: &ci->gadget,
2072 state: USB_STATE_SUSPENDED);
2073 }
2074 retval = IRQ_HANDLED;
2075 } else {
2076 retval = IRQ_NONE;
2077 }
2078 spin_unlock(lock: &ci->lock);
2079
2080 return retval;
2081}
2082
2083/**
2084 * udc_start: initialize gadget role
2085 * @ci: chipidea controller
2086 */
2087static int udc_start(struct ci_hdrc *ci)
2088{
2089 struct device *dev = ci->dev;
2090 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2091 int retval = 0;
2092
2093 ci->gadget.ops = &usb_gadget_ops;
2094 ci->gadget.speed = USB_SPEED_UNKNOWN;
2095 ci->gadget.max_speed = USB_SPEED_HIGH;
2096 ci->gadget.name = ci->platdata->name;
2097 ci->gadget.otg_caps = otg_caps;
2098 ci->gadget.sg_supported = 1;
2099 ci->gadget.irq = ci->irq;
2100
2101 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2102 ci->gadget.quirk_avoids_skb_reserve = 1;
2103
2104 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2105 otg_caps->adp_support))
2106 ci->gadget.is_otg = 1;
2107
2108 INIT_LIST_HEAD(list: &ci->gadget.ep_list);
2109
2110 /* alloc resources */
2111 ci->qh_pool = dma_pool_create(name: "ci_hw_qh", dev: dev->parent,
2112 size: sizeof(struct ci_hw_qh),
2113 align: 64, CI_HDRC_PAGE_SIZE);
2114 if (ci->qh_pool == NULL)
2115 return -ENOMEM;
2116
2117 ci->td_pool = dma_pool_create(name: "ci_hw_td", dev: dev->parent,
2118 size: sizeof(struct ci_hw_td),
2119 align: 64, CI_HDRC_PAGE_SIZE);
2120 if (ci->td_pool == NULL) {
2121 retval = -ENOMEM;
2122 goto free_qh_pool;
2123 }
2124
2125 retval = init_eps(ci);
2126 if (retval)
2127 goto free_pools;
2128
2129 ci->gadget.ep0 = &ci->ep0in->ep;
2130
2131 retval = usb_add_gadget_udc(parent: dev, gadget: &ci->gadget);
2132 if (retval)
2133 goto destroy_eps;
2134
2135 return retval;
2136
2137destroy_eps:
2138 destroy_eps(ci);
2139free_pools:
2140 dma_pool_destroy(pool: ci->td_pool);
2141free_qh_pool:
2142 dma_pool_destroy(pool: ci->qh_pool);
2143 return retval;
2144}
2145
2146/*
2147 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2148 *
2149 * No interrupts active, the IRQ has been released
2150 */
2151void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2152{
2153 if (!ci->roles[CI_ROLE_GADGET])
2154 return;
2155
2156 usb_del_gadget_udc(gadget: &ci->gadget);
2157
2158 destroy_eps(ci);
2159
2160 dma_pool_destroy(pool: ci->td_pool);
2161 dma_pool_destroy(pool: ci->qh_pool);
2162}
2163
2164static int udc_id_switch_for_device(struct ci_hdrc *ci)
2165{
2166 if (ci->platdata->pins_device)
2167 pinctrl_select_state(p: ci->platdata->pctl,
2168 s: ci->platdata->pins_device);
2169
2170 if (ci->is_otg)
2171 /* Clear and enable BSV irq */
2172 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2173 OTGSC_BSVIS | OTGSC_BSVIE);
2174
2175 return 0;
2176}
2177
2178static void udc_id_switch_for_host(struct ci_hdrc *ci)
2179{
2180 /*
2181 * host doesn't care B_SESSION_VALID event
2182 * so clear and disable BSV irq
2183 */
2184 if (ci->is_otg)
2185 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2186
2187 ci->vbus_active = 0;
2188
2189 if (ci->platdata->pins_device && ci->platdata->pins_default)
2190 pinctrl_select_state(p: ci->platdata->pctl,
2191 s: ci->platdata->pins_default);
2192}
2193
2194#ifdef CONFIG_PM_SLEEP
2195static void udc_suspend(struct ci_hdrc *ci)
2196{
2197 /*
2198 * Set OP_ENDPTLISTADDR to be non-zero for
2199 * checking if controller resume from power lost
2200 * in non-host mode.
2201 */
2202 if (hw_read(ci, reg: OP_ENDPTLISTADDR, mask: ~0) == 0)
2203 hw_write(ci, reg: OP_ENDPTLISTADDR, mask: ~0, data: ~0);
2204}
2205
2206static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2207{
2208 if (power_lost) {
2209 if (ci->is_otg)
2210 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2211 OTGSC_BSVIS | OTGSC_BSVIE);
2212 if (ci->vbus_active)
2213 usb_gadget_vbus_disconnect(gadget: &ci->gadget);
2214 }
2215
2216 /* Restore value 0 if it was set for power lost check */
2217 if (hw_read(ci, reg: OP_ENDPTLISTADDR, mask: ~0) == 0xFFFFFFFF)
2218 hw_write(ci, reg: OP_ENDPTLISTADDR, mask: ~0, data: 0);
2219}
2220#endif
2221
2222/**
2223 * ci_hdrc_gadget_init - initialize device related bits
2224 * @ci: the controller
2225 *
2226 * This function initializes the gadget, if the device is "device capable".
2227 */
2228int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2229{
2230 struct ci_role_driver *rdrv;
2231 int ret;
2232
2233 if (!hw_read(ci, reg: CAP_DCCPARAMS, DCCPARAMS_DC))
2234 return -ENXIO;
2235
2236 rdrv = devm_kzalloc(dev: ci->dev, size: sizeof(*rdrv), GFP_KERNEL);
2237 if (!rdrv)
2238 return -ENOMEM;
2239
2240 rdrv->start = udc_id_switch_for_device;
2241 rdrv->stop = udc_id_switch_for_host;
2242#ifdef CONFIG_PM_SLEEP
2243 rdrv->suspend = udc_suspend;
2244 rdrv->resume = udc_resume;
2245#endif
2246 rdrv->irq = udc_irq;
2247 rdrv->name = "gadget";
2248
2249 ret = udc_start(ci);
2250 if (!ret)
2251 ci->roles[CI_ROLE_GADGET] = rdrv;
2252
2253 return ret;
2254}
2255

source code of linux/drivers/usb/chipidea/udc.c