1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * ISP116x HCD (Host Controller Driver) for USB. |
4 | * |
5 | * Derived from the SL811 HCD, rewritten for ISP116x. |
6 | * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee> |
7 | * |
8 | * Portions: |
9 | * Copyright (C) 2004 Psion Teklogix (for NetBook PRO) |
10 | * Copyright (C) 2004 David Brownell |
11 | * |
12 | * Periodic scheduling is based on Roman's OHCI code |
13 | * Copyright (C) 1999 Roman Weissgaerber |
14 | * |
15 | */ |
16 | |
17 | /* |
18 | * The driver basically works. A number of people have used it with a range |
19 | * of devices. |
20 | * |
21 | * The driver passes all usbtests 1-14. |
22 | * |
23 | * Suspending/resuming of root hub via sysfs works. Remote wakeup works too. |
24 | * And suspending/resuming of platform device works too. Suspend/resume |
25 | * via HCD operations vector is not implemented. |
26 | * |
27 | * Iso transfer support is not implemented. Adding this would include |
28 | * implementing recovery from the failure to service the processed ITL |
29 | * fifo ram in time, which will involve chip reset. |
30 | * |
31 | * TODO: |
32 | + More testing of suspend/resume. |
33 | */ |
34 | |
35 | /* |
36 | ISP116x chips require certain delays between accesses to its |
37 | registers. The following timing options exist. |
38 | |
39 | 1. Configure your memory controller (the best) |
40 | 2. Implement platform-specific delay function possibly |
41 | combined with configuring the memory controller; see |
42 | include/linux/usb-isp116x.h for more info. Some broken |
43 | memory controllers line LH7A400 SMC need this. Also, |
44 | uncomment for that to work the following |
45 | USE_PLATFORM_DELAY macro. |
46 | 3. Use ndelay (easiest, poorest). For that, uncomment |
47 | the following USE_NDELAY macro. |
48 | */ |
49 | #define USE_PLATFORM_DELAY |
50 | //#define USE_NDELAY |
51 | |
52 | //#define DEBUG |
53 | //#define VERBOSE |
54 | /* Transfer descriptors. See dump_ptd() for printout format */ |
55 | //#define PTD_TRACE |
56 | /* enqueuing/finishing log of urbs */ |
57 | //#define URB_TRACE |
58 | |
59 | #include <linux/module.h> |
60 | #include <linux/delay.h> |
61 | #include <linux/debugfs.h> |
62 | #include <linux/seq_file.h> |
63 | #include <linux/errno.h> |
64 | #include <linux/list.h> |
65 | #include <linux/slab.h> |
66 | #include <linux/usb.h> |
67 | #include <linux/usb/isp116x.h> |
68 | #include <linux/usb/hcd.h> |
69 | #include <linux/platform_device.h> |
70 | |
71 | #include <asm/io.h> |
72 | #include <asm/irq.h> |
73 | #include <asm/byteorder.h> |
74 | |
75 | #include "isp116x.h" |
76 | |
77 | #define DRIVER_VERSION "03 Nov 2005" |
78 | #define DRIVER_DESC "ISP116x USB Host Controller Driver" |
79 | |
80 | MODULE_DESCRIPTION(DRIVER_DESC); |
81 | MODULE_LICENSE("GPL" ); |
82 | |
83 | static const char hcd_name[] = "isp116x-hcd" ; |
84 | |
85 | /*-----------------------------------------------------------------*/ |
86 | |
87 | /* |
88 | Write len bytes to fifo, pad till 32-bit boundary |
89 | */ |
90 | static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len) |
91 | { |
92 | u8 *dp = (u8 *) buf; |
93 | u16 *dp2 = (u16 *) buf; |
94 | u16 w; |
95 | int quot = len % 4; |
96 | |
97 | /* buffer is already in 'usb data order', which is LE. */ |
98 | /* When reading buffer as u16, we have to take care byte order */ |
99 | /* doesn't get mixed up */ |
100 | |
101 | if ((unsigned long)dp2 & 1) { |
102 | /* not aligned */ |
103 | for (; len > 1; len -= 2) { |
104 | w = *dp++; |
105 | w |= *dp++ << 8; |
106 | isp116x_raw_write_data16(isp116x, val: w); |
107 | } |
108 | if (len) |
109 | isp116x_write_data16(isp116x, val: (u16) * dp); |
110 | } else { |
111 | /* aligned */ |
112 | for (; len > 1; len -= 2) { |
113 | /* Keep byte order ! */ |
114 | isp116x_raw_write_data16(isp116x, cpu_to_le16(*dp2++)); |
115 | } |
116 | |
117 | if (len) |
118 | isp116x_write_data16(isp116x, val: 0xff & *((u8 *) dp2)); |
119 | } |
120 | if (quot == 1 || quot == 2) |
121 | isp116x_raw_write_data16(isp116x, val: 0); |
122 | } |
123 | |
124 | /* |
125 | Read len bytes from fifo and then read till 32-bit boundary. |
126 | */ |
127 | static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len) |
128 | { |
129 | u8 *dp = (u8 *) buf; |
130 | u16 *dp2 = (u16 *) buf; |
131 | u16 w; |
132 | int quot = len % 4; |
133 | |
134 | /* buffer is already in 'usb data order', which is LE. */ |
135 | /* When reading buffer as u16, we have to take care byte order */ |
136 | /* doesn't get mixed up */ |
137 | |
138 | if ((unsigned long)dp2 & 1) { |
139 | /* not aligned */ |
140 | for (; len > 1; len -= 2) { |
141 | w = isp116x_raw_read_data16(isp116x); |
142 | *dp++ = w & 0xff; |
143 | *dp++ = (w >> 8) & 0xff; |
144 | } |
145 | |
146 | if (len) |
147 | *dp = 0xff & isp116x_read_data16(isp116x); |
148 | } else { |
149 | /* aligned */ |
150 | for (; len > 1; len -= 2) { |
151 | /* Keep byte order! */ |
152 | *dp2++ = le16_to_cpu(isp116x_raw_read_data16(isp116x)); |
153 | } |
154 | |
155 | if (len) |
156 | *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x); |
157 | } |
158 | if (quot == 1 || quot == 2) |
159 | isp116x_raw_read_data16(isp116x); |
160 | } |
161 | |
162 | /* |
163 | Write ptd's and data for scheduled transfers into |
164 | the fifo ram. Fifo must be empty and ready. |
165 | */ |
166 | static void pack_fifo(struct isp116x *isp116x) |
167 | { |
168 | struct isp116x_ep *ep; |
169 | struct ptd *ptd; |
170 | int buflen = isp116x->atl_last_dir == PTD_DIR_IN |
171 | ? isp116x->atl_bufshrt : isp116x->atl_buflen; |
172 | |
173 | isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT); |
174 | isp116x_write_reg16(isp116x, HCXFERCTR, val: buflen); |
175 | isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET); |
176 | for (ep = isp116x->atl_active; ep; ep = ep->active) { |
177 | ptd = &ep->ptd; |
178 | dump_ptd(ptd); |
179 | dump_ptd_out_data(ptd, ep->data); |
180 | isp116x_write_data16(isp116x, val: ptd->count); |
181 | isp116x_write_data16(isp116x, val: ptd->mps); |
182 | isp116x_write_data16(isp116x, val: ptd->len); |
183 | isp116x_write_data16(isp116x, val: ptd->faddr); |
184 | buflen -= sizeof(struct ptd); |
185 | /* Skip writing data for last IN PTD */ |
186 | if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) { |
187 | write_ptddata_to_fifo(isp116x, buf: ep->data, len: ep->length); |
188 | buflen -= ALIGN(ep->length, 4); |
189 | } |
190 | } |
191 | BUG_ON(buflen); |
192 | } |
193 | |
194 | /* |
195 | Read the processed ptd's and data from fifo ram back to |
196 | URBs' buffers. Fifo must be full and done |
197 | */ |
198 | static void unpack_fifo(struct isp116x *isp116x) |
199 | { |
200 | struct isp116x_ep *ep; |
201 | struct ptd *ptd; |
202 | int buflen = isp116x->atl_last_dir == PTD_DIR_IN |
203 | ? isp116x->atl_buflen : isp116x->atl_bufshrt; |
204 | |
205 | isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT); |
206 | isp116x_write_reg16(isp116x, HCXFERCTR, val: buflen); |
207 | isp116x_write_addr(isp116x, HCATLPORT); |
208 | for (ep = isp116x->atl_active; ep; ep = ep->active) { |
209 | ptd = &ep->ptd; |
210 | ptd->count = isp116x_read_data16(isp116x); |
211 | ptd->mps = isp116x_read_data16(isp116x); |
212 | ptd->len = isp116x_read_data16(isp116x); |
213 | ptd->faddr = isp116x_read_data16(isp116x); |
214 | buflen -= sizeof(struct ptd); |
215 | /* Skip reading data for last Setup or Out PTD */ |
216 | if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) { |
217 | read_ptddata_from_fifo(isp116x, buf: ep->data, len: ep->length); |
218 | buflen -= ALIGN(ep->length, 4); |
219 | } |
220 | dump_ptd(ptd); |
221 | dump_ptd_in_data(ptd, ep->data); |
222 | } |
223 | BUG_ON(buflen); |
224 | } |
225 | |
226 | /*---------------------------------------------------------------*/ |
227 | |
228 | /* |
229 | Set up PTD's. |
230 | */ |
231 | static void preproc_atl_queue(struct isp116x *isp116x) |
232 | { |
233 | struct isp116x_ep *ep; |
234 | struct urb *urb; |
235 | struct ptd *ptd; |
236 | u16 len; |
237 | |
238 | for (ep = isp116x->atl_active; ep; ep = ep->active) { |
239 | u16 toggle = 0, dir = PTD_DIR_SETUP; |
240 | |
241 | BUG_ON(list_empty(&ep->hep->urb_list)); |
242 | urb = container_of(ep->hep->urb_list.next, |
243 | struct urb, urb_list); |
244 | ptd = &ep->ptd; |
245 | len = ep->length; |
246 | ep->data = (unsigned char *)urb->transfer_buffer |
247 | + urb->actual_length; |
248 | |
249 | switch (ep->nextpid) { |
250 | case USB_PID_IN: |
251 | toggle = usb_gettoggle(urb->dev, ep->epnum, 0); |
252 | dir = PTD_DIR_IN; |
253 | break; |
254 | case USB_PID_OUT: |
255 | toggle = usb_gettoggle(urb->dev, ep->epnum, 1); |
256 | dir = PTD_DIR_OUT; |
257 | break; |
258 | case USB_PID_SETUP: |
259 | len = sizeof(struct usb_ctrlrequest); |
260 | ep->data = urb->setup_packet; |
261 | break; |
262 | case USB_PID_ACK: |
263 | toggle = 1; |
264 | len = 0; |
265 | dir = (urb->transfer_buffer_length |
266 | && usb_pipein(urb->pipe)) |
267 | ? PTD_DIR_OUT : PTD_DIR_IN; |
268 | break; |
269 | default: |
270 | ERR("%s %d: ep->nextpid %d\n" , __func__, __LINE__, |
271 | ep->nextpid); |
272 | BUG(); |
273 | } |
274 | |
275 | ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle); |
276 | ptd->mps = PTD_MPS(ep->maxpacket) |
277 | | PTD_SPD(urb->dev->speed == USB_SPEED_LOW) |
278 | | PTD_EP(ep->epnum); |
279 | ptd->len = PTD_LEN(len) | PTD_DIR(dir); |
280 | ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe)); |
281 | if (!ep->active) { |
282 | ptd->mps |= PTD_LAST_MSK; |
283 | isp116x->atl_last_dir = dir; |
284 | } |
285 | isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen; |
286 | isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4); |
287 | } |
288 | } |
289 | |
290 | /* |
291 | Take done or failed requests out of schedule. Give back |
292 | processed urbs. |
293 | */ |
294 | static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep, |
295 | struct urb *urb, int status) |
296 | __releases(isp116x->lock) __acquires(isp116x->lock) |
297 | { |
298 | unsigned i; |
299 | |
300 | ep->error_count = 0; |
301 | |
302 | if (usb_pipecontrol(urb->pipe)) |
303 | ep->nextpid = USB_PID_SETUP; |
304 | |
305 | urb_dbg(urb, "Finish" ); |
306 | |
307 | usb_hcd_unlink_urb_from_ep(hcd: isp116x_to_hcd(isp116x), urb); |
308 | spin_unlock(lock: &isp116x->lock); |
309 | usb_hcd_giveback_urb(hcd: isp116x_to_hcd(isp116x), urb, status); |
310 | spin_lock(lock: &isp116x->lock); |
311 | |
312 | /* take idle endpoints out of the schedule */ |
313 | if (!list_empty(head: &ep->hep->urb_list)) |
314 | return; |
315 | |
316 | /* async deschedule */ |
317 | if (!list_empty(head: &ep->schedule)) { |
318 | list_del_init(entry: &ep->schedule); |
319 | return; |
320 | } |
321 | |
322 | /* periodic deschedule */ |
323 | DBG("deschedule qh%d/%p branch %d\n" , ep->period, ep, ep->branch); |
324 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { |
325 | struct isp116x_ep *temp; |
326 | struct isp116x_ep **prev = &isp116x->periodic[i]; |
327 | |
328 | while (*prev && ((temp = *prev) != ep)) |
329 | prev = &temp->next; |
330 | if (*prev) |
331 | *prev = ep->next; |
332 | isp116x->load[i] -= ep->load; |
333 | } |
334 | ep->branch = PERIODIC_SIZE; |
335 | isp116x_to_hcd(isp116x)->self.bandwidth_allocated -= |
336 | ep->load / ep->period; |
337 | |
338 | /* switch irq type? */ |
339 | if (!--isp116x->periodic_count) { |
340 | isp116x->irqenb &= ~HCuPINT_SOF; |
341 | isp116x->irqenb |= HCuPINT_ATL; |
342 | } |
343 | } |
344 | |
345 | /* |
346 | Analyze transfer results, handle partial transfers and errors |
347 | */ |
348 | static void postproc_atl_queue(struct isp116x *isp116x) |
349 | { |
350 | struct isp116x_ep *ep; |
351 | struct urb *urb; |
352 | struct usb_device *udev; |
353 | struct ptd *ptd; |
354 | int short_not_ok; |
355 | int status; |
356 | u8 cc; |
357 | |
358 | for (ep = isp116x->atl_active; ep; ep = ep->active) { |
359 | BUG_ON(list_empty(&ep->hep->urb_list)); |
360 | urb = |
361 | container_of(ep->hep->urb_list.next, struct urb, urb_list); |
362 | udev = urb->dev; |
363 | ptd = &ep->ptd; |
364 | cc = PTD_GET_CC(ptd); |
365 | short_not_ok = 1; |
366 | status = -EINPROGRESS; |
367 | |
368 | /* Data underrun is special. For allowed underrun |
369 | we clear the error and continue as normal. For |
370 | forbidden underrun we finish the DATA stage |
371 | immediately while for control transfer, |
372 | we do a STATUS stage. */ |
373 | if (cc == TD_DATAUNDERRUN) { |
374 | if (!(urb->transfer_flags & URB_SHORT_NOT_OK) || |
375 | usb_pipecontrol(urb->pipe)) { |
376 | DBG("Allowed or control data underrun\n" ); |
377 | cc = TD_CC_NOERROR; |
378 | short_not_ok = 0; |
379 | } else { |
380 | ep->error_count = 1; |
381 | usb_settoggle(udev, ep->epnum, |
382 | ep->nextpid == USB_PID_OUT, |
383 | PTD_GET_TOGGLE(ptd)); |
384 | urb->actual_length += PTD_GET_COUNT(ptd); |
385 | status = cc_to_error[TD_DATAUNDERRUN]; |
386 | goto done; |
387 | } |
388 | } |
389 | |
390 | if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED |
391 | && (++ep->error_count >= 3 || cc == TD_CC_STALL |
392 | || cc == TD_DATAOVERRUN)) { |
393 | status = cc_to_error[cc]; |
394 | if (ep->nextpid == USB_PID_ACK) |
395 | ep->nextpid = 0; |
396 | goto done; |
397 | } |
398 | /* According to usb spec, zero-length Int transfer signals |
399 | finishing of the urb. Hey, does this apply only |
400 | for IN endpoints? */ |
401 | if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) { |
402 | status = 0; |
403 | goto done; |
404 | } |
405 | |
406 | /* Relax after previously failed, but later succeeded |
407 | or correctly NAK'ed retransmission attempt */ |
408 | if (ep->error_count |
409 | && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED)) |
410 | ep->error_count = 0; |
411 | |
412 | /* Take into account idiosyncracies of the isp116x chip |
413 | regarding toggle bit for failed transfers */ |
414 | if (ep->nextpid == USB_PID_OUT) |
415 | usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd) |
416 | ^ (ep->error_count > 0)); |
417 | else if (ep->nextpid == USB_PID_IN) |
418 | usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd) |
419 | ^ (ep->error_count > 0)); |
420 | |
421 | switch (ep->nextpid) { |
422 | case USB_PID_IN: |
423 | case USB_PID_OUT: |
424 | urb->actual_length += PTD_GET_COUNT(ptd); |
425 | if (PTD_GET_ACTIVE(ptd) |
426 | || (cc != TD_CC_NOERROR && cc < 0x0E)) |
427 | break; |
428 | if (urb->transfer_buffer_length != urb->actual_length) { |
429 | if (short_not_ok) |
430 | break; |
431 | } else { |
432 | if (urb->transfer_flags & URB_ZERO_PACKET |
433 | && ep->nextpid == USB_PID_OUT |
434 | && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) { |
435 | DBG("Zero packet requested\n" ); |
436 | break; |
437 | } |
438 | } |
439 | /* All data for this URB is transferred, let's finish */ |
440 | if (usb_pipecontrol(urb->pipe)) |
441 | ep->nextpid = USB_PID_ACK; |
442 | else |
443 | status = 0; |
444 | break; |
445 | case USB_PID_SETUP: |
446 | if (PTD_GET_ACTIVE(ptd) |
447 | || (cc != TD_CC_NOERROR && cc < 0x0E)) |
448 | break; |
449 | if (urb->transfer_buffer_length == urb->actual_length) |
450 | ep->nextpid = USB_PID_ACK; |
451 | else if (usb_pipeout(urb->pipe)) { |
452 | usb_settoggle(udev, 0, 1, 1); |
453 | ep->nextpid = USB_PID_OUT; |
454 | } else { |
455 | usb_settoggle(udev, 0, 0, 1); |
456 | ep->nextpid = USB_PID_IN; |
457 | } |
458 | break; |
459 | case USB_PID_ACK: |
460 | if (PTD_GET_ACTIVE(ptd) |
461 | || (cc != TD_CC_NOERROR && cc < 0x0E)) |
462 | break; |
463 | status = 0; |
464 | ep->nextpid = 0; |
465 | break; |
466 | default: |
467 | BUG(); |
468 | } |
469 | |
470 | done: |
471 | if (status != -EINPROGRESS || urb->unlinked) |
472 | finish_request(isp116x, ep, urb, status); |
473 | } |
474 | } |
475 | |
476 | /* |
477 | Scan transfer lists, schedule transfers, send data off |
478 | to chip. |
479 | */ |
480 | static void start_atl_transfers(struct isp116x *isp116x) |
481 | { |
482 | struct isp116x_ep *last_ep = NULL, *ep; |
483 | struct urb *urb; |
484 | u16 load = 0; |
485 | int len, index, speed, byte_time; |
486 | |
487 | if (atomic_read(v: &isp116x->atl_finishing)) |
488 | return; |
489 | |
490 | if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) |
491 | return; |
492 | |
493 | /* FIFO not empty? */ |
494 | if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) |
495 | return; |
496 | |
497 | isp116x->atl_active = NULL; |
498 | isp116x->atl_buflen = isp116x->atl_bufshrt = 0; |
499 | |
500 | /* Schedule int transfers */ |
501 | if (isp116x->periodic_count) { |
502 | isp116x->fmindex = index = |
503 | (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1); |
504 | load = isp116x->load[index]; |
505 | if (load) { |
506 | /* Bring all int transfers for this frame |
507 | into the active queue */ |
508 | isp116x->atl_active = last_ep = |
509 | isp116x->periodic[index]; |
510 | while (last_ep->next) |
511 | last_ep = (last_ep->active = last_ep->next); |
512 | last_ep->active = NULL; |
513 | } |
514 | } |
515 | |
516 | /* Schedule control/bulk transfers */ |
517 | list_for_each_entry(ep, &isp116x->async, schedule) { |
518 | urb = container_of(ep->hep->urb_list.next, |
519 | struct urb, urb_list); |
520 | speed = urb->dev->speed; |
521 | byte_time = speed == USB_SPEED_LOW |
522 | ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED; |
523 | |
524 | if (ep->nextpid == USB_PID_SETUP) { |
525 | len = sizeof(struct usb_ctrlrequest); |
526 | } else if (ep->nextpid == USB_PID_ACK) { |
527 | len = 0; |
528 | } else { |
529 | /* Find current free length ... */ |
530 | len = (MAX_LOAD_LIMIT - load) / byte_time; |
531 | |
532 | /* ... then limit it to configured max size ... */ |
533 | len = min(len, speed == USB_SPEED_LOW ? |
534 | MAX_TRANSFER_SIZE_LOWSPEED : |
535 | MAX_TRANSFER_SIZE_FULLSPEED); |
536 | |
537 | /* ... and finally cut to the multiple of MaxPacketSize, |
538 | or to the real length if there's enough room. */ |
539 | if (len < |
540 | (urb->transfer_buffer_length - |
541 | urb->actual_length)) { |
542 | len -= len % ep->maxpacket; |
543 | if (!len) |
544 | continue; |
545 | } else |
546 | len = urb->transfer_buffer_length - |
547 | urb->actual_length; |
548 | BUG_ON(len < 0); |
549 | } |
550 | |
551 | load += len * byte_time; |
552 | if (load > MAX_LOAD_LIMIT) |
553 | break; |
554 | |
555 | ep->active = NULL; |
556 | ep->length = len; |
557 | if (last_ep) |
558 | last_ep->active = ep; |
559 | else |
560 | isp116x->atl_active = ep; |
561 | last_ep = ep; |
562 | } |
563 | |
564 | /* Avoid starving of endpoints */ |
565 | if ((&isp116x->async)->next != (&isp116x->async)->prev) |
566 | list_move(list: &isp116x->async, head: (&isp116x->async)->next); |
567 | |
568 | if (isp116x->atl_active) { |
569 | preproc_atl_queue(isp116x); |
570 | pack_fifo(isp116x); |
571 | } |
572 | } |
573 | |
574 | /* |
575 | Finish the processed transfers |
576 | */ |
577 | static void finish_atl_transfers(struct isp116x *isp116x) |
578 | { |
579 | if (!isp116x->atl_active) |
580 | return; |
581 | /* Fifo not ready? */ |
582 | if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) |
583 | return; |
584 | |
585 | atomic_inc(v: &isp116x->atl_finishing); |
586 | unpack_fifo(isp116x); |
587 | postproc_atl_queue(isp116x); |
588 | atomic_dec(v: &isp116x->atl_finishing); |
589 | } |
590 | |
591 | static irqreturn_t isp116x_irq(struct usb_hcd *hcd) |
592 | { |
593 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
594 | u16 irqstat; |
595 | irqreturn_t ret = IRQ_NONE; |
596 | |
597 | spin_lock(lock: &isp116x->lock); |
598 | isp116x_write_reg16(isp116x, HCuPINTENB, val: 0); |
599 | irqstat = isp116x_read_reg16(isp116x, HCuPINT); |
600 | isp116x_write_reg16(isp116x, HCuPINT, val: irqstat); |
601 | |
602 | if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) { |
603 | ret = IRQ_HANDLED; |
604 | finish_atl_transfers(isp116x); |
605 | } |
606 | |
607 | if (irqstat & HCuPINT_OPR) { |
608 | u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT); |
609 | isp116x_write_reg32(isp116x, HCINTSTAT, val: intstat); |
610 | if (intstat & HCINT_UE) { |
611 | ERR("Unrecoverable error, HC is dead!\n" ); |
612 | /* IRQ's are off, we do no DMA, |
613 | perfectly ready to die ... */ |
614 | hcd->state = HC_STATE_HALT; |
615 | usb_hc_died(hcd); |
616 | ret = IRQ_HANDLED; |
617 | goto done; |
618 | } |
619 | if (intstat & HCINT_RHSC) |
620 | /* When root hub or any of its ports is going |
621 | to come out of suspend, it may take more |
622 | than 10ms for status bits to stabilize. */ |
623 | mod_timer(timer: &hcd->rh_timer, expires: jiffies |
624 | + msecs_to_jiffies(m: 20) + 1); |
625 | if (intstat & HCINT_RD) { |
626 | DBG("---- remote wakeup\n" ); |
627 | usb_hcd_resume_root_hub(hcd); |
628 | } |
629 | irqstat &= ~HCuPINT_OPR; |
630 | ret = IRQ_HANDLED; |
631 | } |
632 | |
633 | if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) { |
634 | start_atl_transfers(isp116x); |
635 | } |
636 | |
637 | isp116x_write_reg16(isp116x, HCuPINTENB, val: isp116x->irqenb); |
638 | done: |
639 | spin_unlock(lock: &isp116x->lock); |
640 | return ret; |
641 | } |
642 | |
643 | /*-----------------------------------------------------------------*/ |
644 | |
645 | /* usb 1.1 says max 90% of a frame is available for periodic transfers. |
646 | * this driver doesn't promise that much since it's got to handle an |
647 | * IRQ per packet; irq handling latencies also use up that time. |
648 | */ |
649 | |
650 | /* out of 1000 us */ |
651 | #define MAX_PERIODIC_LOAD 600 |
652 | static int balance(struct isp116x *isp116x, u16 period, u16 load) |
653 | { |
654 | int i, branch = -ENOSPC; |
655 | |
656 | /* search for the least loaded schedule branch of that period |
657 | which has enough bandwidth left unreserved. */ |
658 | for (i = 0; i < period; i++) { |
659 | if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) { |
660 | int j; |
661 | |
662 | for (j = i; j < PERIODIC_SIZE; j += period) { |
663 | if ((isp116x->load[j] + load) |
664 | > MAX_PERIODIC_LOAD) |
665 | break; |
666 | } |
667 | if (j < PERIODIC_SIZE) |
668 | continue; |
669 | branch = i; |
670 | } |
671 | } |
672 | return branch; |
673 | } |
674 | |
675 | /* NB! ALL the code above this point runs with isp116x->lock |
676 | held, irqs off |
677 | */ |
678 | |
679 | /*-----------------------------------------------------------------*/ |
680 | |
681 | static int isp116x_urb_enqueue(struct usb_hcd *hcd, |
682 | struct urb *urb, |
683 | gfp_t mem_flags) |
684 | { |
685 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
686 | struct usb_device *udev = urb->dev; |
687 | unsigned int pipe = urb->pipe; |
688 | int is_out = !usb_pipein(pipe); |
689 | int type = usb_pipetype(pipe); |
690 | int epnum = usb_pipeendpoint(pipe); |
691 | struct usb_host_endpoint *hep = urb->ep; |
692 | struct isp116x_ep *ep = NULL; |
693 | unsigned long flags; |
694 | int i; |
695 | int ret = 0; |
696 | |
697 | urb_dbg(urb, "Enqueue" ); |
698 | |
699 | if (type == PIPE_ISOCHRONOUS) { |
700 | ERR("Isochronous transfers not supported\n" ); |
701 | urb_dbg(urb, "Refused to enqueue" ); |
702 | return -ENXIO; |
703 | } |
704 | /* avoid all allocations within spinlocks: request or endpoint */ |
705 | if (!hep->hcpriv) { |
706 | ep = kzalloc(size: sizeof *ep, flags: mem_flags); |
707 | if (!ep) |
708 | return -ENOMEM; |
709 | } |
710 | |
711 | spin_lock_irqsave(&isp116x->lock, flags); |
712 | if (!HC_IS_RUNNING(hcd->state)) { |
713 | kfree(objp: ep); |
714 | ret = -ENODEV; |
715 | goto fail_not_linked; |
716 | } |
717 | ret = usb_hcd_link_urb_to_ep(hcd, urb); |
718 | if (ret) { |
719 | kfree(objp: ep); |
720 | goto fail_not_linked; |
721 | } |
722 | |
723 | if (hep->hcpriv) |
724 | ep = hep->hcpriv; |
725 | else { |
726 | INIT_LIST_HEAD(list: &ep->schedule); |
727 | ep->udev = udev; |
728 | ep->epnum = epnum; |
729 | ep->maxpacket = usb_maxpacket(udev, pipe: urb->pipe); |
730 | usb_settoggle(udev, epnum, is_out, 0); |
731 | |
732 | if (type == PIPE_CONTROL) { |
733 | ep->nextpid = USB_PID_SETUP; |
734 | } else if (is_out) { |
735 | ep->nextpid = USB_PID_OUT; |
736 | } else { |
737 | ep->nextpid = USB_PID_IN; |
738 | } |
739 | |
740 | if (urb->interval) { |
741 | /* |
742 | With INT URBs submitted, the driver works with SOF |
743 | interrupt enabled and ATL interrupt disabled. After |
744 | the PTDs are written to fifo ram, the chip starts |
745 | fifo processing and usb transfers after the next |
746 | SOF and continues until the transfers are finished |
747 | (succeeded or failed) or the frame ends. Therefore, |
748 | the transfers occur only in every second frame, |
749 | while fifo reading/writing and data processing |
750 | occur in every other second frame. */ |
751 | if (urb->interval < 2) |
752 | urb->interval = 2; |
753 | if (urb->interval > 2 * PERIODIC_SIZE) |
754 | urb->interval = 2 * PERIODIC_SIZE; |
755 | ep->period = urb->interval >> 1; |
756 | ep->branch = PERIODIC_SIZE; |
757 | ep->load = usb_calc_bus_time(speed: udev->speed, |
758 | is_input: !is_out, |
759 | isoc: (type == PIPE_ISOCHRONOUS), |
760 | bytecount: usb_maxpacket(udev, pipe)) / |
761 | 1000; |
762 | } |
763 | hep->hcpriv = ep; |
764 | ep->hep = hep; |
765 | } |
766 | |
767 | /* maybe put endpoint into schedule */ |
768 | switch (type) { |
769 | case PIPE_CONTROL: |
770 | case PIPE_BULK: |
771 | if (list_empty(head: &ep->schedule)) |
772 | list_add_tail(new: &ep->schedule, head: &isp116x->async); |
773 | break; |
774 | case PIPE_INTERRUPT: |
775 | urb->interval = ep->period; |
776 | ep->length = min_t(u32, ep->maxpacket, |
777 | urb->transfer_buffer_length); |
778 | |
779 | /* urb submitted for already existing endpoint */ |
780 | if (ep->branch < PERIODIC_SIZE) |
781 | break; |
782 | |
783 | ep->branch = ret = balance(isp116x, period: ep->period, load: ep->load); |
784 | if (ret < 0) |
785 | goto fail; |
786 | ret = 0; |
787 | |
788 | urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1)) |
789 | + ep->branch; |
790 | |
791 | /* sort each schedule branch by period (slow before fast) |
792 | to share the faster parts of the tree without needing |
793 | dummy/placeholder nodes */ |
794 | DBG("schedule qh%d/%p branch %d\n" , ep->period, ep, ep->branch); |
795 | for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) { |
796 | struct isp116x_ep **prev = &isp116x->periodic[i]; |
797 | struct isp116x_ep *here = *prev; |
798 | |
799 | while (here && ep != here) { |
800 | if (ep->period > here->period) |
801 | break; |
802 | prev = &here->next; |
803 | here = *prev; |
804 | } |
805 | if (ep != here) { |
806 | ep->next = here; |
807 | *prev = ep; |
808 | } |
809 | isp116x->load[i] += ep->load; |
810 | } |
811 | hcd->self.bandwidth_allocated += ep->load / ep->period; |
812 | |
813 | /* switch over to SOFint */ |
814 | if (!isp116x->periodic_count++) { |
815 | isp116x->irqenb &= ~HCuPINT_ATL; |
816 | isp116x->irqenb |= HCuPINT_SOF; |
817 | isp116x_write_reg16(isp116x, HCuPINTENB, |
818 | val: isp116x->irqenb); |
819 | } |
820 | } |
821 | |
822 | urb->hcpriv = hep; |
823 | start_atl_transfers(isp116x); |
824 | |
825 | fail: |
826 | if (ret) |
827 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
828 | fail_not_linked: |
829 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
830 | return ret; |
831 | } |
832 | |
833 | /* |
834 | Dequeue URBs. |
835 | */ |
836 | static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, |
837 | int status) |
838 | { |
839 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
840 | struct usb_host_endpoint *hep; |
841 | struct isp116x_ep *ep, *ep_act; |
842 | unsigned long flags; |
843 | int rc; |
844 | |
845 | spin_lock_irqsave(&isp116x->lock, flags); |
846 | rc = usb_hcd_check_unlink_urb(hcd, urb, status); |
847 | if (rc) |
848 | goto done; |
849 | |
850 | hep = urb->hcpriv; |
851 | ep = hep->hcpriv; |
852 | WARN_ON(hep != ep->hep); |
853 | |
854 | /* In front of queue? */ |
855 | if (ep->hep->urb_list.next == &urb->urb_list) |
856 | /* active? */ |
857 | for (ep_act = isp116x->atl_active; ep_act; |
858 | ep_act = ep_act->active) |
859 | if (ep_act == ep) { |
860 | VDBG("dequeue, urb %p active; wait for irq\n" , |
861 | urb); |
862 | urb = NULL; |
863 | break; |
864 | } |
865 | |
866 | if (urb) |
867 | finish_request(isp116x, ep, urb, status); |
868 | done: |
869 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
870 | return rc; |
871 | } |
872 | |
873 | static void isp116x_endpoint_disable(struct usb_hcd *hcd, |
874 | struct usb_host_endpoint *hep) |
875 | { |
876 | int i; |
877 | struct isp116x_ep *ep = hep->hcpriv; |
878 | |
879 | if (!ep) |
880 | return; |
881 | |
882 | /* assume we'd just wait for the irq */ |
883 | for (i = 0; i < 100 && !list_empty(head: &hep->urb_list); i++) |
884 | msleep(msecs: 3); |
885 | if (!list_empty(head: &hep->urb_list)) |
886 | WARNING("ep %p not empty?\n" , ep); |
887 | |
888 | kfree(objp: ep); |
889 | hep->hcpriv = NULL; |
890 | } |
891 | |
892 | static int isp116x_get_frame(struct usb_hcd *hcd) |
893 | { |
894 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
895 | u32 fmnum; |
896 | unsigned long flags; |
897 | |
898 | spin_lock_irqsave(&isp116x->lock, flags); |
899 | fmnum = isp116x_read_reg32(isp116x, HCFMNUM); |
900 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
901 | return (int)fmnum; |
902 | } |
903 | |
904 | /* |
905 | Adapted from ohci-hub.c. Currently we don't support autosuspend. |
906 | */ |
907 | static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf) |
908 | { |
909 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
910 | int ports, i, changed = 0; |
911 | unsigned long flags; |
912 | |
913 | if (!HC_IS_RUNNING(hcd->state)) |
914 | return -ESHUTDOWN; |
915 | |
916 | /* Report no status change now, if we are scheduled to be |
917 | called later */ |
918 | if (timer_pending(timer: &hcd->rh_timer)) |
919 | return 0; |
920 | |
921 | ports = isp116x->rhdesca & RH_A_NDP; |
922 | spin_lock_irqsave(&isp116x->lock, flags); |
923 | isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS); |
924 | if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC)) |
925 | buf[0] = changed = 1; |
926 | else |
927 | buf[0] = 0; |
928 | |
929 | for (i = 0; i < ports; i++) { |
930 | u32 status = isp116x_read_reg32(isp116x, reg: i ? HCRHPORT2 : HCRHPORT1); |
931 | |
932 | if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC |
933 | | RH_PS_OCIC | RH_PS_PRSC)) { |
934 | changed = 1; |
935 | buf[0] |= 1 << (i + 1); |
936 | } |
937 | } |
938 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
939 | return changed; |
940 | } |
941 | |
942 | static void isp116x_hub_descriptor(struct isp116x *isp116x, |
943 | struct usb_hub_descriptor *desc) |
944 | { |
945 | u32 reg = isp116x->rhdesca; |
946 | |
947 | desc->bDescriptorType = USB_DT_HUB; |
948 | desc->bDescLength = 9; |
949 | desc->bHubContrCurrent = 0; |
950 | desc->bNbrPorts = (u8) (reg & 0x3); |
951 | /* Power switching, device type, overcurrent. */ |
952 | desc->wHubCharacteristics = cpu_to_le16((u16) ((reg >> 8) & |
953 | (HUB_CHAR_LPSM | |
954 | HUB_CHAR_COMPOUND | |
955 | HUB_CHAR_OCPM))); |
956 | desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff); |
957 | /* ports removable, and legacy PortPwrCtrlMask */ |
958 | desc->u.hs.DeviceRemovable[0] = 0; |
959 | desc->u.hs.DeviceRemovable[1] = ~0; |
960 | } |
961 | |
962 | /* Perform reset of a given port. |
963 | It would be great to just start the reset and let the |
964 | USB core to clear the reset in due time. However, |
965 | root hub ports should be reset for at least 50 ms, while |
966 | our chip stays in reset for about 10 ms. I.e., we must |
967 | repeatedly reset it ourself here. |
968 | */ |
969 | static inline void root_port_reset(struct isp116x *isp116x, unsigned port) |
970 | { |
971 | u32 tmp; |
972 | unsigned long flags, t; |
973 | |
974 | /* Root hub reset should be 50 ms, but some devices |
975 | want it even longer. */ |
976 | t = jiffies + msecs_to_jiffies(m: 100); |
977 | |
978 | while (time_before(jiffies, t)) { |
979 | spin_lock_irqsave(&isp116x->lock, flags); |
980 | /* spin until any current reset finishes */ |
981 | for (;;) { |
982 | tmp = isp116x_read_reg32(isp116x, reg: port ? |
983 | HCRHPORT2 : HCRHPORT1); |
984 | if (!(tmp & RH_PS_PRS)) |
985 | break; |
986 | udelay(500); |
987 | } |
988 | /* Don't reset a disconnected port */ |
989 | if (!(tmp & RH_PS_CCS)) { |
990 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
991 | break; |
992 | } |
993 | /* Reset lasts 10ms (claims datasheet) */ |
994 | isp116x_write_reg32(isp116x, reg: port ? HCRHPORT2 : |
995 | HCRHPORT1, val: (RH_PS_PRS)); |
996 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
997 | msleep(msecs: 10); |
998 | } |
999 | } |
1000 | |
1001 | /* Adapted from ohci-hub.c */ |
1002 | static int isp116x_hub_control(struct usb_hcd *hcd, |
1003 | u16 typeReq, |
1004 | u16 wValue, u16 wIndex, char *buf, u16 wLength) |
1005 | { |
1006 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1007 | int ret = 0; |
1008 | unsigned long flags; |
1009 | int ports = isp116x->rhdesca & RH_A_NDP; |
1010 | u32 tmp = 0; |
1011 | |
1012 | switch (typeReq) { |
1013 | case ClearHubFeature: |
1014 | DBG("ClearHubFeature: " ); |
1015 | switch (wValue) { |
1016 | case C_HUB_OVER_CURRENT: |
1017 | DBG("C_HUB_OVER_CURRENT\n" ); |
1018 | spin_lock_irqsave(&isp116x->lock, flags); |
1019 | isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC); |
1020 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1021 | fallthrough; |
1022 | case C_HUB_LOCAL_POWER: |
1023 | DBG("C_HUB_LOCAL_POWER\n" ); |
1024 | break; |
1025 | default: |
1026 | goto error; |
1027 | } |
1028 | break; |
1029 | case SetHubFeature: |
1030 | DBG("SetHubFeature: " ); |
1031 | switch (wValue) { |
1032 | case C_HUB_OVER_CURRENT: |
1033 | case C_HUB_LOCAL_POWER: |
1034 | DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n" ); |
1035 | break; |
1036 | default: |
1037 | goto error; |
1038 | } |
1039 | break; |
1040 | case GetHubDescriptor: |
1041 | DBG("GetHubDescriptor\n" ); |
1042 | isp116x_hub_descriptor(isp116x, |
1043 | desc: (struct usb_hub_descriptor *)buf); |
1044 | break; |
1045 | case GetHubStatus: |
1046 | DBG("GetHubStatus\n" ); |
1047 | *(__le32 *) buf = 0; |
1048 | break; |
1049 | case GetPortStatus: |
1050 | DBG("GetPortStatus\n" ); |
1051 | if (!wIndex || wIndex > ports) |
1052 | goto error; |
1053 | spin_lock_irqsave(&isp116x->lock, flags); |
1054 | tmp = isp116x_read_reg32(isp116x, reg: (--wIndex) ? HCRHPORT2 : HCRHPORT1); |
1055 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1056 | *(__le32 *) buf = cpu_to_le32(tmp); |
1057 | DBG("GetPortStatus: port[%d] %08x\n" , wIndex + 1, tmp); |
1058 | break; |
1059 | case ClearPortFeature: |
1060 | DBG("ClearPortFeature: " ); |
1061 | if (!wIndex || wIndex > ports) |
1062 | goto error; |
1063 | wIndex--; |
1064 | |
1065 | switch (wValue) { |
1066 | case USB_PORT_FEAT_ENABLE: |
1067 | DBG("USB_PORT_FEAT_ENABLE\n" ); |
1068 | tmp = RH_PS_CCS; |
1069 | break; |
1070 | case USB_PORT_FEAT_C_ENABLE: |
1071 | DBG("USB_PORT_FEAT_C_ENABLE\n" ); |
1072 | tmp = RH_PS_PESC; |
1073 | break; |
1074 | case USB_PORT_FEAT_SUSPEND: |
1075 | DBG("USB_PORT_FEAT_SUSPEND\n" ); |
1076 | tmp = RH_PS_POCI; |
1077 | break; |
1078 | case USB_PORT_FEAT_C_SUSPEND: |
1079 | DBG("USB_PORT_FEAT_C_SUSPEND\n" ); |
1080 | tmp = RH_PS_PSSC; |
1081 | break; |
1082 | case USB_PORT_FEAT_POWER: |
1083 | DBG("USB_PORT_FEAT_POWER\n" ); |
1084 | tmp = RH_PS_LSDA; |
1085 | break; |
1086 | case USB_PORT_FEAT_C_CONNECTION: |
1087 | DBG("USB_PORT_FEAT_C_CONNECTION\n" ); |
1088 | tmp = RH_PS_CSC; |
1089 | break; |
1090 | case USB_PORT_FEAT_C_OVER_CURRENT: |
1091 | DBG("USB_PORT_FEAT_C_OVER_CURRENT\n" ); |
1092 | tmp = RH_PS_OCIC; |
1093 | break; |
1094 | case USB_PORT_FEAT_C_RESET: |
1095 | DBG("USB_PORT_FEAT_C_RESET\n" ); |
1096 | tmp = RH_PS_PRSC; |
1097 | break; |
1098 | default: |
1099 | goto error; |
1100 | } |
1101 | spin_lock_irqsave(&isp116x->lock, flags); |
1102 | isp116x_write_reg32(isp116x, reg: wIndex |
1103 | ? HCRHPORT2 : HCRHPORT1, val: tmp); |
1104 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1105 | break; |
1106 | case SetPortFeature: |
1107 | DBG("SetPortFeature: " ); |
1108 | if (!wIndex || wIndex > ports) |
1109 | goto error; |
1110 | wIndex--; |
1111 | switch (wValue) { |
1112 | case USB_PORT_FEAT_SUSPEND: |
1113 | DBG("USB_PORT_FEAT_SUSPEND\n" ); |
1114 | spin_lock_irqsave(&isp116x->lock, flags); |
1115 | isp116x_write_reg32(isp116x, reg: wIndex |
1116 | ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS); |
1117 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1118 | break; |
1119 | case USB_PORT_FEAT_POWER: |
1120 | DBG("USB_PORT_FEAT_POWER\n" ); |
1121 | spin_lock_irqsave(&isp116x->lock, flags); |
1122 | isp116x_write_reg32(isp116x, reg: wIndex |
1123 | ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS); |
1124 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1125 | break; |
1126 | case USB_PORT_FEAT_RESET: |
1127 | DBG("USB_PORT_FEAT_RESET\n" ); |
1128 | root_port_reset(isp116x, port: wIndex); |
1129 | break; |
1130 | default: |
1131 | goto error; |
1132 | } |
1133 | break; |
1134 | |
1135 | default: |
1136 | error: |
1137 | /* "protocol stall" on error */ |
1138 | DBG("PROTOCOL STALL\n" ); |
1139 | ret = -EPIPE; |
1140 | } |
1141 | return ret; |
1142 | } |
1143 | |
1144 | /*-----------------------------------------------------------------*/ |
1145 | |
1146 | #ifdef CONFIG_DEBUG_FS |
1147 | |
1148 | static void dump_irq(struct seq_file *s, char *label, u16 mask) |
1149 | { |
1150 | seq_printf(m: s, fmt: "%s %04x%s%s%s%s%s%s\n" , label, mask, |
1151 | mask & HCuPINT_CLKRDY ? " clkrdy" : "" , |
1152 | mask & HCuPINT_SUSP ? " susp" : "" , |
1153 | mask & HCuPINT_OPR ? " opr" : "" , |
1154 | mask & HCuPINT_AIIEOT ? " eot" : "" , |
1155 | mask & HCuPINT_ATL ? " atl" : "" , |
1156 | mask & HCuPINT_SOF ? " sof" : "" ); |
1157 | } |
1158 | |
1159 | static void dump_int(struct seq_file *s, char *label, u32 mask) |
1160 | { |
1161 | seq_printf(m: s, fmt: "%s %08x%s%s%s%s%s%s%s\n" , label, mask, |
1162 | mask & HCINT_MIE ? " MIE" : "" , |
1163 | mask & HCINT_RHSC ? " rhsc" : "" , |
1164 | mask & HCINT_FNO ? " fno" : "" , |
1165 | mask & HCINT_UE ? " ue" : "" , |
1166 | mask & HCINT_RD ? " rd" : "" , |
1167 | mask & HCINT_SF ? " sof" : "" , mask & HCINT_SO ? " so" : "" ); |
1168 | } |
1169 | |
1170 | static int isp116x_debug_show(struct seq_file *s, void *unused) |
1171 | { |
1172 | struct isp116x *isp116x = s->private; |
1173 | |
1174 | seq_printf(m: s, fmt: "%s\n%s version %s\n" , |
1175 | isp116x_to_hcd(isp116x)->product_desc, hcd_name, |
1176 | DRIVER_VERSION); |
1177 | |
1178 | if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) { |
1179 | seq_printf(m: s, fmt: "HCD is suspended\n" ); |
1180 | return 0; |
1181 | } |
1182 | if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) { |
1183 | seq_printf(m: s, fmt: "HCD not running\n" ); |
1184 | return 0; |
1185 | } |
1186 | |
1187 | spin_lock_irq(lock: &isp116x->lock); |
1188 | dump_irq(s, label: "hc_irq_enable" , mask: isp116x_read_reg16(isp116x, HCuPINTENB)); |
1189 | dump_irq(s, label: "hc_irq_status" , mask: isp116x_read_reg16(isp116x, HCuPINT)); |
1190 | dump_int(s, label: "hc_int_enable" , mask: isp116x_read_reg32(isp116x, HCINTENB)); |
1191 | dump_int(s, label: "hc_int_status" , mask: isp116x_read_reg32(isp116x, HCINTSTAT)); |
1192 | isp116x_show_regs_seq(isp116x, s); |
1193 | spin_unlock_irq(lock: &isp116x->lock); |
1194 | seq_printf(m: s, fmt: "\n" ); |
1195 | |
1196 | return 0; |
1197 | } |
1198 | DEFINE_SHOW_ATTRIBUTE(isp116x_debug); |
1199 | |
1200 | static void create_debug_file(struct isp116x *isp116x) |
1201 | { |
1202 | debugfs_create_file(name: hcd_name, S_IRUGO, parent: usb_debug_root, data: isp116x, |
1203 | fops: &isp116x_debug_fops); |
1204 | } |
1205 | |
1206 | static void remove_debug_file(struct isp116x *isp116x) |
1207 | { |
1208 | debugfs_lookup_and_remove(name: hcd_name, parent: usb_debug_root); |
1209 | } |
1210 | |
1211 | #else |
1212 | |
1213 | static inline void create_debug_file(struct isp116x *isp116x) { } |
1214 | static inline void remove_debug_file(struct isp116x *isp116x) { } |
1215 | |
1216 | #endif /* CONFIG_DEBUG_FS */ |
1217 | |
1218 | /*-----------------------------------------------------------------*/ |
1219 | |
1220 | /* |
1221 | Software reset - can be called from any contect. |
1222 | */ |
1223 | static int isp116x_sw_reset(struct isp116x *isp116x) |
1224 | { |
1225 | int retries = 15; |
1226 | unsigned long flags; |
1227 | int ret = 0; |
1228 | |
1229 | spin_lock_irqsave(&isp116x->lock, flags); |
1230 | isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC); |
1231 | isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR); |
1232 | while (--retries) { |
1233 | /* It usually resets within 1 ms */ |
1234 | mdelay(1); |
1235 | if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR)) |
1236 | break; |
1237 | } |
1238 | if (!retries) { |
1239 | ERR("Software reset timeout\n" ); |
1240 | ret = -ETIME; |
1241 | } |
1242 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1243 | return ret; |
1244 | } |
1245 | |
1246 | static int isp116x_reset(struct usb_hcd *hcd) |
1247 | { |
1248 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1249 | unsigned long t; |
1250 | u16 clkrdy = 0; |
1251 | int ret, timeout = 15 /* ms */ ; |
1252 | |
1253 | ret = isp116x_sw_reset(isp116x); |
1254 | if (ret) |
1255 | return ret; |
1256 | |
1257 | t = jiffies + msecs_to_jiffies(m: timeout); |
1258 | while (time_before_eq(jiffies, t)) { |
1259 | msleep(msecs: 4); |
1260 | spin_lock_irq(lock: &isp116x->lock); |
1261 | clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY; |
1262 | spin_unlock_irq(lock: &isp116x->lock); |
1263 | if (clkrdy) |
1264 | break; |
1265 | } |
1266 | if (!clkrdy) { |
1267 | ERR("Clock not ready after %dms\n" , timeout); |
1268 | /* After sw_reset the clock won't report to be ready, if |
1269 | H_WAKEUP pin is high. */ |
1270 | ERR("Please make sure that the H_WAKEUP pin is pulled low!\n" ); |
1271 | ret = -ENODEV; |
1272 | } |
1273 | return ret; |
1274 | } |
1275 | |
1276 | static void isp116x_stop(struct usb_hcd *hcd) |
1277 | { |
1278 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1279 | unsigned long flags; |
1280 | u32 val; |
1281 | |
1282 | spin_lock_irqsave(&isp116x->lock, flags); |
1283 | isp116x_write_reg16(isp116x, HCuPINTENB, val: 0); |
1284 | |
1285 | /* Switch off ports' power, some devices don't come up |
1286 | after next 'insmod' without this */ |
1287 | val = isp116x_read_reg32(isp116x, HCRHDESCA); |
1288 | val &= ~(RH_A_NPS | RH_A_PSM); |
1289 | isp116x_write_reg32(isp116x, HCRHDESCA, val); |
1290 | isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS); |
1291 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1292 | |
1293 | isp116x_sw_reset(isp116x); |
1294 | } |
1295 | |
1296 | /* |
1297 | Configure the chip. The chip must be successfully reset by now. |
1298 | */ |
1299 | static int isp116x_start(struct usb_hcd *hcd) |
1300 | { |
1301 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1302 | struct isp116x_platform_data *board = isp116x->board; |
1303 | u32 val; |
1304 | unsigned long flags; |
1305 | |
1306 | spin_lock_irqsave(&isp116x->lock, flags); |
1307 | |
1308 | /* clear interrupt status and disable all interrupt sources */ |
1309 | isp116x_write_reg16(isp116x, HCuPINT, val: 0xff); |
1310 | isp116x_write_reg16(isp116x, HCuPINTENB, val: 0); |
1311 | |
1312 | val = isp116x_read_reg16(isp116x, HCCHIPID); |
1313 | if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) { |
1314 | ERR("Invalid chip ID %04x\n" , val); |
1315 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1316 | return -ENODEV; |
1317 | } |
1318 | |
1319 | /* To be removed in future */ |
1320 | hcd->uses_new_polling = 1; |
1321 | |
1322 | isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE); |
1323 | isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE); |
1324 | |
1325 | /* ----- HW conf */ |
1326 | val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1); |
1327 | if (board->sel15Kres) |
1328 | val |= HCHWCFG_15KRSEL; |
1329 | /* Remote wakeup won't work without working clock */ |
1330 | if (board->remote_wakeup_enable) |
1331 | val |= HCHWCFG_CLKNOTSTOP; |
1332 | if (board->oc_enable) |
1333 | val |= HCHWCFG_ANALOG_OC; |
1334 | if (board->int_act_high) |
1335 | val |= HCHWCFG_INT_POL; |
1336 | if (board->int_edge_triggered) |
1337 | val |= HCHWCFG_INT_TRIGGER; |
1338 | isp116x_write_reg16(isp116x, HCHWCFG, val); |
1339 | |
1340 | /* ----- Root hub conf */ |
1341 | val = (25 << 24) & RH_A_POTPGT; |
1342 | /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to |
1343 | be always set. Yet, instead, we request individual port |
1344 | power switching. */ |
1345 | val |= RH_A_PSM; |
1346 | /* Report overcurrent per port */ |
1347 | val |= RH_A_OCPM; |
1348 | isp116x_write_reg32(isp116x, HCRHDESCA, val); |
1349 | isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA); |
1350 | |
1351 | val = RH_B_PPCM; |
1352 | isp116x_write_reg32(isp116x, HCRHDESCB, val); |
1353 | isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB); |
1354 | |
1355 | val = 0; |
1356 | if (board->remote_wakeup_enable) { |
1357 | if (!device_can_wakeup(dev: hcd->self.controller)) |
1358 | device_init_wakeup(dev: hcd->self.controller, enable: 1); |
1359 | val |= RH_HS_DRWE; |
1360 | } |
1361 | isp116x_write_reg32(isp116x, HCRHSTATUS, val); |
1362 | isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS); |
1363 | |
1364 | isp116x_write_reg32(isp116x, HCFMINTVL, val: 0x27782edf); |
1365 | |
1366 | hcd->state = HC_STATE_RUNNING; |
1367 | |
1368 | /* Set up interrupts */ |
1369 | isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE; |
1370 | if (board->remote_wakeup_enable) |
1371 | isp116x->intenb |= HCINT_RD; |
1372 | isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */ |
1373 | isp116x_write_reg32(isp116x, HCINTENB, val: isp116x->intenb); |
1374 | isp116x_write_reg16(isp116x, HCuPINTENB, val: isp116x->irqenb); |
1375 | |
1376 | /* Go operational */ |
1377 | val = HCCONTROL_USB_OPER; |
1378 | if (board->remote_wakeup_enable) |
1379 | val |= HCCONTROL_RWE; |
1380 | isp116x_write_reg32(isp116x, HCCONTROL, val); |
1381 | |
1382 | /* Disable ports to avoid race in device enumeration */ |
1383 | isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS); |
1384 | isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS); |
1385 | |
1386 | isp116x_show_regs_log(isp116x); |
1387 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1388 | return 0; |
1389 | } |
1390 | |
1391 | #ifdef CONFIG_PM |
1392 | |
1393 | static int isp116x_bus_suspend(struct usb_hcd *hcd) |
1394 | { |
1395 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1396 | unsigned long flags; |
1397 | u32 val; |
1398 | int ret = 0; |
1399 | |
1400 | spin_lock_irqsave(&isp116x->lock, flags); |
1401 | val = isp116x_read_reg32(isp116x, HCCONTROL); |
1402 | |
1403 | switch (val & HCCONTROL_HCFS) { |
1404 | case HCCONTROL_USB_OPER: |
1405 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1406 | val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE); |
1407 | val |= HCCONTROL_USB_SUSPEND; |
1408 | if (hcd->self.root_hub->do_remote_wakeup) |
1409 | val |= HCCONTROL_RWE; |
1410 | /* Wait for usb transfers to finish */ |
1411 | msleep(msecs: 2); |
1412 | spin_lock_irqsave(&isp116x->lock, flags); |
1413 | isp116x_write_reg32(isp116x, HCCONTROL, val); |
1414 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1415 | /* Wait for devices to suspend */ |
1416 | msleep(msecs: 5); |
1417 | break; |
1418 | case HCCONTROL_USB_RESUME: |
1419 | isp116x_write_reg32(isp116x, HCCONTROL, |
1420 | val: (val & ~HCCONTROL_HCFS) | |
1421 | HCCONTROL_USB_RESET); |
1422 | fallthrough; |
1423 | case HCCONTROL_USB_RESET: |
1424 | ret = -EBUSY; |
1425 | fallthrough; |
1426 | default: /* HCCONTROL_USB_SUSPEND */ |
1427 | spin_unlock_irqrestore(lock: &isp116x->lock, flags); |
1428 | break; |
1429 | } |
1430 | |
1431 | return ret; |
1432 | } |
1433 | |
1434 | static int isp116x_bus_resume(struct usb_hcd *hcd) |
1435 | { |
1436 | struct isp116x *isp116x = hcd_to_isp116x(hcd); |
1437 | u32 val; |
1438 | |
1439 | msleep(msecs: 5); |
1440 | spin_lock_irq(lock: &isp116x->lock); |
1441 | |
1442 | val = isp116x_read_reg32(isp116x, HCCONTROL); |
1443 | switch (val & HCCONTROL_HCFS) { |
1444 | case HCCONTROL_USB_SUSPEND: |
1445 | val &= ~HCCONTROL_HCFS; |
1446 | val |= HCCONTROL_USB_RESUME; |
1447 | isp116x_write_reg32(isp116x, HCCONTROL, val); |
1448 | break; |
1449 | case HCCONTROL_USB_RESUME: |
1450 | break; |
1451 | case HCCONTROL_USB_OPER: |
1452 | spin_unlock_irq(lock: &isp116x->lock); |
1453 | return 0; |
1454 | default: |
1455 | /* HCCONTROL_USB_RESET: this may happen, when during |
1456 | suspension the HC lost power. Reinitialize completely */ |
1457 | spin_unlock_irq(lock: &isp116x->lock); |
1458 | DBG("Chip has been reset while suspended. Reinit from scratch.\n" ); |
1459 | isp116x_reset(hcd); |
1460 | isp116x_start(hcd); |
1461 | isp116x_hub_control(hcd, SetPortFeature, |
1462 | USB_PORT_FEAT_POWER, wIndex: 1, NULL, wLength: 0); |
1463 | if ((isp116x->rhdesca & RH_A_NDP) == 2) |
1464 | isp116x_hub_control(hcd, SetPortFeature, |
1465 | USB_PORT_FEAT_POWER, wIndex: 2, NULL, wLength: 0); |
1466 | return 0; |
1467 | } |
1468 | |
1469 | val = isp116x->rhdesca & RH_A_NDP; |
1470 | while (val--) { |
1471 | u32 stat = |
1472 | isp116x_read_reg32(isp116x, reg: val ? HCRHPORT2 : HCRHPORT1); |
1473 | /* force global, not selective, resume */ |
1474 | if (!(stat & RH_PS_PSS)) |
1475 | continue; |
1476 | DBG("%s: Resuming port %d\n" , __func__, val); |
1477 | isp116x_write_reg32(isp116x, RH_PS_POCI, val: val |
1478 | ? HCRHPORT2 : HCRHPORT1); |
1479 | } |
1480 | spin_unlock_irq(lock: &isp116x->lock); |
1481 | |
1482 | hcd->state = HC_STATE_RESUMING; |
1483 | msleep(USB_RESUME_TIMEOUT); |
1484 | |
1485 | /* Go operational */ |
1486 | spin_lock_irq(lock: &isp116x->lock); |
1487 | val = isp116x_read_reg32(isp116x, HCCONTROL); |
1488 | isp116x_write_reg32(isp116x, HCCONTROL, |
1489 | val: (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER); |
1490 | spin_unlock_irq(lock: &isp116x->lock); |
1491 | hcd->state = HC_STATE_RUNNING; |
1492 | |
1493 | return 0; |
1494 | } |
1495 | |
1496 | #else |
1497 | |
1498 | #define isp116x_bus_suspend NULL |
1499 | #define isp116x_bus_resume NULL |
1500 | |
1501 | #endif |
1502 | |
1503 | static const struct hc_driver isp116x_hc_driver = { |
1504 | .description = hcd_name, |
1505 | .product_desc = "ISP116x Host Controller" , |
1506 | .hcd_priv_size = sizeof(struct isp116x), |
1507 | |
1508 | .irq = isp116x_irq, |
1509 | .flags = HCD_USB11, |
1510 | |
1511 | .reset = isp116x_reset, |
1512 | .start = isp116x_start, |
1513 | .stop = isp116x_stop, |
1514 | |
1515 | .urb_enqueue = isp116x_urb_enqueue, |
1516 | .urb_dequeue = isp116x_urb_dequeue, |
1517 | .endpoint_disable = isp116x_endpoint_disable, |
1518 | |
1519 | .get_frame_number = isp116x_get_frame, |
1520 | |
1521 | .hub_status_data = isp116x_hub_status_data, |
1522 | .hub_control = isp116x_hub_control, |
1523 | .bus_suspend = isp116x_bus_suspend, |
1524 | .bus_resume = isp116x_bus_resume, |
1525 | }; |
1526 | |
1527 | /*----------------------------------------------------------------*/ |
1528 | |
1529 | static void isp116x_remove(struct platform_device *pdev) |
1530 | { |
1531 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
1532 | struct isp116x *isp116x; |
1533 | struct resource *res; |
1534 | |
1535 | if (!hcd) |
1536 | return; |
1537 | isp116x = hcd_to_isp116x(hcd); |
1538 | remove_debug_file(isp116x); |
1539 | usb_remove_hcd(hcd); |
1540 | |
1541 | iounmap(addr: isp116x->data_reg); |
1542 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
1543 | if (res) |
1544 | release_mem_region(res->start, 2); |
1545 | iounmap(addr: isp116x->addr_reg); |
1546 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1547 | if (res) |
1548 | release_mem_region(res->start, 2); |
1549 | |
1550 | usb_put_hcd(hcd); |
1551 | } |
1552 | |
1553 | static int isp116x_probe(struct platform_device *pdev) |
1554 | { |
1555 | struct usb_hcd *hcd; |
1556 | struct isp116x *isp116x; |
1557 | struct resource *addr, *data, *ires; |
1558 | void __iomem *addr_reg; |
1559 | void __iomem *data_reg; |
1560 | int irq; |
1561 | int ret = 0; |
1562 | unsigned long irqflags; |
1563 | |
1564 | if (usb_disabled()) |
1565 | return -ENODEV; |
1566 | |
1567 | if (pdev->num_resources < 3) { |
1568 | ret = -ENODEV; |
1569 | goto err1; |
1570 | } |
1571 | |
1572 | data = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1573 | addr = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
1574 | ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
1575 | |
1576 | if (!addr || !data || !ires) { |
1577 | ret = -ENODEV; |
1578 | goto err1; |
1579 | } |
1580 | |
1581 | irq = ires->start; |
1582 | irqflags = ires->flags & IRQF_TRIGGER_MASK; |
1583 | |
1584 | if (!request_mem_region(addr->start, 2, hcd_name)) { |
1585 | ret = -EBUSY; |
1586 | goto err1; |
1587 | } |
1588 | addr_reg = ioremap(offset: addr->start, size: resource_size(res: addr)); |
1589 | if (addr_reg == NULL) { |
1590 | ret = -ENOMEM; |
1591 | goto err2; |
1592 | } |
1593 | if (!request_mem_region(data->start, 2, hcd_name)) { |
1594 | ret = -EBUSY; |
1595 | goto err3; |
1596 | } |
1597 | data_reg = ioremap(offset: data->start, size: resource_size(res: data)); |
1598 | if (data_reg == NULL) { |
1599 | ret = -ENOMEM; |
1600 | goto err4; |
1601 | } |
1602 | |
1603 | /* allocate and initialize hcd */ |
1604 | hcd = usb_create_hcd(driver: &isp116x_hc_driver, dev: &pdev->dev, bus_name: dev_name(dev: &pdev->dev)); |
1605 | if (!hcd) { |
1606 | ret = -ENOMEM; |
1607 | goto err5; |
1608 | } |
1609 | /* this rsrc_start is bogus */ |
1610 | hcd->rsrc_start = addr->start; |
1611 | isp116x = hcd_to_isp116x(hcd); |
1612 | isp116x->data_reg = data_reg; |
1613 | isp116x->addr_reg = addr_reg; |
1614 | spin_lock_init(&isp116x->lock); |
1615 | INIT_LIST_HEAD(list: &isp116x->async); |
1616 | isp116x->board = dev_get_platdata(dev: &pdev->dev); |
1617 | |
1618 | if (!isp116x->board) { |
1619 | ERR("Platform data structure not initialized\n" ); |
1620 | ret = -ENODEV; |
1621 | goto err6; |
1622 | } |
1623 | if (isp116x_check_platform_delay(isp116x)) { |
1624 | ERR("USE_PLATFORM_DELAY defined, but delay function not " |
1625 | "implemented.\n" ); |
1626 | ERR("See comments in drivers/usb/host/isp116x-hcd.c\n" ); |
1627 | ret = -ENODEV; |
1628 | goto err6; |
1629 | } |
1630 | |
1631 | ret = usb_add_hcd(hcd, irqnum: irq, irqflags); |
1632 | if (ret) |
1633 | goto err6; |
1634 | |
1635 | device_wakeup_enable(dev: hcd->self.controller); |
1636 | |
1637 | create_debug_file(isp116x); |
1638 | |
1639 | return 0; |
1640 | |
1641 | err6: |
1642 | usb_put_hcd(hcd); |
1643 | err5: |
1644 | iounmap(addr: data_reg); |
1645 | err4: |
1646 | release_mem_region(data->start, 2); |
1647 | err3: |
1648 | iounmap(addr: addr_reg); |
1649 | err2: |
1650 | release_mem_region(addr->start, 2); |
1651 | err1: |
1652 | ERR("init error, %d\n" , ret); |
1653 | return ret; |
1654 | } |
1655 | |
1656 | #ifdef CONFIG_PM |
1657 | /* |
1658 | Suspend of platform device |
1659 | */ |
1660 | static int isp116x_suspend(struct platform_device *dev, pm_message_t state) |
1661 | { |
1662 | VDBG("%s: state %x\n" , __func__, state.event); |
1663 | return 0; |
1664 | } |
1665 | |
1666 | /* |
1667 | Resume platform device |
1668 | */ |
1669 | static int isp116x_resume(struct platform_device *dev) |
1670 | { |
1671 | VDBG("%s\n" , __func__); |
1672 | return 0; |
1673 | } |
1674 | |
1675 | #else |
1676 | |
1677 | #define isp116x_suspend NULL |
1678 | #define isp116x_resume NULL |
1679 | |
1680 | #endif |
1681 | |
1682 | /* work with hotplug and coldplug */ |
1683 | MODULE_ALIAS("platform:isp116x-hcd" ); |
1684 | |
1685 | static struct platform_driver isp116x_driver = { |
1686 | .probe = isp116x_probe, |
1687 | .remove_new = isp116x_remove, |
1688 | .suspend = isp116x_suspend, |
1689 | .resume = isp116x_resume, |
1690 | .driver = { |
1691 | .name = hcd_name, |
1692 | }, |
1693 | }; |
1694 | |
1695 | module_platform_driver(isp116x_driver); |
1696 | |