1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Renesas USB driver RZ/A initialization and power control |
4 | * |
5 | * Copyright (C) 2018 Chris Brandt |
6 | * Copyright (C) 2018-2019 Renesas Electronics Corporation |
7 | */ |
8 | |
9 | #include <linux/delay.h> |
10 | #include <linux/io.h> |
11 | #include <linux/of.h> |
12 | #include "common.h" |
13 | #include "rza.h" |
14 | |
15 | static int usbhs_rza1_hardware_init(struct platform_device *pdev) |
16 | { |
17 | struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); |
18 | struct device_node *usb_x1_clk, *extal_clk; |
19 | u32 freq_usb = 0, freq_extal = 0; |
20 | |
21 | /* Input Clock Selection (NOTE: ch0 controls both ch0 and ch1) */ |
22 | usb_x1_clk = of_find_node_by_name(NULL, name: "usb_x1" ); |
23 | extal_clk = of_find_node_by_name(NULL, name: "extal" ); |
24 | of_property_read_u32(np: usb_x1_clk, propname: "clock-frequency" , out_value: &freq_usb); |
25 | of_property_read_u32(np: extal_clk, propname: "clock-frequency" , out_value: &freq_extal); |
26 | |
27 | of_node_put(node: usb_x1_clk); |
28 | of_node_put(node: extal_clk); |
29 | |
30 | if (freq_usb == 0) { |
31 | if (freq_extal == 12000000) { |
32 | /* Select 12MHz XTAL */ |
33 | usbhs_bset(priv, SYSCFG, UCKSEL, UCKSEL); |
34 | } else { |
35 | dev_err(usbhs_priv_to_dev(priv), "A 48MHz USB clock or 12MHz main clock is required.\n" ); |
36 | return -EIO; |
37 | } |
38 | } |
39 | |
40 | /* Enable USB PLL (NOTE: ch0 controls both ch0 and ch1) */ |
41 | usbhs_bset(priv, SYSCFG, UPLLE, UPLLE); |
42 | usleep_range(min: 1000, max: 2000); |
43 | usbhs_bset(priv, SUSPMODE, SUSPM, SUSPM); |
44 | |
45 | return 0; |
46 | } |
47 | |
48 | const struct renesas_usbhs_platform_info usbhs_rza1_plat_info = { |
49 | .platform_callback = { |
50 | .hardware_init = usbhs_rza1_hardware_init, |
51 | .get_id = usbhs_get_id_as_gadget, |
52 | }, |
53 | .driver_param = { |
54 | .has_new_pipe_configs = 1, |
55 | }, |
56 | }; |
57 | |