| 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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| 2 | /* |
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| 3 | * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver |
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| 4 | * |
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| 5 | * Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch) |
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| 6 | * |
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| 7 | * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No. |
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| 8 | * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin |
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| 9 | * Model No. U232-P9). See http://www.mct.com.tw/products/product_us232.html |
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| 10 | * for further information. The properties of this device are listed at the end |
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| 11 | * of this file. This device was used in the Dlink DSB-S25. |
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| 12 | * |
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| 13 | * All of the information about the device was acquired by using SniffUSB |
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| 14 | * on Windows98. The technical details of the reverse engineering are |
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| 15 | * summarized at the end of this file. |
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| 16 | */ |
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| 17 | |
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| 18 | #ifndef __LINUX_USB_SERIAL_MCT_U232_H |
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| 19 | #define __LINUX_USB_SERIAL_MCT_U232_H |
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| 20 | |
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| 21 | #define MCT_U232_VID 0x0711 /* Vendor Id */ |
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| 22 | #define MCT_U232_PID 0x0210 /* Original MCT Product Id */ |
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| 23 | |
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| 24 | /* U232-P25, Sitecom */ |
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| 25 | #define MCT_U232_SITECOM_PID 0x0230 /* Sitecom Product Id */ |
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| 26 | |
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| 27 | /* DU-H3SP USB BAY hub */ |
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| 28 | #define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */ |
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| 29 | |
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| 30 | /* Belkin badge the MCT U232-P9 as the F5U109 */ |
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| 31 | #define MCT_U232_BELKIN_F5U109_VID 0x050d /* Vendor Id */ |
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| 32 | #define MCT_U232_BELKIN_F5U109_PID 0x0109 /* Product Id */ |
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| 33 | |
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| 34 | /* |
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| 35 | * Vendor Request Interface |
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| 36 | */ |
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| 37 | #define MCT_U232_SET_REQUEST_TYPE 0x40 |
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| 38 | #define MCT_U232_GET_REQUEST_TYPE 0xc0 |
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| 39 | |
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| 40 | /* Get Modem Status Register (MSR) */ |
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| 41 | #define MCT_U232_GET_MODEM_STAT_REQUEST 2 |
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| 42 | #define MCT_U232_GET_MODEM_STAT_SIZE 1 |
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| 43 | |
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| 44 | /* Get Line Control Register (LCR) */ |
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| 45 | /* ... not used by this driver */ |
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| 46 | #define MCT_U232_GET_LINE_CTRL_REQUEST 6 |
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| 47 | #define MCT_U232_GET_LINE_CTRL_SIZE 1 |
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| 48 | |
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| 49 | /* Set Baud Rate Divisor */ |
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| 50 | #define MCT_U232_SET_BAUD_RATE_REQUEST 5 |
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| 51 | #define MCT_U232_SET_BAUD_RATE_SIZE 4 |
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| 52 | |
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| 53 | /* Set Line Control Register (LCR) */ |
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| 54 | #define MCT_U232_SET_LINE_CTRL_REQUEST 7 |
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| 55 | #define MCT_U232_SET_LINE_CTRL_SIZE 1 |
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| 56 | |
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| 57 | /* Set Modem Control Register (MCR) */ |
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| 58 | #define MCT_U232_SET_MODEM_CTRL_REQUEST 10 |
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| 59 | #define MCT_U232_SET_MODEM_CTRL_SIZE 1 |
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| 60 | |
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| 61 | /* |
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| 62 | * This USB device request code is not well understood. It is transmitted by |
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| 63 | * the MCT-supplied Windows driver whenever the baud rate changes. |
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| 64 | */ |
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| 65 | #define MCT_U232_SET_UNKNOWN1_REQUEST 11 /* Unknown functionality */ |
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| 66 | #define MCT_U232_SET_UNKNOWN1_SIZE 1 |
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| 67 | |
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| 68 | /* |
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| 69 | * This USB device request code appears to control whether CTS is required |
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| 70 | * during transmission. |
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| 71 | * |
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| 72 | * Sending a zero byte allows data transmission to a device which is not |
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| 73 | * asserting CTS. Sending a '1' byte will cause transmission to be deferred |
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| 74 | * until the device asserts CTS. |
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| 75 | */ |
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| 76 | #define MCT_U232_SET_CTS_REQUEST 12 |
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| 77 | #define MCT_U232_SET_CTS_SIZE 1 |
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| 78 | |
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| 79 | #define MCT_U232_MAX_SIZE 4 /* of MCT_XXX_SIZE */ |
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| 80 | |
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| 81 | /* |
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| 82 | * Baud rate (divisor) |
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| 83 | * Actually, there are two of them, MCT website calls them "Philips solution" |
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| 84 | * and "Intel solution". They are the regular MCT and "Sitecom" for us. |
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| 85 | * This is pointless to document in the header, see the code for the bits. |
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| 86 | */ |
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| 87 | static int mct_u232_calculate_baud_rate(struct usb_serial *serial, |
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| 88 | speed_t value, speed_t *result); |
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| 89 | |
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| 90 | /* |
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| 91 | * Line Control Register (LCR) |
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| 92 | */ |
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| 93 | #define MCT_U232_SET_BREAK 0x40 |
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| 94 | |
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| 95 | #define MCT_U232_PARITY_SPACE 0x38 |
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| 96 | #define MCT_U232_PARITY_MARK 0x28 |
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| 97 | #define MCT_U232_PARITY_EVEN 0x18 |
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| 98 | #define MCT_U232_PARITY_ODD 0x08 |
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| 99 | #define MCT_U232_PARITY_NONE 0x00 |
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| 100 | |
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| 101 | #define MCT_U232_DATA_BITS_5 0x00 |
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| 102 | #define MCT_U232_DATA_BITS_6 0x01 |
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| 103 | #define MCT_U232_DATA_BITS_7 0x02 |
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| 104 | #define MCT_U232_DATA_BITS_8 0x03 |
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| 105 | |
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| 106 | #define MCT_U232_STOP_BITS_2 0x04 |
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| 107 | #define MCT_U232_STOP_BITS_1 0x00 |
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| 108 | |
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| 109 | /* |
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| 110 | * Modem Control Register (MCR) |
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| 111 | */ |
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| 112 | #define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */ |
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| 113 | #define MCT_U232_MCR_RTS 0xa /* Activate RTS */ |
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| 114 | #define MCT_U232_MCR_DTR 0x9 /* Activate DTR */ |
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| 115 | |
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| 116 | /* |
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| 117 | * Modem Status Register (MSR) |
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| 118 | */ |
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| 119 | #define MCT_U232_MSR_INDEX 0x0 /* data[index] */ |
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| 120 | #define MCT_U232_MSR_CD 0x80 /* Current CD */ |
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| 121 | #define MCT_U232_MSR_RI 0x40 /* Current RI */ |
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| 122 | #define MCT_U232_MSR_DSR 0x20 /* Current DSR */ |
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| 123 | #define MCT_U232_MSR_CTS 0x10 /* Current CTS */ |
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| 124 | #define MCT_U232_MSR_DCD 0x08 /* Delta CD */ |
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| 125 | #define MCT_U232_MSR_DRI 0x04 /* Delta RI */ |
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| 126 | #define MCT_U232_MSR_DDSR 0x02 /* Delta DSR */ |
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| 127 | #define MCT_U232_MSR_DCTS 0x01 /* Delta CTS */ |
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| 128 | |
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| 129 | /* |
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| 130 | * Line Status Register (LSR) |
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| 131 | */ |
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| 132 | #define MCT_U232_LSR_INDEX 1 /* data[index] */ |
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| 133 | #define MCT_U232_LSR_ERR 0x80 /* OE | PE | FE | BI */ |
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| 134 | #define MCT_U232_LSR_TEMT 0x40 /* transmit register empty */ |
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| 135 | #define MCT_U232_LSR_THRE 0x20 /* transmit holding register empty */ |
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| 136 | #define MCT_U232_LSR_BI 0x10 /* break indicator */ |
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| 137 | #define MCT_U232_LSR_FE 0x08 /* framing error */ |
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| 138 | #define MCT_U232_LSR_OE 0x02 /* overrun error */ |
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| 139 | #define MCT_U232_LSR_PE 0x04 /* parity error */ |
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| 140 | #define MCT_U232_LSR_OE 0x02 /* overrun error */ |
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| 141 | #define MCT_U232_LSR_DR 0x01 /* receive data ready */ |
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| 142 | |
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| 143 | |
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| 144 | /* ----------------------------------------------------------------------------- |
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| 145 | * Technical Specification reverse engineered with SniffUSB on Windows98 |
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| 146 | * ===================================================================== |
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| 147 | * |
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| 148 | * The technical details of the device have been acquired be using "SniffUSB" |
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| 149 | * and the vendor-supplied device driver (version 2.3A) under Windows98. To |
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| 150 | * identify the USB vendor-specific requests and to assign them to terminal |
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| 151 | * settings (flow control, baud rate, etc.) the program "SerialSettings" from |
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| 152 | * William G. Greathouse has been proven to be very useful. I also used the |
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| 153 | * Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and |
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| 154 | * observations are summarized below: |
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| 155 | * |
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| 156 | * The USB requests seem to be directly mapped to the registers of a 8250, |
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| 157 | * 16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output |
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| 158 | * devices") contains a comprehensive description of UARTs and its registers. |
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| 159 | * The bit descriptions are actually taken from there. |
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| 160 | * |
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| 161 | * |
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| 162 | * Baud rate (divisor) |
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| 163 | * ------------------- |
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| 164 | * |
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| 165 | * BmRequestType: 0x40 (0100 0000B) |
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| 166 | * bRequest: 0x05 |
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| 167 | * wValue: 0x0000 |
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| 168 | * wIndex: 0x0000 |
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| 169 | * wLength: 0x0004 |
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| 170 | * Data: divisor = 115200 / baud_rate |
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| 171 | * |
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| 172 | * SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4 |
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| 173 | * shown above, observations with a Belkin F5U109 adapter, using the |
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| 174 | * MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for |
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| 175 | * Win98/Me"), show this request has a length of 1 byte, presumably because |
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| 176 | * of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter |
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| 177 | * use a baud-rate code instead of a conventional RS-232 baud rate divisor. |
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| 178 | * The current source code for this driver does not reflect this fact, but |
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| 179 | * the driver works fine with this adapter/driver combination nonetheless. |
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| 180 | * |
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| 181 | * |
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| 182 | * Line Control Register (LCR) |
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| 183 | * --------------------------- |
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| 184 | * |
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| 185 | * BmRequestType: 0x40 (0100 0000B) 0xc0 (1100 0000B) |
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| 186 | * bRequest: 0x07 0x06 |
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| 187 | * wValue: 0x0000 |
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| 188 | * wIndex: 0x0000 |
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| 189 | * wLength: 0x0001 |
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| 190 | * Data: LCR (see below) |
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| 191 | * |
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| 192 | * Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data |
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| 193 | * transmit/receive register (THR/RBR) and the Interrupt Enable Register |
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| 194 | * (IER) is disabled. Any access to these ports is now redirected to the |
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| 195 | * Divisor Latch Registers. Setting this bit, loading the Divisor |
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| 196 | * Registers, and clearing DLAB should be done with interrupts disabled. |
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| 197 | * Bit 6: Set Break. When set to "1", the transmitter begins to transmit |
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| 198 | * continuous Spacing until this bit is set to "0". This overrides any |
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| 199 | * bits of characters that are being transmitted. |
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| 200 | * Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity |
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| 201 | * to always be "1" or "0", based on the value of Bit 4. |
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| 202 | * Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0", |
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| 203 | * setting this bit causes even parity to be transmitted and expected. |
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| 204 | * Otherwise, odd parity is used. |
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| 205 | * Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted |
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| 206 | * between the last bit of the data and the Stop Bit. The UART will also |
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| 207 | * expect parity to be present in the received data. |
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| 208 | * Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words, |
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| 209 | * 1.5 Stop Bits are transmitted and expected in each data word. For |
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| 210 | * 6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected. |
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| 211 | * When this bit is set to "0", one Stop Bit is used on each data word. |
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| 212 | * Bit 1: Word Length Select Bit #1 (WLSB1) |
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| 213 | * Bit 0: Word Length Select Bit #0 (WLSB0) |
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| 214 | * Together these bits specify the number of bits in each data word. |
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| 215 | * 1 0 Word Length |
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| 216 | * 0 0 5 Data Bits |
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| 217 | * 0 1 6 Data Bits |
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| 218 | * 1 0 7 Data Bits |
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| 219 | * 1 1 8 Data Bits |
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| 220 | * |
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| 221 | * SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs |
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| 222 | * in the Win98 driver: the break does not work (bit 6 is not asserted) and the |
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| 223 | * stick parity bit is not cleared when set once. The LCR can also be read |
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| 224 | * back with USB request 6 but this has never been observed with SniffUSB. |
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| 225 | * |
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| 226 | * |
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| 227 | * Modem Control Register (MCR) |
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| 228 | * ---------------------------- |
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| 229 | * |
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| 230 | * BmRequestType: 0x40 (0100 0000B) |
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| 231 | * bRequest: 0x0a |
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| 232 | * wValue: 0x0000 |
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| 233 | * wIndex: 0x0000 |
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| 234 | * wLength: 0x0001 |
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| 235 | * Data: MCR (Bit 4..7, see below) |
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| 236 | * |
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| 237 | * Bit 7: Reserved, always 0. |
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| 238 | * Bit 6: Reserved, always 0. |
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| 239 | * Bit 5: Reserved, always 0. |
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| 240 | * Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver |
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| 241 | * are internally connected together to allow diagnostic operations. In |
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| 242 | * addition, the UART modem control outputs are connected to the UART |
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| 243 | * modem control inputs. CTS is connected to RTS, DTR is connected to |
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| 244 | * DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD. |
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| 245 | * Bit 3: OUT 2. An auxiliary output that the host processor may set high or |
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| 246 | * low. In the IBM PC serial adapter (and most clones), OUT 2 is used |
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| 247 | * to tri-state (disable) the interrupt signal from the |
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| 248 | * 8250/16450/16550 UART. |
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| 249 | * Bit 2: OUT 1. An auxiliary output that the host processor may set high or |
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| 250 | * low. This output is not used on the IBM PC serial adapter. |
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| 251 | * Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS |
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| 252 | * line is Low (Active). |
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| 253 | * Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART |
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| 254 | * -DTR line is Low (Active). |
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| 255 | * |
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| 256 | * SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been |
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| 257 | * seen _always_ set. |
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| 258 | * |
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| 259 | * |
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| 260 | * Modem Status Register (MSR) |
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| 261 | * --------------------------- |
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| 262 | * |
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| 263 | * BmRequestType: 0xc0 (1100 0000B) |
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| 264 | * bRequest: 0x02 |
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| 265 | * wValue: 0x0000 |
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| 266 | * wIndex: 0x0000 |
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| 267 | * wLength: 0x0001 |
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| 268 | * Data: MSR (see below) |
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| 269 | * |
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| 270 | * Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the |
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| 271 | * UART. |
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| 272 | * Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART. |
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| 273 | * Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART. |
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| 274 | * Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART. |
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| 275 | * Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has |
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| 276 | * changed state one more more times since the last time the MSR was |
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| 277 | * read by the host. |
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| 278 | * Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has |
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| 279 | * had a low to high transition since the last time the MSR was read by |
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| 280 | * the host. |
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| 281 | * Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed |
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| 282 | * state one more more times since the last time the MSR was read by the |
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| 283 | * host. |
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| 284 | * Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed |
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| 285 | * state one more times since the last time the MSR was read by the |
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| 286 | * host. |
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| 287 | * |
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| 288 | * SniffUSB observations: the MSR is also returned as first byte on the |
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| 289 | * interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB |
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| 290 | * request to read MSR cannot be applied during normal device operation. |
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| 291 | * |
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| 292 | * |
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| 293 | * Line Status Register (LSR) |
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| 294 | * -------------------------- |
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| 295 | * |
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| 296 | * Bit 7 Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero. |
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| 297 | * This bit is set to "1" when any of the bytes in the FIFO have one |
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| 298 | * or more of the following error conditions: PE, FE, or BI. |
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| 299 | * Bit 6 Transmitter Empty (TEMT). When set to "1", there are no words |
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| 300 | * remaining in the transmit FIFO or the transmit shift register. The |
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| 301 | * transmitter is completely idle. |
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| 302 | * Bit 5 Transmitter Holding Register Empty (THRE). When set to "1", the |
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| 303 | * FIFO (or holding register) now has room for at least one additional |
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| 304 | * word to transmit. The transmitter may still be transmitting when |
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| 305 | * this bit is set to "1". |
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| 306 | * Bit 4 Break Interrupt (BI). The receiver has detected a Break signal. |
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| 307 | * Bit 3 Framing Error (FE). A Start Bit was detected but the Stop Bit did |
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| 308 | * not appear at the expected time. The received word is probably |
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| 309 | * garbled. |
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| 310 | * Bit 2 Parity Error (PE). The parity bit was incorrect for the word |
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| 311 | * received. |
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| 312 | * Bit 1 Overrun Error (OE). A new word was received and there was no room |
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| 313 | * in the receive buffer. The newly-arrived word in the shift register |
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| 314 | * is discarded. On 8250/16450 UARTs, the word in the holding register |
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| 315 | * is discarded and the newly- arrived word is put in the holding |
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| 316 | * register. |
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| 317 | * Bit 0 Data Ready (DR). One or more words are in the receive FIFO that the |
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| 318 | * host may read. A word must be completely received and moved from |
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| 319 | * the shift register into the FIFO (or holding register for |
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| 320 | * 8250/16450 designs) before this bit is set. |
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| 321 | * |
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| 322 | * SniffUSB observations: the LSR is returned as second byte on the |
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| 323 | * interrupt-in endpoint 0x83 to signal error conditions. Such errors have |
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| 324 | * been seen with minicom/zmodem transfers (CRC errors). |
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| 325 | * |
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| 326 | * |
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| 327 | * Unknown #1 |
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| 328 | * ------------------- |
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| 329 | * |
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| 330 | * BmRequestType: 0x40 (0100 0000B) |
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| 331 | * bRequest: 0x0b |
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| 332 | * wValue: 0x0000 |
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| 333 | * wIndex: 0x0000 |
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| 334 | * wLength: 0x0001 |
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| 335 | * Data: 0x00 |
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| 336 | * |
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| 337 | * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver |
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| 338 | * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request |
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| 339 | * occurs immediately after a "Baud rate (divisor)" message. It was not |
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| 340 | * observed at any other time. It is unclear what purpose this message |
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| 341 | * serves. |
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| 342 | * |
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| 343 | * |
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| 344 | * Unknown #2 |
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| 345 | * ------------------- |
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| 346 | * |
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| 347 | * BmRequestType: 0x40 (0100 0000B) |
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| 348 | * bRequest: 0x0c |
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| 349 | * wValue: 0x0000 |
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| 350 | * wIndex: 0x0000 |
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| 351 | * wLength: 0x0001 |
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| 352 | * Data: 0x00 |
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| 353 | * |
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| 354 | * SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver |
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| 355 | * (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request |
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| 356 | * occurs immediately after the 'Unknown #1' message (see above). It was |
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| 357 | * not observed at any other time. It is unclear what other purpose (if |
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| 358 | * any) this message might serve, but without it, the USB/RS-232 adapter |
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| 359 | * will not write to RS-232 devices which do not assert the 'CTS' signal. |
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| 360 | * |
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| 361 | * |
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| 362 | * Flow control |
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| 363 | * ------------ |
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| 364 | * |
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| 365 | * SniffUSB observations: no flow control specific requests have been realized |
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| 366 | * apart from DTR/RTS settings. Both signals are dropped for no flow control |
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| 367 | * but asserted for hardware or software flow control. |
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| 368 | * |
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| 369 | * |
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| 370 | * Endpoint usage |
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| 371 | * -------------- |
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| 372 | * |
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| 373 | * SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint |
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| 374 | * 0x81 is used to transmit and receive characters. The second interrupt-in |
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| 375 | * endpoint 0x83 signals exceptional conditions like modem line changes and |
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| 376 | * errors. The first byte returned is the MSR and the second byte the LSR. |
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| 377 | * |
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| 378 | * |
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| 379 | * Other observations |
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| 380 | * ------------------ |
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| 381 | * |
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| 382 | * Queued bulk transfers like used in visor.c did not work. |
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| 383 | * |
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| 384 | * |
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| 385 | * Properties of the USB device used (as found in /var/log/messages) |
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| 386 | * ----------------------------------------------------------------- |
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| 387 | * |
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| 388 | * Manufacturer: MCT Corporation. |
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| 389 | * Product: USB-232 Interfact Controller |
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| 390 | * SerialNumber: U2S22050 |
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| 391 | * |
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| 392 | * Length = 18 |
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| 393 | * DescriptorType = 01 |
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| 394 | * USB version = 1.00 |
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| 395 | * Vendor:Product = 0711:0210 |
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| 396 | * MaxPacketSize0 = 8 |
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| 397 | * NumConfigurations = 1 |
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| 398 | * Device version = 1.02 |
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| 399 | * Device Class:SubClass:Protocol = 00:00:00 |
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| 400 | * Per-interface classes |
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| 401 | * Configuration: |
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| 402 | * bLength = 9 |
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| 403 | * bDescriptorType = 02 |
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| 404 | * wTotalLength = 0027 |
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| 405 | * bNumInterfaces = 01 |
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| 406 | * bConfigurationValue = 01 |
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| 407 | * iConfiguration = 00 |
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| 408 | * bmAttributes = c0 |
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| 409 | * MaxPower = 100mA |
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| 410 | * |
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| 411 | * Interface: 0 |
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| 412 | * Alternate Setting: 0 |
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| 413 | * bLength = 9 |
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| 414 | * bDescriptorType = 04 |
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| 415 | * bInterfaceNumber = 00 |
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| 416 | * bAlternateSetting = 00 |
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| 417 | * bNumEndpoints = 03 |
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| 418 | * bInterface Class:SubClass:Protocol = 00:00:00 |
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| 419 | * iInterface = 00 |
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| 420 | * Endpoint: |
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| 421 | * bLength = 7 |
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| 422 | * bDescriptorType = 05 |
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| 423 | * bEndpointAddress = 81 (in) |
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| 424 | * bmAttributes = 03 (Interrupt) |
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| 425 | * wMaxPacketSize = 0040 |
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| 426 | * bInterval = 02 |
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| 427 | * Endpoint: |
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| 428 | * bLength = 7 |
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| 429 | * bDescriptorType = 05 |
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| 430 | * bEndpointAddress = 01 (out) |
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| 431 | * bmAttributes = 02 (Bulk) |
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| 432 | * wMaxPacketSize = 0040 |
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| 433 | * bInterval = 00 |
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| 434 | * Endpoint: |
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| 435 | * bLength = 7 |
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| 436 | * bDescriptorType = 05 |
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| 437 | * bEndpointAddress = 83 (in) |
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| 438 | * bmAttributes = 03 (Interrupt) |
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| 439 | * wMaxPacketSize = 0002 |
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| 440 | * bInterval = 02 |
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| 441 | * |
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| 442 | * |
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| 443 | * Hardware details (added by Martin Hamilton, 2001/12/06) |
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| 444 | * ----------------------------------------------------------------- |
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| 445 | * |
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| 446 | * This info was gleaned from opening a Belkin F5U109 DB9 USB serial |
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| 447 | * adaptor, which turns out to simply be a re-badged U232-P9. We |
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| 448 | * know this because there is a sticky label on the circuit board |
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| 449 | * which says "U232-P9" ;-) |
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| 450 | * |
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| 451 | * The circuit board inside the adaptor contains a Philips PDIUSBD12 |
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| 452 | * USB endpoint chip and a Philips P87C52UBAA microcontroller with |
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| 453 | * embedded UART. Exhaustive documentation for these is available at: |
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| 454 | * |
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| 455 | * http://www.semiconductors.philips.com/pip/p87c52ubaa |
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| 456 | * http://www.nxp.com/acrobat_download/various/PDIUSBD12_PROGRAMMING_GUIDE.pdf |
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| 457 | * |
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| 458 | * Thanks to Julian Highfield for the pointer to the Philips database. |
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| 459 | * |
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| 460 | */ |
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| 461 | |
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| 462 | #endif /* __LINUX_USB_SERIAL_MCT_U232_H */ |
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| 463 | |
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| 464 | |
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