1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* |
3 | * Copyright (C) 2015 Broadcom Corporation |
4 | * |
5 | */ |
6 | |
7 | #include <linux/clk.h> |
8 | #include <linux/init.h> |
9 | #include <linux/io.h> |
10 | #include <linux/module.h> |
11 | #include <linux/of.h> |
12 | #include <linux/platform_device.h> |
13 | #include <linux/platform_data/bcm7038_wdt.h> |
14 | #include <linux/pm.h> |
15 | #include <linux/watchdog.h> |
16 | |
17 | #define WDT_START_1 0xff00 |
18 | #define WDT_START_2 0x00ff |
19 | #define WDT_STOP_1 0xee00 |
20 | #define WDT_STOP_2 0x00ee |
21 | |
22 | #define WDT_TIMEOUT_REG 0x0 |
23 | #define WDT_CMD_REG 0x4 |
24 | |
25 | #define WDT_MIN_TIMEOUT 1 /* seconds */ |
26 | #define WDT_DEFAULT_TIMEOUT 30 /* seconds */ |
27 | #define WDT_DEFAULT_RATE 27000000 |
28 | |
29 | struct bcm7038_watchdog { |
30 | void __iomem *base; |
31 | struct watchdog_device wdd; |
32 | u32 rate; |
33 | struct clk *clk; |
34 | }; |
35 | |
36 | static bool nowayout = WATCHDOG_NOWAYOUT; |
37 | |
38 | static inline void bcm7038_wdt_write(u32 value, void __iomem *addr) |
39 | { |
40 | /* MIPS chips strapped for BE will automagically configure the |
41 | * peripheral registers for CPU-native byte order. |
42 | */ |
43 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
44 | __raw_writel(val: value, addr); |
45 | else |
46 | writel_relaxed(value, addr); |
47 | } |
48 | |
49 | static inline u32 bcm7038_wdt_read(void __iomem *addr) |
50 | { |
51 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
52 | return __raw_readl(addr); |
53 | else |
54 | return readl_relaxed(addr); |
55 | } |
56 | |
57 | static void bcm7038_wdt_set_timeout_reg(struct watchdog_device *wdog) |
58 | { |
59 | struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdd: wdog); |
60 | u32 timeout; |
61 | |
62 | timeout = wdt->rate * wdog->timeout; |
63 | |
64 | bcm7038_wdt_write(value: timeout, addr: wdt->base + WDT_TIMEOUT_REG); |
65 | } |
66 | |
67 | static int bcm7038_wdt_ping(struct watchdog_device *wdog) |
68 | { |
69 | struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdd: wdog); |
70 | |
71 | bcm7038_wdt_write(WDT_START_1, addr: wdt->base + WDT_CMD_REG); |
72 | bcm7038_wdt_write(WDT_START_2, addr: wdt->base + WDT_CMD_REG); |
73 | |
74 | return 0; |
75 | } |
76 | |
77 | static int bcm7038_wdt_start(struct watchdog_device *wdog) |
78 | { |
79 | bcm7038_wdt_set_timeout_reg(wdog); |
80 | bcm7038_wdt_ping(wdog); |
81 | |
82 | return 0; |
83 | } |
84 | |
85 | static int bcm7038_wdt_stop(struct watchdog_device *wdog) |
86 | { |
87 | struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdd: wdog); |
88 | |
89 | bcm7038_wdt_write(WDT_STOP_1, addr: wdt->base + WDT_CMD_REG); |
90 | bcm7038_wdt_write(WDT_STOP_2, addr: wdt->base + WDT_CMD_REG); |
91 | |
92 | return 0; |
93 | } |
94 | |
95 | static int bcm7038_wdt_set_timeout(struct watchdog_device *wdog, |
96 | unsigned int t) |
97 | { |
98 | /* Can't modify timeout value if watchdog timer is running */ |
99 | bcm7038_wdt_stop(wdog); |
100 | wdog->timeout = t; |
101 | bcm7038_wdt_start(wdog); |
102 | |
103 | return 0; |
104 | } |
105 | |
106 | static unsigned int bcm7038_wdt_get_timeleft(struct watchdog_device *wdog) |
107 | { |
108 | struct bcm7038_watchdog *wdt = watchdog_get_drvdata(wdd: wdog); |
109 | u32 time_left; |
110 | |
111 | time_left = bcm7038_wdt_read(addr: wdt->base + WDT_CMD_REG); |
112 | |
113 | return time_left / wdt->rate; |
114 | } |
115 | |
116 | static const struct watchdog_info bcm7038_wdt_info = { |
117 | .identity = "Broadcom BCM7038 Watchdog Timer" , |
118 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | |
119 | WDIOF_MAGICCLOSE |
120 | }; |
121 | |
122 | static const struct watchdog_ops bcm7038_wdt_ops = { |
123 | .owner = THIS_MODULE, |
124 | .start = bcm7038_wdt_start, |
125 | .stop = bcm7038_wdt_stop, |
126 | .set_timeout = bcm7038_wdt_set_timeout, |
127 | .get_timeleft = bcm7038_wdt_get_timeleft, |
128 | }; |
129 | |
130 | static int bcm7038_wdt_probe(struct platform_device *pdev) |
131 | { |
132 | struct bcm7038_wdt_platform_data *pdata = pdev->dev.platform_data; |
133 | struct device *dev = &pdev->dev; |
134 | struct bcm7038_watchdog *wdt; |
135 | const char *clk_name = NULL; |
136 | int err; |
137 | |
138 | wdt = devm_kzalloc(dev, size: sizeof(*wdt), GFP_KERNEL); |
139 | if (!wdt) |
140 | return -ENOMEM; |
141 | |
142 | platform_set_drvdata(pdev, data: wdt); |
143 | |
144 | wdt->base = devm_platform_ioremap_resource(pdev, index: 0); |
145 | if (IS_ERR(ptr: wdt->base)) |
146 | return PTR_ERR(ptr: wdt->base); |
147 | |
148 | if (pdata && pdata->clk_name) |
149 | clk_name = pdata->clk_name; |
150 | |
151 | wdt->clk = devm_clk_get_enabled(dev, id: clk_name); |
152 | /* If unable to get clock, use default frequency */ |
153 | if (!IS_ERR(ptr: wdt->clk)) { |
154 | wdt->rate = clk_get_rate(clk: wdt->clk); |
155 | /* Prevent divide-by-zero exception */ |
156 | if (!wdt->rate) |
157 | wdt->rate = WDT_DEFAULT_RATE; |
158 | } else { |
159 | wdt->rate = WDT_DEFAULT_RATE; |
160 | wdt->clk = NULL; |
161 | } |
162 | |
163 | wdt->wdd.info = &bcm7038_wdt_info; |
164 | wdt->wdd.ops = &bcm7038_wdt_ops; |
165 | wdt->wdd.min_timeout = WDT_MIN_TIMEOUT; |
166 | wdt->wdd.timeout = WDT_DEFAULT_TIMEOUT; |
167 | wdt->wdd.max_timeout = 0xffffffff / wdt->rate; |
168 | wdt->wdd.parent = dev; |
169 | watchdog_set_drvdata(wdd: &wdt->wdd, data: wdt); |
170 | |
171 | watchdog_stop_on_reboot(wdd: &wdt->wdd); |
172 | watchdog_stop_on_unregister(wdd: &wdt->wdd); |
173 | err = devm_watchdog_register_device(dev, &wdt->wdd); |
174 | if (err) |
175 | return err; |
176 | |
177 | dev_info(dev, "Registered BCM7038 Watchdog\n" ); |
178 | |
179 | return 0; |
180 | } |
181 | |
182 | static int bcm7038_wdt_suspend(struct device *dev) |
183 | { |
184 | struct bcm7038_watchdog *wdt = dev_get_drvdata(dev); |
185 | |
186 | if (watchdog_active(wdd: &wdt->wdd)) |
187 | return bcm7038_wdt_stop(wdog: &wdt->wdd); |
188 | |
189 | return 0; |
190 | } |
191 | |
192 | static int bcm7038_wdt_resume(struct device *dev) |
193 | { |
194 | struct bcm7038_watchdog *wdt = dev_get_drvdata(dev); |
195 | |
196 | if (watchdog_active(wdd: &wdt->wdd)) |
197 | return bcm7038_wdt_start(wdog: &wdt->wdd); |
198 | |
199 | return 0; |
200 | } |
201 | |
202 | static DEFINE_SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_ops, |
203 | bcm7038_wdt_suspend, bcm7038_wdt_resume); |
204 | |
205 | static const struct of_device_id bcm7038_wdt_match[] = { |
206 | { .compatible = "brcm,bcm6345-wdt" }, |
207 | { .compatible = "brcm,bcm7038-wdt" }, |
208 | {}, |
209 | }; |
210 | MODULE_DEVICE_TABLE(of, bcm7038_wdt_match); |
211 | |
212 | static const struct platform_device_id bcm7038_wdt_devtype[] = { |
213 | { .name = "bcm63xx-wdt" }, |
214 | { /* sentinel */ }, |
215 | }; |
216 | MODULE_DEVICE_TABLE(platform, bcm7038_wdt_devtype); |
217 | |
218 | static struct platform_driver bcm7038_wdt_driver = { |
219 | .probe = bcm7038_wdt_probe, |
220 | .id_table = bcm7038_wdt_devtype, |
221 | .driver = { |
222 | .name = "bcm7038-wdt" , |
223 | .of_match_table = bcm7038_wdt_match, |
224 | .pm = pm_sleep_ptr(&bcm7038_wdt_pm_ops), |
225 | } |
226 | }; |
227 | module_platform_driver(bcm7038_wdt_driver); |
228 | |
229 | module_param(nowayout, bool, 0); |
230 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
231 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")" ); |
232 | MODULE_LICENSE("GPL" ); |
233 | MODULE_DESCRIPTION("Driver for Broadcom 7038 SoCs Watchdog" ); |
234 | MODULE_AUTHOR("Justin Chen" ); |
235 | |