1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Copyright (c) 2015 HiSilicon Technologies Co., Ltd. |
4 | */ |
5 | |
6 | #ifndef __DTS_HI3519_CLOCK_H |
7 | #define __DTS_HI3519_CLOCK_H |
8 | |
9 | #define HI3519_FMC_CLK 1 |
10 | #define HI3519_SPI0_CLK 2 |
11 | #define HI3519_SPI1_CLK 3 |
12 | #define HI3519_SPI2_CLK 4 |
13 | #define HI3519_UART0_CLK 5 |
14 | #define HI3519_UART1_CLK 6 |
15 | #define HI3519_UART2_CLK 7 |
16 | #define HI3519_UART3_CLK 8 |
17 | #define HI3519_UART4_CLK 9 |
18 | #define HI3519_PWM_CLK 10 |
19 | #define HI3519_DMA_CLK 11 |
20 | #define HI3519_IR_CLK 12 |
21 | #define HI3519_ETH_PHY_CLK 13 |
22 | #define HI3519_ETH_MAC_CLK 14 |
23 | #define HI3519_ETH_MACIF_CLK 15 |
24 | #define HI3519_USB2_BUS_CLK 16 |
25 | #define HI3519_USB2_PORT_CLK 17 |
26 | #define HI3519_USB3_CLK 18 |
27 | |
28 | #endif /* __DTS_HI3519_CLOCK_H */ |
29 | |