1/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
19 */
20
21#ifndef __DMAR_H__
22#define __DMAR_H__
23
24#include <linux/acpi.h>
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/irqreturn.h>
28#include <linux/rwsem.h>
29#include <linux/rculist.h>
30
31struct acpi_dmar_header;
32
33#ifdef CONFIG_X86
34# define DMAR_UNITS_SUPPORTED MAX_IO_APICS
35#else
36# define DMAR_UNITS_SUPPORTED 64
37#endif
38
39/* DMAR Flags */
40#define DMAR_INTR_REMAP 0x1
41#define DMAR_X2APIC_OPT_OUT 0x2
42#define DMAR_PLATFORM_OPT_IN 0x4
43
44struct intel_iommu;
45
46struct dmar_dev_scope {
47 struct device __rcu *dev;
48 u8 bus;
49 u8 devfn;
50};
51
52#ifdef CONFIG_DMAR_TABLE
53extern struct acpi_table_header *dmar_tbl;
54struct dmar_drhd_unit {
55 struct list_head list; /* list of drhd units */
56 struct acpi_dmar_header *hdr; /* ACPI header */
57 u64 reg_base_addr; /* register base address*/
58 struct dmar_dev_scope *devices;/* target device array */
59 int devices_cnt; /* target device count */
60 u16 segment; /* PCI domain */
61 u8 ignored:1; /* ignore drhd */
62 u8 include_all:1;
63 struct intel_iommu *iommu;
64};
65
66struct dmar_pci_path {
67 u8 bus;
68 u8 device;
69 u8 function;
70};
71
72struct dmar_pci_notify_info {
73 struct pci_dev *dev;
74 unsigned long event;
75 int bus;
76 u16 seg;
77 u16 level;
78 struct dmar_pci_path path[];
79} __attribute__((packed));
80
81extern struct rw_semaphore dmar_global_lock;
82extern struct list_head dmar_drhd_units;
83
84#define for_each_drhd_unit(drhd) \
85 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list)
86
87#define for_each_active_drhd_unit(drhd) \
88 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
89 if (drhd->ignored) {} else
90
91#define for_each_active_iommu(i, drhd) \
92 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
93 if (i=drhd->iommu, drhd->ignored) {} else
94
95#define for_each_iommu(i, drhd) \
96 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \
97 if (i=drhd->iommu, 0) {} else
98
99static inline bool dmar_rcu_check(void)
100{
101 return rwsem_is_locked(&dmar_global_lock) ||
102 system_state == SYSTEM_BOOTING;
103}
104
105#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
106
107#define for_each_dev_scope(a, c, p, d) \
108 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \
109 NULL, (p) < (c)); (p)++)
110
111#define for_each_active_dev_scope(a, c, p, d) \
112 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else
113
114extern int dmar_table_init(void);
115extern int dmar_dev_scope_init(void);
116extern void dmar_register_bus_notifier(void);
117extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
118 struct dmar_dev_scope **devices, u16 segment);
119extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
120extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
121extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
122 void *start, void*end, u16 segment,
123 struct dmar_dev_scope *devices,
124 int devices_cnt);
125extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
126 u16 segment, struct dmar_dev_scope *devices,
127 int count);
128/* Intel IOMMU detection */
129extern int detect_intel_iommu(void);
130extern int enable_drhd_fault_handling(void);
131extern int dmar_device_add(acpi_handle handle);
132extern int dmar_device_remove(acpi_handle handle);
133
134static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
135{
136 return 0;
137}
138
139#ifdef CONFIG_INTEL_IOMMU
140extern int iommu_detected, no_iommu;
141extern int intel_iommu_init(void);
142extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
143extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
144extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
145extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
146extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
147extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
148#else /* !CONFIG_INTEL_IOMMU: */
149static inline int intel_iommu_init(void) { return -ENODEV; }
150
151#define dmar_parse_one_rmrr dmar_res_noop
152#define dmar_parse_one_atsr dmar_res_noop
153#define dmar_check_one_atsr dmar_res_noop
154#define dmar_release_one_atsr dmar_res_noop
155
156static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
157{
158 return 0;
159}
160
161static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
162{
163 return 0;
164}
165#endif /* CONFIG_INTEL_IOMMU */
166
167#ifdef CONFIG_IRQ_REMAP
168extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
169#else /* CONFIG_IRQ_REMAP */
170static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
171{ return 0; }
172#endif /* CONFIG_IRQ_REMAP */
173
174extern bool dmar_platform_optin(void);
175
176#else /* CONFIG_DMAR_TABLE */
177
178static inline int dmar_device_add(void *handle)
179{
180 return 0;
181}
182
183static inline int dmar_device_remove(void *handle)
184{
185 return 0;
186}
187
188static inline bool dmar_platform_optin(void)
189{
190 return false;
191}
192
193#endif /* CONFIG_DMAR_TABLE */
194
195struct irte {
196 union {
197 /* Shared between remapped and posted mode*/
198 struct {
199 __u64 present : 1, /* 0 */
200 fpd : 1, /* 1 */
201 __res0 : 6, /* 2 - 6 */
202 avail : 4, /* 8 - 11 */
203 __res1 : 3, /* 12 - 14 */
204 pst : 1, /* 15 */
205 vector : 8, /* 16 - 23 */
206 __res2 : 40; /* 24 - 63 */
207 };
208
209 /* Remapped mode */
210 struct {
211 __u64 r_present : 1, /* 0 */
212 r_fpd : 1, /* 1 */
213 dst_mode : 1, /* 2 */
214 redir_hint : 1, /* 3 */
215 trigger_mode : 1, /* 4 */
216 dlvry_mode : 3, /* 5 - 7 */
217 r_avail : 4, /* 8 - 11 */
218 r_res0 : 4, /* 12 - 15 */
219 r_vector : 8, /* 16 - 23 */
220 r_res1 : 8, /* 24 - 31 */
221 dest_id : 32; /* 32 - 63 */
222 };
223
224 /* Posted mode */
225 struct {
226 __u64 p_present : 1, /* 0 */
227 p_fpd : 1, /* 1 */
228 p_res0 : 6, /* 2 - 7 */
229 p_avail : 4, /* 8 - 11 */
230 p_res1 : 2, /* 12 - 13 */
231 p_urgent : 1, /* 14 */
232 p_pst : 1, /* 15 */
233 p_vector : 8, /* 16 - 23 */
234 p_res2 : 14, /* 24 - 37 */
235 pda_l : 26; /* 38 - 63 */
236 };
237 __u64 low;
238 };
239
240 union {
241 /* Shared between remapped and posted mode*/
242 struct {
243 __u64 sid : 16, /* 64 - 79 */
244 sq : 2, /* 80 - 81 */
245 svt : 2, /* 82 - 83 */
246 __res3 : 44; /* 84 - 127 */
247 };
248
249 /* Posted mode*/
250 struct {
251 __u64 p_sid : 16, /* 64 - 79 */
252 p_sq : 2, /* 80 - 81 */
253 p_svt : 2, /* 82 - 83 */
254 p_res3 : 12, /* 84 - 95 */
255 pda_h : 32; /* 96 - 127 */
256 };
257 __u64 high;
258 };
259};
260
261static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
262{
263 dst->present = src->present;
264 dst->fpd = src->fpd;
265 dst->avail = src->avail;
266 dst->pst = src->pst;
267 dst->vector = src->vector;
268 dst->sid = src->sid;
269 dst->sq = src->sq;
270 dst->svt = src->svt;
271}
272
273#define PDA_LOW_BIT 26
274#define PDA_HIGH_BIT 32
275
276/* Can't use the common MSI interrupt functions
277 * since DMAR is not a pci device
278 */
279struct irq_data;
280extern void dmar_msi_unmask(struct irq_data *data);
281extern void dmar_msi_mask(struct irq_data *data);
282extern void dmar_msi_read(int irq, struct msi_msg *msg);
283extern void dmar_msi_write(int irq, struct msi_msg *msg);
284extern int dmar_set_interrupt(struct intel_iommu *iommu);
285extern irqreturn_t dmar_fault(int irq, void *dev_id);
286extern int dmar_alloc_hwirq(int id, int node, void *arg);
287extern void dmar_free_hwirq(int irq);
288
289#endif /* __DMAR_H__ */
290