1/*
2 * ROHM BD9571MWV-M driver
3 *
4 * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether expressed or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License version 2 for more details.
14 *
15 * Based on the TPS65086 driver
16 */
17
18#ifndef __LINUX_MFD_BD9571MWV_H
19#define __LINUX_MFD_BD9571MWV_H
20
21#include <linux/device.h>
22#include <linux/regmap.h>
23
24/* List of registers for BD9571MWV */
25#define BD9571MWV_VENDOR_CODE 0x00
26#define BD9571MWV_VENDOR_CODE_VAL 0xdb
27#define BD9571MWV_PRODUCT_CODE 0x01
28#define BD9571MWV_PRODUCT_CODE_VAL 0x60
29#define BD9571MWV_PRODUCT_REVISION 0x02
30
31#define BD9571MWV_I2C_FUSA_MODE 0x10
32#define BD9571MWV_I2C_MD2_E1_BIT_1 0x11
33#define BD9571MWV_I2C_MD2_E1_BIT_2 0x12
34
35#define BD9571MWV_BKUP_MODE_CNT 0x20
36#define BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK GENMASK(3, 0)
37#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0 BIT(0)
38#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1 BIT(1)
39#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0C BIT(2)
40#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1C BIT(3)
41#define BD9571MWV_BKUP_MODE_STATUS 0x21
42#define BD9571MWV_BKUP_RECOVERY_CNT 0x22
43#define BD9571MWV_BKUP_CTRL_TIM_CNT 0x23
44#define BD9571MWV_WAITBKUP_WDT_CNT 0x24
45#define BD9571MWV_128H_TIM_CNT 0x26
46#define BD9571MWV_QLLM_CNT 0x27
47
48#define BD9571MWV_AVS_SET_MONI 0x31
49#define BD9571MWV_AVS_SET_MONI_MASK 0x3
50#define BD9571MWV_AVS_VD09_VID(n) (0x32 + (n))
51#define BD9571MWV_AVS_DVFS_VID(n) (0x36 + (n))
52
53#define BD9571MWV_VD18_VID 0x42
54#define BD9571MWV_VD25_VID 0x43
55#define BD9571MWV_VD33_VID 0x44
56
57#define BD9571MWV_DVFS_VINIT 0x50
58#define BD9571MWV_DVFS_SETVMAX 0x52
59#define BD9571MWV_DVFS_BOOSTVID 0x53
60#define BD9571MWV_DVFS_SETVID 0x54
61#define BD9571MWV_DVFS_MONIVDAC 0x55
62#define BD9571MWV_DVFS_PGD_CNT 0x56
63
64#define BD9571MWV_GPIO_DIR 0x60
65#define BD9571MWV_GPIO_OUT 0x61
66#define BD9571MWV_GPIO_IN 0x62
67#define BD9571MWV_GPIO_DEB 0x63
68#define BD9571MWV_GPIO_INT_SET 0x64
69#define BD9571MWV_GPIO_INT 0x65
70#define BD9571MWV_GPIO_INTMASK 0x66
71
72#define BD9571MWV_REG_KEEP(n) (0x70 + (n))
73
74#define BD9571MWV_PMIC_INTERNAL_STATUS 0x80
75#define BD9571MWV_PROT_ERROR_STATUS0 0x81
76#define BD9571MWV_PROT_ERROR_STATUS1 0x82
77#define BD9571MWV_PROT_ERROR_STATUS2 0x83
78#define BD9571MWV_PROT_ERROR_STATUS3 0x84
79#define BD9571MWV_PROT_ERROR_STATUS4 0x85
80
81#define BD9571MWV_INT_INTREQ 0x90
82#define BD9571MWV_INT_INTREQ_MD1_INT BIT(0)
83#define BD9571MWV_INT_INTREQ_MD2_E1_INT BIT(1)
84#define BD9571MWV_INT_INTREQ_MD2_E2_INT BIT(2)
85#define BD9571MWV_INT_INTREQ_PROT_ERR_INT BIT(3)
86#define BD9571MWV_INT_INTREQ_GP_INT BIT(4)
87#define BD9571MWV_INT_INTREQ_128H_OF_INT BIT(5)
88#define BD9571MWV_INT_INTREQ_WDT_OF_INT BIT(6)
89#define BD9571MWV_INT_INTREQ_BKUP_TRG_INT BIT(7)
90#define BD9571MWV_INT_INTMASK 0x91
91
92#define BD9571MWV_ACCESS_KEY 0xff
93
94/* Define the BD9571MWV IRQ numbers */
95enum bd9571mwv_irqs {
96 BD9571MWV_IRQ_MD1,
97 BD9571MWV_IRQ_MD2_E1,
98 BD9571MWV_IRQ_MD2_E2,
99 BD9571MWV_IRQ_PROT_ERR,
100 BD9571MWV_IRQ_GP,
101 BD9571MWV_IRQ_128H_OF,
102 BD9571MWV_IRQ_WDT_OF,
103 BD9571MWV_IRQ_BKUP_TRG,
104};
105
106/**
107 * struct bd9571mwv - state holder for the bd9571mwv driver
108 *
109 * Device data may be used to access the BD9571MWV chip
110 */
111struct bd9571mwv {
112 struct device *dev;
113 struct regmap *regmap;
114
115 /* IRQ Data */
116 int irq;
117 struct regmap_irq_chip_data *irq_data;
118};
119
120#endif /* __LINUX_MFD_BD9571MWV_H */
121