1/*
2 * da9052 declarations for DA9052 PMICs.
3 *
4 * Copyright(c) 2011 Dialog Semiconductor Ltd.
5 *
6 * Author: David Dajun Chen <dchen@diasemi.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#ifndef __MFD_DA9052_DA9052_H
25#define __MFD_DA9052_DA9052_H
26
27#include <linux/interrupt.h>
28#include <linux/regmap.h>
29#include <linux/slab.h>
30#include <linux/completion.h>
31#include <linux/list.h>
32#include <linux/mfd/core.h>
33
34#include <linux/mfd/da9052/reg.h>
35
36/* Common - HWMON Channel Definations */
37#define DA9052_ADC_VDDOUT 0
38#define DA9052_ADC_ICH 1
39#define DA9052_ADC_TBAT 2
40#define DA9052_ADC_VBAT 3
41#define DA9052_ADC_IN4 4
42#define DA9052_ADC_IN5 5
43#define DA9052_ADC_IN6 6
44#define DA9052_ADC_TSI 7
45#define DA9052_ADC_TJUNC 8
46#define DA9052_ADC_VBBAT 9
47
48/* TSI channel has its own 4 channel mux */
49#define DA9052_ADC_TSI_XP 70
50#define DA9052_ADC_TSI_XN 71
51#define DA9052_ADC_TSI_YP 72
52#define DA9052_ADC_TSI_YN 73
53
54#define DA9052_IRQ_DCIN 0
55#define DA9052_IRQ_VBUS 1
56#define DA9052_IRQ_DCINREM 2
57#define DA9052_IRQ_VBUSREM 3
58#define DA9052_IRQ_VDDLOW 4
59#define DA9052_IRQ_ALARM 5
60#define DA9052_IRQ_SEQRDY 6
61#define DA9052_IRQ_COMP1V2 7
62#define DA9052_IRQ_NONKEY 8
63#define DA9052_IRQ_IDFLOAT 9
64#define DA9052_IRQ_IDGND 10
65#define DA9052_IRQ_CHGEND 11
66#define DA9052_IRQ_TBAT 12
67#define DA9052_IRQ_ADC_EOM 13
68#define DA9052_IRQ_PENDOWN 14
69#define DA9052_IRQ_TSIREADY 15
70#define DA9052_IRQ_GPI0 16
71#define DA9052_IRQ_GPI1 17
72#define DA9052_IRQ_GPI2 18
73#define DA9052_IRQ_GPI3 19
74#define DA9052_IRQ_GPI4 20
75#define DA9052_IRQ_GPI5 21
76#define DA9052_IRQ_GPI6 22
77#define DA9052_IRQ_GPI7 23
78#define DA9052_IRQ_GPI8 24
79#define DA9052_IRQ_GPI9 25
80#define DA9052_IRQ_GPI10 26
81#define DA9052_IRQ_GPI11 27
82#define DA9052_IRQ_GPI12 28
83#define DA9052_IRQ_GPI13 29
84#define DA9052_IRQ_GPI14 30
85#define DA9052_IRQ_GPI15 31
86
87enum da9052_chip_id {
88 DA9052,
89 DA9053_AA,
90 DA9053_BA,
91 DA9053_BB,
92 DA9053_BC,
93};
94
95struct da9052_pdata;
96
97struct da9052 {
98 struct device *dev;
99 struct regmap *regmap;
100
101 struct mutex auxadc_lock;
102 struct completion done;
103
104 int irq_base;
105 struct regmap_irq_chip_data *irq_data;
106 u8 chip_id;
107
108 int chip_irq;
109
110 /* SOC I/O transfer related fixes for DA9052/53 */
111 int (*fix_io) (struct da9052 *da9052, unsigned char reg);
112};
113
114/* ADC API */
115int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
116int da9052_adc_read_temp(struct da9052 *da9052);
117
118/* Device I/O API */
119static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
120{
121 int val, ret;
122
123 ret = regmap_read(da9052->regmap, reg, &val);
124 if (ret < 0)
125 return ret;
126
127 if (da9052->fix_io) {
128 ret = da9052->fix_io(da9052, reg);
129 if (ret < 0)
130 return ret;
131 }
132
133 return val;
134}
135
136static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
137 unsigned char val)
138{
139 int ret;
140
141 ret = regmap_write(da9052->regmap, reg, val);
142 if (ret < 0)
143 return ret;
144
145 if (da9052->fix_io) {
146 ret = da9052->fix_io(da9052, reg);
147 if (ret < 0)
148 return ret;
149 }
150
151 return ret;
152}
153
154static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
155 unsigned reg_cnt, unsigned char *val)
156{
157 int ret;
158 unsigned int tmp;
159 int i;
160
161 for (i = 0; i < reg_cnt; i++) {
162 ret = regmap_read(da9052->regmap, reg + i, &tmp);
163 val[i] = (unsigned char)tmp;
164 if (ret < 0)
165 return ret;
166 }
167
168 if (da9052->fix_io) {
169 ret = da9052->fix_io(da9052, reg);
170 if (ret < 0)
171 return ret;
172 }
173
174 return ret;
175}
176
177static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
178 unsigned reg_cnt, unsigned char *val)
179{
180 int ret = 0;
181 int i;
182
183 for (i = 0; i < reg_cnt; i++) {
184 ret = regmap_write(da9052->regmap, reg + i, val[i]);
185 if (ret < 0)
186 return ret;
187 }
188
189 if (da9052->fix_io) {
190 ret = da9052->fix_io(da9052, reg);
191 if (ret < 0)
192 return ret;
193 }
194
195 return ret;
196}
197
198static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
199 unsigned char bit_mask,
200 unsigned char reg_val)
201{
202 int ret;
203
204 ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
205 if (ret < 0)
206 return ret;
207
208 if (da9052->fix_io) {
209 ret = da9052->fix_io(da9052, reg);
210 if (ret < 0)
211 return ret;
212 }
213
214 return ret;
215}
216
217int da9052_device_init(struct da9052 *da9052, u8 chip_id);
218void da9052_device_exit(struct da9052 *da9052);
219
220extern const struct regmap_config da9052_regmap_config;
221
222int da9052_irq_init(struct da9052 *da9052);
223int da9052_irq_exit(struct da9052 *da9052);
224int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
225 irq_handler_t handler, void *data);
226void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
227
228int da9052_enable_irq(struct da9052 *da9052, int irq);
229int da9052_disable_irq(struct da9052 *da9052, int irq);
230int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
231
232#endif /* __MFD_DA9052_DA9052_H */
233