1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Registers definition for DA9063 modules |
4 | * |
5 | * Copyright 2012 Dialog Semiconductor Ltd. |
6 | * |
7 | * Author: Michal Hajduk, Dialog Semiconductor |
8 | * Author: Krystian Garbaciak, Dialog Semiconductor |
9 | */ |
10 | |
11 | #ifndef _DA9063_REG_H |
12 | #define _DA9063_REG_H |
13 | |
14 | #define DA9063_I2C_PAGE_SEL_SHIFT 1 |
15 | #define DA9063_EVENT_REG_NUM 4 |
16 | |
17 | /* Page selection I2C or SPI always in the begining of any page. */ |
18 | /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ |
19 | /* Page 1 : SPI access 0x080 - 0x0FF */ |
20 | /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */ |
21 | /* Page 3 : SPI access 0x180 - 0x1FF */ |
22 | #define DA9063_REG_PAGE_CON 0x00 |
23 | |
24 | /* System Control and Event Registers */ |
25 | #define DA9063_REG_STATUS_A 0x01 |
26 | #define DA9063_REG_STATUS_B 0x02 |
27 | #define DA9063_REG_STATUS_C 0x03 |
28 | #define DA9063_REG_STATUS_D 0x04 |
29 | #define DA9063_REG_FAULT_LOG 0x05 |
30 | #define DA9063_REG_EVENT_A 0x06 |
31 | #define DA9063_REG_EVENT_B 0x07 |
32 | #define DA9063_REG_EVENT_C 0x08 |
33 | #define DA9063_REG_EVENT_D 0x09 |
34 | #define DA9063_REG_IRQ_MASK_A 0x0A |
35 | #define DA9063_REG_IRQ_MASK_B 0x0B |
36 | #define DA9063_REG_IRQ_MASK_C 0x0C |
37 | #define DA9063_REG_IRQ_MASK_D 0x0D |
38 | #define DA9063_REG_CONTROL_A 0x0E |
39 | #define DA9063_REG_CONTROL_B 0x0F |
40 | #define DA9063_REG_CONTROL_C 0x10 |
41 | #define DA9063_REG_CONTROL_D 0x11 |
42 | #define DA9063_REG_CONTROL_E 0x12 |
43 | #define DA9063_REG_CONTROL_F 0x13 |
44 | #define DA9063_REG_PD_DIS 0x14 |
45 | |
46 | /* GPIO Control Registers */ |
47 | #define DA9063_REG_GPIO_0_1 0x15 |
48 | #define DA9063_REG_GPIO_2_3 0x16 |
49 | #define DA9063_REG_GPIO_4_5 0x17 |
50 | #define DA9063_REG_GPIO_6_7 0x18 |
51 | #define DA9063_REG_GPIO_8_9 0x19 |
52 | #define DA9063_REG_GPIO_10_11 0x1A |
53 | #define DA9063_REG_GPIO_12_13 0x1B |
54 | #define DA9063_REG_GPIO_14_15 0x1C |
55 | #define DA9063_REG_GPIO_MODE0_7 0x1D |
56 | #define DA9063_REG_GPIO_MODE8_15 0x1E |
57 | #define DA9063_REG_SWITCH_CONT 0x1F |
58 | |
59 | /* Regulator Control Registers */ |
60 | #define DA9063_REG_BCORE2_CONT 0x20 |
61 | #define DA9063_REG_BCORE1_CONT 0x21 |
62 | #define DA9063_REG_BPRO_CONT 0x22 |
63 | #define DA9063_REG_BMEM_CONT 0x23 |
64 | #define DA9063_REG_BIO_CONT 0x24 |
65 | #define DA9063_REG_BPERI_CONT 0x25 |
66 | #define DA9063_REG_LDO1_CONT 0x26 |
67 | #define DA9063_REG_LDO2_CONT 0x27 |
68 | #define DA9063_REG_LDO3_CONT 0x28 |
69 | #define DA9063_REG_LDO4_CONT 0x29 |
70 | #define DA9063_REG_LDO5_CONT 0x2A |
71 | #define DA9063_REG_LDO6_CONT 0x2B |
72 | #define DA9063_REG_LDO7_CONT 0x2C |
73 | #define DA9063_REG_LDO8_CONT 0x2D |
74 | #define DA9063_REG_LDO9_CONT 0x2E |
75 | #define DA9063_REG_LDO10_CONT 0x2F |
76 | #define DA9063_REG_LDO11_CONT 0x30 |
77 | #define DA9063_REG_SUPPLIES 0x31 |
78 | #define DA9063_REG_DVC_1 0x32 |
79 | #define DA9063_REG_DVC_2 0x33 |
80 | |
81 | /* GP-ADC Control Registers */ |
82 | #define DA9063_REG_ADC_MAN 0x34 |
83 | #define DA9063_REG_ADC_CONT 0x35 |
84 | #define DA9063_REG_VSYS_MON 0x36 |
85 | #define DA9063_REG_ADC_RES_L 0x37 |
86 | #define DA9063_REG_ADC_RES_H 0x38 |
87 | #define DA9063_REG_VSYS_RES 0x39 |
88 | #define DA9063_REG_ADCIN1_RES 0x3A |
89 | #define DA9063_REG_ADCIN2_RES 0x3B |
90 | #define DA9063_REG_ADCIN3_RES 0x3C |
91 | #define DA9063_REG_MON_A8_RES 0x3D |
92 | #define DA9063_REG_MON_A9_RES 0x3E |
93 | #define DA9063_REG_MON_A10_RES 0x3F |
94 | |
95 | /* RTC Calendar and Alarm Registers */ |
96 | #define DA9063_REG_COUNT_S 0x40 |
97 | #define DA9063_REG_COUNT_MI 0x41 |
98 | #define DA9063_REG_COUNT_H 0x42 |
99 | #define DA9063_REG_COUNT_D 0x43 |
100 | #define DA9063_REG_COUNT_MO 0x44 |
101 | #define DA9063_REG_COUNT_Y 0x45 |
102 | |
103 | #define DA9063_AD_REG_ALARM_MI 0x46 |
104 | #define DA9063_AD_REG_ALARM_H 0x47 |
105 | #define DA9063_AD_REG_ALARM_D 0x48 |
106 | #define DA9063_AD_REG_ALARM_MO 0x49 |
107 | #define DA9063_AD_REG_ALARM_Y 0x4A |
108 | #define DA9063_AD_REG_SECOND_A 0x4B |
109 | #define DA9063_AD_REG_SECOND_B 0x4C |
110 | #define DA9063_AD_REG_SECOND_C 0x4D |
111 | #define DA9063_AD_REG_SECOND_D 0x4E |
112 | |
113 | #define DA9063_BB_REG_ALARM_S 0x46 |
114 | #define DA9063_BB_REG_ALARM_MI 0x47 |
115 | #define DA9063_BB_REG_ALARM_H 0x48 |
116 | #define DA9063_BB_REG_ALARM_D 0x49 |
117 | #define DA9063_BB_REG_ALARM_MO 0x4A |
118 | #define DA9063_BB_REG_ALARM_Y 0x4B |
119 | #define DA9063_BB_REG_SECOND_A 0x4C |
120 | #define DA9063_BB_REG_SECOND_B 0x4D |
121 | #define DA9063_BB_REG_SECOND_C 0x4E |
122 | #define DA9063_BB_REG_SECOND_D 0x4F |
123 | |
124 | /* Sequencer Control Registers */ |
125 | #define DA9063_REG_SEQ 0x81 |
126 | #define DA9063_REG_SEQ_TIMER 0x82 |
127 | #define DA9063_REG_ID_2_1 0x83 |
128 | #define DA9063_REG_ID_4_3 0x84 |
129 | #define DA9063_REG_ID_6_5 0x85 |
130 | #define DA9063_REG_ID_8_7 0x86 |
131 | #define DA9063_REG_ID_10_9 0x87 |
132 | #define DA9063_REG_ID_12_11 0x88 |
133 | #define DA9063_REG_ID_14_13 0x89 |
134 | #define DA9063_REG_ID_16_15 0x8A |
135 | #define DA9063_REG_ID_18_17 0x8B |
136 | #define DA9063_REG_ID_20_19 0x8C |
137 | #define DA9063_REG_ID_22_21 0x8D |
138 | #define DA9063_REG_ID_24_23 0x8E |
139 | #define DA9063_REG_ID_26_25 0x8F |
140 | #define DA9063_REG_ID_28_27 0x90 |
141 | #define DA9063_REG_ID_30_29 0x91 |
142 | #define DA9063_REG_ID_32_31 0x92 |
143 | #define DA9063_REG_SEQ_A 0x95 |
144 | #define DA9063_REG_SEQ_B 0x96 |
145 | #define DA9063_REG_WAIT 0x97 |
146 | #define DA9063_REG_EN_32K 0x98 |
147 | #define DA9063_REG_RESET 0x99 |
148 | |
149 | /* Regulator Setting Registers */ |
150 | #define DA9063_REG_BUCK_ILIM_A 0x9A |
151 | #define DA9063_REG_BUCK_ILIM_B 0x9B |
152 | #define DA9063_REG_BUCK_ILIM_C 0x9C |
153 | #define DA9063_REG_BCORE2_CFG 0x9D |
154 | #define DA9063_REG_BCORE1_CFG 0x9E |
155 | #define DA9063_REG_BPRO_CFG 0x9F |
156 | #define DA9063_REG_BIO_CFG 0xA0 |
157 | #define DA9063_REG_BMEM_CFG 0xA1 |
158 | #define DA9063_REG_BPERI_CFG 0xA2 |
159 | #define DA9063_REG_VBCORE2_A 0xA3 |
160 | #define DA9063_REG_VBCORE1_A 0xA4 |
161 | #define DA9063_REG_VBPRO_A 0xA5 |
162 | #define DA9063_REG_VBMEM_A 0xA6 |
163 | #define DA9063_REG_VBIO_A 0xA7 |
164 | #define DA9063_REG_VBPERI_A 0xA8 |
165 | #define DA9063_REG_VLDO1_A 0xA9 |
166 | #define DA9063_REG_VLDO2_A 0xAA |
167 | #define DA9063_REG_VLDO3_A 0xAB |
168 | #define DA9063_REG_VLDO4_A 0xAC |
169 | #define DA9063_REG_VLDO5_A 0xAD |
170 | #define DA9063_REG_VLDO6_A 0xAE |
171 | #define DA9063_REG_VLDO7_A 0xAF |
172 | #define DA9063_REG_VLDO8_A 0xB0 |
173 | #define DA9063_REG_VLDO9_A 0xB1 |
174 | #define DA9063_REG_VLDO10_A 0xB2 |
175 | #define DA9063_REG_VLDO11_A 0xB3 |
176 | #define DA9063_REG_VBCORE2_B 0xB4 |
177 | #define DA9063_REG_VBCORE1_B 0xB5 |
178 | #define DA9063_REG_VBPRO_B 0xB6 |
179 | #define DA9063_REG_VBMEM_B 0xB7 |
180 | #define DA9063_REG_VBIO_B 0xB8 |
181 | #define DA9063_REG_VBPERI_B 0xB9 |
182 | #define DA9063_REG_VLDO1_B 0xBA |
183 | #define DA9063_REG_VLDO2_B 0xBB |
184 | #define DA9063_REG_VLDO3_B 0xBC |
185 | #define DA9063_REG_VLDO4_B 0xBD |
186 | #define DA9063_REG_VLDO5_B 0xBE |
187 | #define DA9063_REG_VLDO6_B 0xBF |
188 | #define DA9063_REG_VLDO7_B 0xC0 |
189 | #define DA9063_REG_VLDO8_B 0xC1 |
190 | #define DA9063_REG_VLDO9_B 0xC2 |
191 | #define DA9063_REG_VLDO10_B 0xC3 |
192 | #define DA9063_REG_VLDO11_B 0xC4 |
193 | |
194 | /* Backup Battery Charger Control Register */ |
195 | #define DA9063_REG_BBAT_CONT 0xC5 |
196 | |
197 | /* GPIO PWM (LED) */ |
198 | #define DA9063_REG_GPO11_LED 0xC6 |
199 | #define DA9063_REG_GPO14_LED 0xC7 |
200 | #define DA9063_REG_GPO15_LED 0xC8 |
201 | |
202 | /* GP-ADC Threshold Registers */ |
203 | #define DA9063_REG_ADC_CFG 0xC9 |
204 | #define DA9063_REG_AUTO1_HIGH 0xCA |
205 | #define DA9063_REG_AUTO1_LOW 0xCB |
206 | #define DA9063_REG_AUTO2_HIGH 0xCC |
207 | #define DA9063_REG_AUTO2_LOW 0xCD |
208 | #define DA9063_REG_AUTO3_HIGH 0xCE |
209 | #define DA9063_REG_AUTO3_LOW 0xCF |
210 | |
211 | /* DA9063 Configuration registers */ |
212 | /* OTP */ |
213 | #define DA9063_REG_OTP_CONT 0x101 |
214 | #define DA9063_REG_OTP_ADDR 0x102 |
215 | #define DA9063_REG_OTP_DATA 0x103 |
216 | |
217 | /* Customer Trim and Configuration */ |
218 | #define DA9063_REG_T_OFFSET 0x104 |
219 | #define DA9063_REG_INTERFACE 0x105 |
220 | #define DA9063_REG_CONFIG_A 0x106 |
221 | #define DA9063_REG_CONFIG_B 0x107 |
222 | #define DA9063_REG_CONFIG_C 0x108 |
223 | #define DA9063_REG_CONFIG_D 0x109 |
224 | #define DA9063_REG_CONFIG_E 0x10A |
225 | #define DA9063_REG_CONFIG_F 0x10B |
226 | #define DA9063_REG_CONFIG_G 0x10C |
227 | #define DA9063_REG_CONFIG_H 0x10D |
228 | #define DA9063_REG_CONFIG_I 0x10E |
229 | #define DA9063_REG_CONFIG_J 0x10F |
230 | #define DA9063_REG_CONFIG_K 0x110 |
231 | #define DA9063_REG_CONFIG_L 0x111 |
232 | |
233 | #define DA9063_AD_REG_MON_REG_1 0x112 |
234 | #define DA9063_AD_REG_MON_REG_2 0x113 |
235 | #define DA9063_AD_REG_MON_REG_3 0x114 |
236 | #define DA9063_AD_REG_MON_REG_4 0x115 |
237 | #define DA9063_AD_REG_MON_REG_5 0x116 |
238 | #define DA9063_AD_REG_MON_REG_6 0x117 |
239 | #define DA9063_AD_REG_TRIM_CLDR 0x118 |
240 | |
241 | #define DA9063_AD_REG_GP_ID_0 0x119 |
242 | #define DA9063_AD_REG_GP_ID_1 0x11A |
243 | #define DA9063_AD_REG_GP_ID_2 0x11B |
244 | #define DA9063_AD_REG_GP_ID_3 0x11C |
245 | #define DA9063_AD_REG_GP_ID_4 0x11D |
246 | #define DA9063_AD_REG_GP_ID_5 0x11E |
247 | #define DA9063_AD_REG_GP_ID_6 0x11F |
248 | #define DA9063_AD_REG_GP_ID_7 0x120 |
249 | #define DA9063_AD_REG_GP_ID_8 0x121 |
250 | #define DA9063_AD_REG_GP_ID_9 0x122 |
251 | #define DA9063_AD_REG_GP_ID_10 0x123 |
252 | #define DA9063_AD_REG_GP_ID_11 0x124 |
253 | #define DA9063_AD_REG_GP_ID_12 0x125 |
254 | #define DA9063_AD_REG_GP_ID_13 0x126 |
255 | #define DA9063_AD_REG_GP_ID_14 0x127 |
256 | #define DA9063_AD_REG_GP_ID_15 0x128 |
257 | #define DA9063_AD_REG_GP_ID_16 0x129 |
258 | #define DA9063_AD_REG_GP_ID_17 0x12A |
259 | #define DA9063_AD_REG_GP_ID_18 0x12B |
260 | #define DA9063_AD_REG_GP_ID_19 0x12C |
261 | |
262 | #define DA9063_BB_REG_CONFIG_M 0x112 |
263 | #define DA9063_BB_REG_CONFIG_N 0x113 |
264 | |
265 | #define DA9063_BB_REG_MON_REG_1 0x114 |
266 | #define DA9063_BB_REG_MON_REG_2 0x115 |
267 | #define DA9063_BB_REG_MON_REG_3 0x116 |
268 | #define DA9063_BB_REG_MON_REG_4 0x117 |
269 | #define DA9063_BB_REG_MON_REG_5 0x11E |
270 | #define DA9063_BB_REG_MON_REG_6 0x11F |
271 | #define DA9063_BB_REG_TRIM_CLDR 0x120 |
272 | /* General Purpose Registers */ |
273 | #define DA9063_BB_REG_GP_ID_0 0x121 |
274 | #define DA9063_BB_REG_GP_ID_1 0x122 |
275 | #define DA9063_BB_REG_GP_ID_2 0x123 |
276 | #define DA9063_BB_REG_GP_ID_3 0x124 |
277 | #define DA9063_BB_REG_GP_ID_4 0x125 |
278 | #define DA9063_BB_REG_GP_ID_5 0x126 |
279 | #define DA9063_BB_REG_GP_ID_6 0x127 |
280 | #define DA9063_BB_REG_GP_ID_7 0x128 |
281 | #define DA9063_BB_REG_GP_ID_8 0x129 |
282 | #define DA9063_BB_REG_GP_ID_9 0x12A |
283 | #define DA9063_BB_REG_GP_ID_10 0x12B |
284 | #define DA9063_BB_REG_GP_ID_11 0x12C |
285 | #define DA9063_BB_REG_GP_ID_12 0x12D |
286 | #define DA9063_BB_REG_GP_ID_13 0x12E |
287 | #define DA9063_BB_REG_GP_ID_14 0x12F |
288 | #define DA9063_BB_REG_GP_ID_15 0x130 |
289 | #define DA9063_BB_REG_GP_ID_16 0x131 |
290 | #define DA9063_BB_REG_GP_ID_17 0x132 |
291 | #define DA9063_BB_REG_GP_ID_18 0x133 |
292 | #define DA9063_BB_REG_GP_ID_19 0x134 |
293 | |
294 | /* Chip ID and variant */ |
295 | #define DA9063_REG_DEVICE_ID 0x181 |
296 | #define DA9063_REG_VARIANT_ID 0x182 |
297 | #define DA9063_REG_CUSTOMER_ID 0x183 |
298 | #define DA9063_REG_CONFIG_ID 0x184 |
299 | |
300 | /* |
301 | * PMIC registers bits |
302 | */ |
303 | /* DA9063_REG_PAGE_CON (addr=0x00) */ |
304 | #define DA9063_PEG_PAGE_SHIFT 0 |
305 | #define DA9063_REG_PAGE_MASK 0x07 |
306 | #define DA9063_REG_PAGE0 0x00 |
307 | #define DA9063_REG_PAGE2 0x02 |
308 | #define DA9063_PAGE_WRITE_MODE 0x00 |
309 | #define DA9063_REPEAT_WRITE_MODE 0x40 |
310 | #define DA9063_PAGE_REVERT 0x80 |
311 | |
312 | /* DA9063_REG_STATUS_A (addr=0x01) */ |
313 | #define DA9063_NONKEY 0x01 |
314 | #define DA9063_WAKE 0x02 |
315 | #define DA9063_DVC_BUSY 0x04 |
316 | #define DA9063_COMP_1V2 0x08 |
317 | |
318 | /* DA9063_REG_STATUS_B (addr=0x02) */ |
319 | #define DA9063_GPI0 0x01 |
320 | #define DA9063_GPI1 0x02 |
321 | #define DA9063_GPI2 0x04 |
322 | #define DA9063_GPI3 0x08 |
323 | #define DA9063_GPI4 0x10 |
324 | #define DA9063_GPI5 0x20 |
325 | #define DA9063_GPI6 0x40 |
326 | #define DA9063_GPI7 0x80 |
327 | |
328 | /* DA9063_REG_STATUS_C (addr=0x03) */ |
329 | #define DA9063_GPI8 0x01 |
330 | #define DA9063_GPI9 0x02 |
331 | #define DA9063_GPI10 0x04 |
332 | #define DA9063_GPI11 0x08 |
333 | #define DA9063_GPI12 0x10 |
334 | #define DA9063_GPI13 0x20 |
335 | #define DA9063_GPI14 0x40 |
336 | #define DA9063_GPI15 0x80 |
337 | |
338 | /* DA9063_REG_STATUS_D (addr=0x04) */ |
339 | #define DA9063_LDO3_LIM 0x08 |
340 | #define DA9063_LDO4_LIM 0x10 |
341 | #define DA9063_LDO7_LIM 0x20 |
342 | #define DA9063_LDO8_LIM 0x40 |
343 | #define DA9063_LDO11_LIM 0x80 |
344 | |
345 | /* DA9063_REG_FAULT_LOG (addr=0x05) */ |
346 | #define DA9063_TWD_ERROR 0x01 |
347 | #define DA9063_POR 0x02 |
348 | #define DA9063_VDD_FAULT 0x04 |
349 | #define DA9063_VDD_START 0x08 |
350 | #define DA9063_TEMP_CRIT 0x10 |
351 | #define DA9063_KEY_RESET 0x20 |
352 | #define DA9063_NSHUTDOWN 0x40 |
353 | #define DA9063_WAIT_SHUT 0x80 |
354 | |
355 | /* DA9063_REG_EVENT_A (addr=0x06) */ |
356 | #define DA9063_E_NONKEY 0x01 |
357 | #define DA9063_E_ALARM 0x02 |
358 | #define DA9063_E_TICK 0x04 |
359 | #define DA9063_E_ADC_RDY 0x08 |
360 | #define DA9063_E_SEQ_RDY 0x10 |
361 | #define DA9063_EVENTS_B 0x20 |
362 | #define DA9063_EVENTS_C 0x40 |
363 | #define DA9063_EVENTS_D 0x80 |
364 | |
365 | /* DA9063_REG_EVENT_B (addr=0x07) */ |
366 | #define DA9063_E_WAKE 0x01 |
367 | #define DA9063_E_TEMP 0x02 |
368 | #define DA9063_E_COMP_1V2 0x04 |
369 | #define DA9063_E_LDO_LIM 0x08 |
370 | #define DA9063_E_REG_UVOV 0x10 |
371 | #define DA9063_E_DVC_RDY 0x20 |
372 | #define DA9063_E_VDD_MON 0x40 |
373 | #define DA9063_E_VDD_WARN 0x80 |
374 | |
375 | /* DA9063_REG_EVENT_C (addr=0x08) */ |
376 | #define DA9063_E_GPI0 0x01 |
377 | #define DA9063_E_GPI1 0x02 |
378 | #define DA9063_E_GPI2 0x04 |
379 | #define DA9063_E_GPI3 0x08 |
380 | #define DA9063_E_GPI4 0x10 |
381 | #define DA9063_E_GPI5 0x20 |
382 | #define DA9063_E_GPI6 0x40 |
383 | #define DA9063_E_GPI7 0x80 |
384 | |
385 | /* DA9063_REG_EVENT_D (addr=0x09) */ |
386 | #define DA9063_E_GPI8 0x01 |
387 | #define DA9063_E_GPI9 0x02 |
388 | #define DA9063_E_GPI10 0x04 |
389 | #define DA9063_E_GPI11 0x08 |
390 | #define DA9063_E_GPI12 0x10 |
391 | #define DA9063_E_GPI13 0x20 |
392 | #define DA9063_E_GPI14 0x40 |
393 | #define DA9063_E_GPI15 0x80 |
394 | |
395 | /* DA9063_REG_IRQ_MASK_A (addr=0x0A) */ |
396 | #define DA9063_M_ONKEY 0x01 |
397 | #define DA9063_M_ALARM 0x02 |
398 | #define DA9063_M_TICK 0x04 |
399 | #define DA9063_M_ADC_RDY 0x08 |
400 | #define DA9063_M_SEQ_RDY 0x10 |
401 | |
402 | /* DA9063_REG_IRQ_MASK_B (addr=0x0B) */ |
403 | #define DA9063_M_WAKE 0x01 |
404 | #define DA9063_M_TEMP 0x02 |
405 | #define DA9063_M_COMP_1V2 0x04 |
406 | #define DA9063_M_LDO_LIM 0x08 |
407 | #define DA9063_M_UVOV 0x10 |
408 | #define DA9063_M_DVC_RDY 0x20 |
409 | #define DA9063_M_VDD_MON 0x40 |
410 | #define DA9063_M_VDD_WARN 0x80 |
411 | |
412 | /* DA9063_REG_IRQ_MASK_C (addr=0x0C) */ |
413 | #define DA9063_M_GPI0 0x01 |
414 | #define DA9063_M_GPI1 0x02 |
415 | #define DA9063_M_GPI2 0x04 |
416 | #define DA9063_M_GPI3 0x08 |
417 | #define DA9063_M_GPI4 0x10 |
418 | #define DA9063_M_GPI5 0x20 |
419 | #define DA9063_M_GPI6 0x40 |
420 | #define DA9063_M_GPI7 0x80 |
421 | |
422 | /* DA9063_REG_IRQ_MASK_D (addr=0x0D) */ |
423 | #define DA9063_M_GPI8 0x01 |
424 | #define DA9063_M_GPI9 0x02 |
425 | #define DA9063_M_GPI10 0x04 |
426 | #define DA9063_M_GPI11 0x08 |
427 | #define DA9063_M_GPI12 0x10 |
428 | #define DA9063_M_GPI13 0x20 |
429 | #define DA9063_M_GPI14 0x40 |
430 | #define DA9063_M_GPI15 0x80 |
431 | |
432 | /* DA9063_REG_CONTROL_A (addr=0x0E) */ |
433 | #define DA9063_SYSTEM_EN 0x01 |
434 | #define DA9063_POWER_EN 0x02 |
435 | #define DA9063_POWER1_EN 0x04 |
436 | #define DA9063_STANDBY 0x08 |
437 | #define DA9063_M_SYSTEM_EN 0x10 |
438 | #define DA9063_M_POWER_EN 0x20 |
439 | #define DA9063_M_POWER1_EN 0x40 |
440 | #define DA9063_CP_EN 0x80 |
441 | |
442 | /* DA9063_REG_CONTROL_B (addr=0x0F) */ |
443 | #define DA9063_CHG_SEL 0x01 |
444 | #define DA9063_WATCHDOG_PD 0x02 |
445 | #define DA9063_BB_RESET_BLINKING 0x04 |
446 | #define DA9063_NRES_MODE 0x08 |
447 | #define DA9063_NONKEY_LOCK 0x10 |
448 | #define DA9063_BB_BUCK_SLOWSTART 0x80 |
449 | |
450 | /* DA9063_REG_CONTROL_C (addr=0x10) */ |
451 | #define DA9063_DEBOUNCING_MASK 0x07 |
452 | #define DA9063_DEBOUNCING_OFF 0x0 |
453 | #define DA9063_DEBOUNCING_0MS1 0x1 |
454 | #define DA9063_DEBOUNCING_1MS 0x2 |
455 | #define DA9063_DEBOUNCING_10MS24 0x3 |
456 | #define DA9063_DEBOUNCING_51MS2 0x4 |
457 | #define DA9063_DEBOUNCING_256MS 0x5 |
458 | #define DA9063_DEBOUNCING_512MS 0x6 |
459 | #define DA9063_DEBOUNCING_1024MS 0x7 |
460 | |
461 | #define DA9063_AUTO_BOOT 0x08 |
462 | #define DA9063_OTPREAD_EN 0x10 |
463 | #define DA9063_SLEW_RATE_MASK 0x60 |
464 | #define DA9063_SLEW_RATE_4US 0x00 |
465 | #define DA9063_SLEW_RATE_3US 0x20 |
466 | #define DA9063_SLEW_RATE_1US 0x40 |
467 | #define DA9063_SLEW_RATE_0US5 0x60 |
468 | #define DA9063_DEF_SUPPLY 0x80 |
469 | |
470 | /* DA9063_REG_CONTROL_D (addr=0x11) */ |
471 | #define DA9063_TWDSCALE_MASK 0x07 |
472 | #define DA9063_BLINK_FRQ_MASK 0x38 |
473 | #define DA9063_BLINK_FRQ_OFF 0x00 |
474 | #define DA9063_BLINK_FRQ_1S0 0x08 |
475 | #define DA9063_BLINK_FRQ_2S0 0x10 |
476 | #define DA9063_BLINK_FRQ_4S0 0x18 |
477 | #define DA9063_BLINK_FRQ_0S18 0x20 |
478 | #define DA9063_BLINK_FRQ_2S0_VDD 0x28 |
479 | #define DA9063_BLINK_FRQ_4S0_VDD 0x30 |
480 | #define DA9063_BLINK_FRQ_0S18_VDD 0x38 |
481 | |
482 | #define DA9063_BLINK_DUR_MASK 0xC0 |
483 | #define DA9063_BLINK_DUR_10MS 0x00 |
484 | #define DA9063_BLINK_DUR_20MS 0x40 |
485 | #define DA9063_BLINK_DUR_40MS 0x80 |
486 | #define DA9063_BLINK_DUR_20MSDBL 0xC0 |
487 | |
488 | /* DA9063_REG_CONTROL_E (addr=0x12) */ |
489 | #define DA9063_RTC_MODE_PD 0x01 |
490 | #define DA9063_RTC_MODE_SD 0x02 |
491 | #define DA9063_RTC_EN 0x04 |
492 | #define DA9063_ECO_MODE 0x08 |
493 | #define DA9063_PM_FB1_PIN 0x10 |
494 | #define DA9063_PM_FB2_PIN 0x20 |
495 | #define DA9063_PM_FB3_PIN 0x40 |
496 | #define DA9063_V_LOCK 0x80 |
497 | |
498 | /* DA9063_REG_CONTROL_F (addr=0x13) */ |
499 | #define DA9063_WATCHDOG 0x01 |
500 | #define DA9063_SHUTDOWN 0x02 |
501 | #define DA9063_WAKE_UP 0x04 |
502 | |
503 | /* DA9063_REG_PD_DIS (addr=0x14) */ |
504 | #define DA9063_GPI_DIS 0x01 |
505 | #define DA9063_GPADC_PAUSE 0x02 |
506 | #define DA9063_PMIF_DIS 0x04 |
507 | #define DA9063_HS2WIRE_DIS 0x08 |
508 | #define DA9063_BB_CLDR_PAUSE 0x10 |
509 | #define DA9063_BBAT_DIS 0x20 |
510 | #define DA9063_OUT_32K_PAUSE 0x40 |
511 | #define DA9063_PMCONT_DIS 0x80 |
512 | |
513 | /* DA9063_REG_GPIO_0_1 (addr=0x15) */ |
514 | #define DA9063_GPIO0_PIN_MASK 0x03 |
515 | #define DA9063_GPIO0_PIN_ADCIN1 0x00 |
516 | #define DA9063_GPIO0_PIN_GPI 0x01 |
517 | #define DA9063_GPIO0_PIN_GPO_OD 0x02 |
518 | #define DA9063_GPIO0_PIN_GPO 0x03 |
519 | #define DA9063_GPIO0_TYPE 0x04 |
520 | #define DA9063_GPIO0_TYPE_GPI_ACT_LOW 0x00 |
521 | #define DA9063_GPIO0_TYPE_GPO_VDD_IO1 0x00 |
522 | #define DA9063_GPIO0_TYPE_GPI_ACT_HIGH 0x04 |
523 | #define DA9063_GPIO0_TYPE_GPO_VDD_IO2 0x04 |
524 | #define DA9063_GPIO0_NO_WAKEUP 0x08 |
525 | #define DA9063_GPIO1_PIN_MASK 0x30 |
526 | #define DA9063_GPIO1_PIN_ADCIN2_COMP 0x00 |
527 | #define DA9063_GPIO1_PIN_GPI 0x10 |
528 | #define DA9063_GPIO1_PIN_GPO_OD 0x20 |
529 | #define DA9063_GPIO1_PIN_GPO 0x30 |
530 | #define DA9063_GPIO1_TYPE 0x40 |
531 | #define DA9063_GPIO1_TYPE_GPI_ACT_LOW 0x00 |
532 | #define DA9063_GPIO1_TYPE_GPO_VDD_IO1 0x00 |
533 | #define DA9063_GPIO1_TYPE_GPI_ACT_HIGH 0x04 |
534 | #define DA9063_GPIO1_TYPE_GPO_VDD_IO2 0x04 |
535 | #define DA9063_GPIO1_NO_WAKEUP 0x80 |
536 | |
537 | /* DA9063_REG_GPIO_2_3 (addr=0x16) */ |
538 | #define DA9063_GPIO2_PIN_MASK 0x03 |
539 | #define DA9063_GPIO2_PIN_ADCIN3 0x00 |
540 | #define DA9063_GPIO2_PIN_GPI 0x01 |
541 | #define DA9063_GPIO2_PIN_GPO_PSS 0x02 |
542 | #define DA9063_GPIO2_PIN_GPO 0x03 |
543 | #define DA9063_GPIO2_TYPE 0x04 |
544 | #define DA9063_GPIO2_TYPE_GPI_ACT_LOW 0x00 |
545 | #define DA9063_GPIO2_TYPE_GPO_VDD_IO1 0x00 |
546 | #define DA9063_GPIO2_TYPE_GPI_ACT_HIGH 0x04 |
547 | #define DA9063_GPIO2_TYPE_GPO_VDD_IO2 0x04 |
548 | #define DA9063_GPIO2_NO_WAKEUP 0x08 |
549 | #define DA9063_GPIO3_PIN_MASK 0x30 |
550 | #define DA9063_GPIO3_PIN_CORE_SW_G 0x00 |
551 | #define DA9063_GPIO3_PIN_GPI 0x10 |
552 | #define DA9063_GPIO3_PIN_GPO_OD 0x20 |
553 | #define DA9063_GPIO3_PIN_GPO 0x30 |
554 | #define DA9063_GPIO3_TYPE 0x40 |
555 | #define DA9063_GPIO3_TYPE_GPI_ACT_LOW 0x00 |
556 | #define DA9063_GPIO3_TYPE_GPO_VDD_IO1 0x00 |
557 | #define DA9063_GPIO3_TYPE_GPI_ACT_HIGH 0x04 |
558 | #define DA9063_GPIO3_TYPE_GPO_VDD_IO2 0x04 |
559 | #define DA9063_GPIO3_NO_WAKEUP 0x80 |
560 | |
561 | /* DA9063_REG_GPIO_4_5 (addr=0x17) */ |
562 | #define DA9063_GPIO4_PIN_MASK 0x03 |
563 | #define DA9063_GPIO4_PIN_CORE_SW_S 0x00 |
564 | #define DA9063_GPIO4_PIN_GPI 0x01 |
565 | #define DA9063_GPIO4_PIN_GPO_OD 0x02 |
566 | #define DA9063_GPIO4_PIN_GPO 0x03 |
567 | #define DA9063_GPIO4_TYPE 0x04 |
568 | #define DA9063_GPIO4_TYPE_GPI_ACT_LOW 0x00 |
569 | #define DA9063_GPIO4_TYPE_GPO_VDD_IO1 0x00 |
570 | #define DA9063_GPIO4_TYPE_GPI_ACT_HIGH 0x04 |
571 | #define DA9063_GPIO4_TYPE_GPO_VDD_IO2 0x04 |
572 | #define DA9063_GPIO4_NO_WAKEUP 0x08 |
573 | #define DA9063_GPIO5_PIN_MASK 0x30 |
574 | #define DA9063_GPIO5_PIN_PERI_SW_G 0x00 |
575 | #define DA9063_GPIO5_PIN_GPI 0x10 |
576 | #define DA9063_GPIO5_PIN_GPO_OD 0x20 |
577 | #define DA9063_GPIO5_PIN_GPO 0x30 |
578 | #define DA9063_GPIO5_TYPE 0x40 |
579 | #define DA9063_GPIO5_TYPE_GPI_ACT_LOW 0x00 |
580 | #define DA9063_GPIO5_TYPE_GPO_VDD_IO1 0x00 |
581 | #define DA9063_GPIO5_TYPE_GPI_ACT_HIGH 0x04 |
582 | #define DA9063_GPIO5_TYPE_GPO_VDD_IO2 0x04 |
583 | #define DA9063_GPIO5_NO_WAKEUP 0x80 |
584 | |
585 | /* DA9063_REG_GPIO_6_7 (addr=0x18) */ |
586 | #define DA9063_GPIO6_PIN_MASK 0x03 |
587 | #define DA9063_GPIO6_PIN_PERI_SW_S 0x00 |
588 | #define DA9063_GPIO6_PIN_GPI 0x01 |
589 | #define DA9063_GPIO6_PIN_GPO_OD 0x02 |
590 | #define DA9063_GPIO6_PIN_GPO 0x03 |
591 | #define DA9063_GPIO6_TYPE 0x04 |
592 | #define DA9063_GPIO6_TYPE_GPI_ACT_LOW 0x00 |
593 | #define DA9063_GPIO6_TYPE_GPO_VDD_IO1 0x00 |
594 | #define DA9063_GPIO6_TYPE_GPI_ACT_HIGH 0x04 |
595 | #define DA9063_GPIO6_TYPE_GPO_VDD_IO2 0x04 |
596 | #define DA9063_GPIO6_NO_WAKEUP 0x08 |
597 | #define DA9063_GPIO7_PIN_MASK 0x30 |
598 | #define DA9063_GPIO7_PIN_GPI 0x10 |
599 | #define DA9063_GPIO7_PIN_GPO_PSS 0x20 |
600 | #define DA9063_GPIO7_PIN_GPO 0x30 |
601 | #define DA9063_GPIO7_TYPE 0x40 |
602 | #define DA9063_GPIO7_TYPE_GPI_ACT_LOW 0x00 |
603 | #define DA9063_GPIO7_TYPE_GPO_VDD_IO1 0x00 |
604 | #define DA9063_GPIO7_TYPE_GPI_ACT_HIGH 0x04 |
605 | #define DA9063_GPIO7_TYPE_GPO_VDD_IO2 0x04 |
606 | #define DA9063_GPIO7_NO_WAKEUP 0x80 |
607 | |
608 | /* DA9063_REG_GPIO_8_9 (addr=0x19) */ |
609 | #define DA9063_GPIO8_PIN_MASK 0x03 |
610 | #define DA9063_GPIO8_PIN_GPI_SYS_EN 0x00 |
611 | #define DA9063_GPIO8_PIN_GPI 0x01 |
612 | #define DA9063_GPIO8_PIN_GPO_PSS 0x02 |
613 | #define DA9063_GPIO8_PIN_GPO 0x03 |
614 | #define DA9063_GPIO8_TYPE 0x04 |
615 | #define DA9063_GPIO8_TYPE_GPI_ACT_LOW 0x00 |
616 | #define DA9063_GPIO8_TYPE_GPO_VDD_IO1 0x00 |
617 | #define DA9063_GPIO8_TYPE_GPI_ACT_HIGH 0x04 |
618 | #define DA9063_GPIO8_TYPE_GPO_VDD_IO2 0x04 |
619 | #define DA9063_GPIO8_NO_WAKEUP 0x08 |
620 | #define DA9063_GPIO9_PIN_MASK 0x30 |
621 | #define DA9063_GPIO9_PIN_GPI_PWR_EN 0x00 |
622 | #define DA9063_GPIO9_PIN_GPI 0x10 |
623 | #define DA9063_GPIO9_PIN_GPO_PSS 0x20 |
624 | #define DA9063_GPIO9_PIN_GPO 0x30 |
625 | #define DA9063_GPIO9_TYPE 0x40 |
626 | #define DA9063_GPIO9_TYPE_GPI_ACT_LOW 0x00 |
627 | #define DA9063_GPIO9_TYPE_GPO_VDD_IO1 0x00 |
628 | #define DA9063_GPIO9_TYPE_GPI_ACT_HIGH 0x04 |
629 | #define DA9063_GPIO9_TYPE_GPO_VDD_IO2 0x04 |
630 | #define DA9063_GPIO9_NO_WAKEUP 0x80 |
631 | |
632 | /* DA9063_REG_GPIO_10_11 (addr=0x1A) */ |
633 | #define DA9063_GPIO10_PIN_MASK 0x03 |
634 | #define DA9063_GPIO10_PIN_GPI_PWR1_EN 0x00 |
635 | #define DA9063_GPIO10_PIN_GPI 0x01 |
636 | #define DA9063_GPIO10_PIN_GPO_OD 0x02 |
637 | #define DA9063_GPIO10_PIN_GPO 0x03 |
638 | #define DA9063_GPIO10_TYPE 0x04 |
639 | #define DA9063_GPIO10_TYPE_GPI_ACT_LOW 0x00 |
640 | #define DA9063_GPIO10_TYPE_GPO_VDD_IO1 0x00 |
641 | #define DA9063_GPIO10_TYPE_GPI_ACT_HIGH 0x04 |
642 | #define DA9063_GPIO10_TYPE_GPO_VDD_IO2 0x04 |
643 | #define DA9063_GPIO10_NO_WAKEUP 0x08 |
644 | #define DA9063_GPIO11_PIN_MASK 0x30 |
645 | #define DA9063_GPIO11_PIN_GPO_OD 0x00 |
646 | #define DA9063_GPIO11_PIN_GPI 0x10 |
647 | #define DA9063_GPIO11_PIN_GPO_PSS 0x20 |
648 | #define DA9063_GPIO11_PIN_GPO 0x30 |
649 | #define DA9063_GPIO11_TYPE 0x40 |
650 | #define DA9063_GPIO11_TYPE_GPI_ACT_LOW 0x00 |
651 | #define DA9063_GPIO11_TYPE_GPO_VDD_IO1 0x00 |
652 | #define DA9063_GPIO11_TYPE_GPI_ACT_HIGH 0x04 |
653 | #define DA9063_GPIO11_TYPE_GPO_VDD_IO2 0x04 |
654 | #define DA9063_GPIO11_NO_WAKEUP 0x80 |
655 | |
656 | /* DA9063_REG_GPIO_12_13 (addr=0x1B) */ |
657 | #define DA9063_GPIO12_PIN_MASK 0x03 |
658 | #define DA9063_GPIO12_PIN_NVDDFLT_OUT 0x00 |
659 | #define DA9063_GPIO12_PIN_GPI 0x01 |
660 | #define DA9063_GPIO12_PIN_VSYSMON_OUT 0x02 |
661 | #define DA9063_GPIO12_PIN_GPO 0x03 |
662 | #define DA9063_GPIO12_TYPE 0x04 |
663 | #define DA9063_GPIO12_TYPE_GPI_ACT_LOW 0x00 |
664 | #define DA9063_GPIO12_TYPE_GPO_VDD_IO1 0x00 |
665 | #define DA9063_GPIO12_TYPE_GPI_ACT_HIGH 0x04 |
666 | #define DA9063_GPIO12_TYPE_GPO_VDD_IO2 0x04 |
667 | #define DA9063_GPIO12_NO_WAKEUP 0x08 |
668 | #define DA9063_GPIO13_PIN_MASK 0x30 |
669 | #define DA9063_GPIO13_PIN_GPFB1_OUT 0x00 |
670 | #define DA9063_GPIO13_PIN_GPI 0x10 |
671 | #define DA9063_GPIO13_PIN_GPFB1_OUTOD 0x20 |
672 | #define DA9063_GPIO13_PIN_GPO 0x30 |
673 | #define DA9063_GPIO13_TYPE 0x40 |
674 | #define DA9063_GPIO13_TYPE_GPFB1_OUT 0x00 |
675 | #define DA9063_GPIO13_TYPE_GPI 0x00 |
676 | #define DA9063_GPIO13_TYPE_GPFB1_OUTOD 0x04 |
677 | #define DA9063_GPIO13_TYPE_GPO 0x04 |
678 | #define DA9063_GPIO13_NO_WAKEUP 0x80 |
679 | |
680 | /* DA9063_REG_GPIO_14_15 (addr=0x1C) */ |
681 | #define DA9063_GPIO14_PIN_MASK 0x03 |
682 | #define DA9063_GPIO14_PIN_GPO_OD 0x00 |
683 | #define DA9063_GPIO14_PIN_GPI 0x01 |
684 | #define DA9063_GPIO14_PIN_HS2DATA 0x02 |
685 | #define DA9063_GPIO14_PIN_GPO 0x03 |
686 | #define DA9063_GPIO14_TYPE 0x04 |
687 | #define DA9063_GPIO14_TYPE_GPI_ACT_LOW 0x00 |
688 | #define DA9063_GPIO14_TYPE_GPO_VDD_IO1 0x00 |
689 | #define DA9063_GPIO14_TYPE_GPI_ACT_HIGH 0x04 |
690 | #define DA9063_GPIO14_TYPE_GPO_VDD_IO2 0x04 |
691 | #define DA9063_GPIO14_NO_WAKEUP 0x08 |
692 | #define DA9063_GPIO15_PIN_MASK 0x30 |
693 | #define DA9063_GPIO15_PIN_GPO_OD 0x00 |
694 | #define DA9063_GPIO15_PIN_GPI 0x10 |
695 | #define DA9063_GPIO15_PIN_GPO 0x30 |
696 | #define DA9063_GPIO15_TYPE 0x40 |
697 | #define DA9063_GPIO15_TYPE_GPFB1_OUT 0x00 |
698 | #define DA9063_GPIO15_TYPE_GPI 0x00 |
699 | #define DA9063_GPIO15_TYPE_GPFB1_OUTOD 0x04 |
700 | #define DA9063_GPIO15_TYPE_GPO 0x04 |
701 | #define DA9063_GPIO15_NO_WAKEUP 0x80 |
702 | |
703 | /* DA9063_REG_GPIO_MODE0_7 (addr=0x1D) */ |
704 | #define DA9063_GPIO0_MODE 0x01 |
705 | #define DA9063_GPIO1_MODE 0x02 |
706 | #define DA9063_GPIO2_MODE 0x04 |
707 | #define DA9063_GPIO3_MODE 0x08 |
708 | #define DA9063_GPIO4_MODE 0x10 |
709 | #define DA9063_GPIO5_MODE 0x20 |
710 | #define DA9063_GPIO6_MODE 0x40 |
711 | #define DA9063_GPIO7_MODE 0x80 |
712 | |
713 | /* DA9063_REG_GPIO_MODE8_15 (addr=0x1E) */ |
714 | #define DA9063_GPIO8_MODE 0x01 |
715 | #define DA9063_GPIO9_MODE 0x02 |
716 | #define DA9063_GPIO10_MODE 0x04 |
717 | #define DA9063_GPIO11_MODE 0x08 |
718 | #define DA9063_GPIO11_MODE_LED_ACT_HIGH 0x00 |
719 | #define DA9063_GPIO11_MODE_LED_ACT_LOW 0x08 |
720 | #define DA9063_GPIO12_MODE 0x10 |
721 | #define DA9063_GPIO13_MODE 0x20 |
722 | #define DA9063_GPIO14_MODE 0x40 |
723 | #define DA9063_GPIO14_MODE_LED_ACT_HIGH 0x00 |
724 | #define DA9063_GPIO14_MODE_LED_ACT_LOW 0x40 |
725 | #define DA9063_GPIO15_MODE 0x80 |
726 | #define DA9063_GPIO15_MODE_LED_ACT_HIGH 0x00 |
727 | #define DA9063_GPIO15_MODE_LED_ACT_LOW 0x80 |
728 | |
729 | /* DA9063_REG_SWITCH_CONT (addr=0x1F) */ |
730 | #define DA9063_CORE_SW_GPI_MASK 0x03 |
731 | #define DA9063_CORE_SW_GPI_OFF 0x00 |
732 | #define DA9063_CORE_SW_GPI_GPIO1 0x01 |
733 | #define DA9063_CORE_SW_GPI_GPIO2 0x02 |
734 | #define DA9063_CORE_SW_GPI_GPIO13 0x03 |
735 | #define DA9063_PERI_SW_GPI_MASK 0x0C |
736 | #define DA9063_PERI_SW_GPI_OFF 0x00 |
737 | #define DA9063_PERI_SW_GPI_GPIO1 0x04 |
738 | #define DA9063_PERI_SW_GPI_GPIO2 0x08 |
739 | #define DA9063_PERI_SW_GPI_GPIO13 0x0C |
740 | #define DA9063_SWITCH_SR_MASK 0x30 |
741 | #define DA9063_SWITCH_SR_1MV 0x00 |
742 | #define DA9063_SWITCH_SR_5MV 0x10 |
743 | #define DA9063_SWITCH_SR_10MV 0x20 |
744 | #define DA9063_SWITCH_SR_50MV 0x30 |
745 | #define DA9063_CORE_SW_INTERNAL 0x40 |
746 | #define DA9063_CP_EN_MODE 0x80 |
747 | |
748 | /* DA9063_REGL_Bxxxx_CONT common bits (addr=0x20-0x25) */ |
749 | #define DA9063_BUCK_EN 0x01 |
750 | #define DA9063_BUCK_GPI_MASK 0x06 |
751 | #define DA9063_BUCK_GPI_OFF 0x00 |
752 | #define DA9063_BUCK_GPI_GPIO1 0x02 |
753 | #define DA9063_BUCK_GPI_GPIO2 0x04 |
754 | #define DA9063_BUCK_GPI_GPIO13 0x06 |
755 | #define DA9063_BUCK_CONF 0x08 |
756 | #define DA9063_VBUCK_GPI_MASK 0x60 |
757 | #define DA9063_VBUCK_GPI_OFF 0x00 |
758 | #define DA9063_VBUCK_GPI_GPIO1 0x20 |
759 | #define DA9063_VBUCK_GPI_GPIO2 0x40 |
760 | #define DA9063_VBUCK_GPI_GPIO13 0x60 |
761 | |
762 | /* DA9063_REG_BCORE1_CONT specific bits (addr=0x21) */ |
763 | #define DA9063_CORE_SW_EN 0x10 |
764 | #define DA9063_CORE_SW_CONF 0x80 |
765 | |
766 | /* DA9063_REG_BPERI_CONT specific bits (addr=0x25) */ |
767 | #define DA9063_PERI_SW_EN 0x10 |
768 | #define DA9063_PERI_SW_CONF 0x80 |
769 | |
770 | /* DA9063_REG_LDOx_CONT common bits (addr=0x26-0x30) */ |
771 | #define DA9063_LDO_EN 0x01 |
772 | #define DA9063_LDO_GPI_MASK 0x06 |
773 | #define DA9063_LDO_GPI_OFF 0x00 |
774 | #define DA9063_LDO_GPI_GPIO1 0x02 |
775 | #define DA9063_LDO_GPI_GPIO2 0x04 |
776 | #define DA9063_LDO_GPI_GPIO13 0x06 |
777 | #define DA9063_LDO_PD_DIS 0x08 |
778 | #define DA9063_VLDO_GPI_MASK 0x60 |
779 | #define DA9063_VLDO_GPI_OFF 0x00 |
780 | #define DA9063_VLDO_GPI_GPIO1 0x20 |
781 | #define DA9063_VLDO_GPI_GPIO2 0x40 |
782 | #define DA9063_VLDO_GPI_GPIO13 0x60 |
783 | #define DA9063_LDO_CONF 0x80 |
784 | |
785 | /* DA9063_REG_LDO5_CONT specific bits (addr=0x2A) */ |
786 | #define DA9063_VLDO5_SEL 0x10 |
787 | |
788 | /* DA9063_REG_LDO6_CONT specific bits (addr=0x2B) */ |
789 | #define DA9063_VLDO6_SEL 0x10 |
790 | |
791 | /* DA9063_REG_LDO7_CONT specific bits (addr=0x2C) */ |
792 | #define DA9063_VLDO7_SEL 0x10 |
793 | |
794 | /* DA9063_REG_LDO8_CONT specific bits (addr=0x2D) */ |
795 | #define DA9063_VLDO8_SEL 0x10 |
796 | |
797 | /* DA9063_REG_LDO9_CONT specific bits (addr=0x2E) */ |
798 | #define DA9063_VLDO9_SEL 0x10 |
799 | |
800 | /* DA9063_REG_LDO10_CONT specific bits (addr=0x2F) */ |
801 | #define DA9063_VLDO10_SEL 0x10 |
802 | |
803 | /* DA9063_REG_LDO11_CONT specific bits (addr=0x30) */ |
804 | #define DA9063_VLDO11_SEL 0x10 |
805 | |
806 | /* DA9063_REG_VIB (addr=0x31) */ |
807 | #define DA9063_VIB_SET_MASK 0x3F |
808 | #define DA9063_VIB_SET_OFF 0 |
809 | #define DA9063_VIB_SET_MAX 0x3F |
810 | |
811 | /* DA9063_REG_DVC_1 (addr=0x32) */ |
812 | #define DA9063_VBCORE1_SEL 0x01 |
813 | #define DA9063_VBCORE2_SEL 0x02 |
814 | #define DA9063_VBPRO_SEL 0x04 |
815 | #define DA9063_VBMEM_SEL 0x08 |
816 | #define DA9063_VBPERI_SEL 0x10 |
817 | #define DA9063_VLDO1_SEL 0x20 |
818 | #define DA9063_VLDO2_SEL 0x40 |
819 | #define DA9063_VLDO3_SEL 0x80 |
820 | |
821 | /* DA9063_REG_DVC_2 (addr=0x33) */ |
822 | #define DA9063_VBIO_SEL 0x01 |
823 | #define DA9063_VLDO4_SEL 0x80 |
824 | |
825 | /* DA9063_REG_ADC_MAN (addr=0x34) */ |
826 | #define DA9063_ADC_MUX_MASK 0x0F |
827 | #define DA9063_ADC_MUX_VSYS 0x00 |
828 | #define DA9063_ADC_MUX_ADCIN1 0x01 |
829 | #define DA9063_ADC_MUX_ADCIN2 0x02 |
830 | #define DA9063_ADC_MUX_ADCIN3 0x03 |
831 | #define DA9063_ADC_MUX_T_SENSE 0x04 |
832 | #define DA9063_ADC_MUX_VBBAT 0x05 |
833 | #define DA9063_ADC_MUX_LDO_G1 0x08 |
834 | #define DA9063_ADC_MUX_LDO_G2 0x09 |
835 | #define DA9063_ADC_MUX_LDO_G3 0x0A |
836 | #define DA9063_ADC_MAN 0x10 |
837 | #define DA9063_ADC_MODE 0x20 |
838 | |
839 | /* DA9063_REG_ADC_CONT (addr=0x35) */ |
840 | #define DA9063_ADC_AUTO_VSYS_EN 0x01 |
841 | #define DA9063_ADC_AUTO_AD1_EN 0x02 |
842 | #define DA9063_ADC_AUTO_AD2_EN 0x04 |
843 | #define DA9063_ADC_AUTO_AD3_EN 0x08 |
844 | #define DA9063_ADC_AD1_ISRC_EN 0x10 |
845 | #define DA9063_ADC_AD2_ISRC_EN 0x20 |
846 | #define DA9063_ADC_AD3_ISRC_EN 0x40 |
847 | #define DA9063_COMP1V2_EN 0x80 |
848 | |
849 | /* DA9063_REG_VSYS_MON (addr=0x36) */ |
850 | #define DA9063_VSYS_VAL_MASK 0xFF |
851 | #define DA9063_VSYS_VAL_BASE 0x00 |
852 | |
853 | /* DA9063_REG_ADC_RES_L (addr=0x37) */ |
854 | #define DA9063_ADC_RES_L_BITS 2 |
855 | #define DA9063_ADC_RES_L_MASK 0xC0 |
856 | |
857 | /* DA9063_REG_ADC_RES_H (addr=0x38) */ |
858 | #define DA9063_ADC_RES_M_BITS 8 |
859 | #define DA9063_ADC_RES_M_MASK 0xFF |
860 | |
861 | /* DA9063_REG_(xxx_RES/ADC_RES_H) (addr=0x39-0x3F) */ |
862 | #define DA9063_ADC_VAL_MASK 0xFF |
863 | |
864 | /* DA9063_REG_COUNT_S (addr=0x40) */ |
865 | #define DA9063_RTC_READ 0x80 |
866 | #define DA9063_COUNT_SEC_MASK 0x3F |
867 | |
868 | /* DA9063_REG_COUNT_MI (addr=0x41) */ |
869 | #define DA9063_COUNT_MIN_MASK 0x3F |
870 | |
871 | /* DA9063_REG_COUNT_H (addr=0x42) */ |
872 | #define DA9063_COUNT_HOUR_MASK 0x1F |
873 | |
874 | /* DA9063_REG_COUNT_D (addr=0x43) */ |
875 | #define DA9063_COUNT_DAY_MASK 0x1F |
876 | |
877 | /* DA9063_REG_COUNT_MO (addr=0x44) */ |
878 | #define DA9063_COUNT_MONTH_MASK 0x0F |
879 | |
880 | /* DA9063_REG_COUNT_Y (addr=0x45) */ |
881 | #define DA9063_COUNT_YEAR_MASK 0x3F |
882 | #define DA9063_MONITOR 0x40 |
883 | |
884 | /* DA9063_REG_ALARM_S (addr=0x46) */ |
885 | #define DA9063_BB_ALARM_S_MASK 0x3F |
886 | #define DA9063_ALARM_STATUS_ALARM 0x80 |
887 | #define DA9063_ALARM_STATUS_TICK 0x40 |
888 | /* DA9063_REG_ALARM_MI (addr=0x47) */ |
889 | #define DA9063_ALARM_MIN_MASK 0x3F |
890 | |
891 | /* DA9063_REG_ALARM_H (addr=0x48) */ |
892 | #define DA9063_ALARM_HOUR_MASK 0x1F |
893 | |
894 | /* DA9063_REG_ALARM_D (addr=0x49) */ |
895 | #define DA9063_ALARM_DAY_MASK 0x1F |
896 | |
897 | /* DA9063_REG_ALARM_MO (addr=0x4A) */ |
898 | #define DA9063_TICK_WAKE 0x20 |
899 | #define DA9063_TICK_TYPE 0x10 |
900 | #define DA9063_TICK_TYPE_SEC 0x00 |
901 | #define DA9063_TICK_TYPE_MIN 0x10 |
902 | #define DA9063_ALARM_MONTH_MASK 0x0F |
903 | |
904 | /* DA9063_REG_ALARM_Y (addr=0x4B) */ |
905 | #define DA9063_TICK_ON 0x80 |
906 | #define DA9063_ALARM_ON 0x40 |
907 | #define DA9063_ALARM_YEAR_MASK 0x3F |
908 | |
909 | /* DA9063_REG_WAIT (addr=0x97)*/ |
910 | #define DA9063_REG_WAIT_TIME_MASK 0xF |
911 | #define DA9063_WAIT_TIME_0_US 0x0 |
912 | #define DA9063_WAIT_TIME_512_US 0x1 |
913 | #define DA9063_WAIT_TIME_1_MS 0x2 |
914 | #define DA9063_WAIT_TIME_2_MS 0x3 |
915 | #define DA9063_WAIT_TIME_4_1_MS 0x4 |
916 | #define DA9063_WAIT_TIME_8_2_MS 0x5 |
917 | #define DA9063_WAIT_TIME_16_4_MS 0x6 |
918 | #define DA9063_WAIT_TIME_32_8_MS 0x7 |
919 | #define DA9063_WAIT_TIME_65_5_MS 0x8 |
920 | #define DA9063_WAIT_TIME_128_MS 0x9 |
921 | #define DA9063_WAIT_TIME_256_MS 0xA |
922 | #define DA9063_WAIT_TIME_512_MS 0xB |
923 | #define DA9063_WAIT_TIME_1_S 0xC |
924 | #define DA9063_WAIT_TIME_2_1_S 0xD |
925 | |
926 | /* DA9063_REG_EN_32K (addr=0x98)*/ |
927 | #define DA9063_STABILIZ_TIME_MASK 0x7 |
928 | #define DA9063_CRYSTAL 0x08 |
929 | #define DA9063_DELAY_MODE 0x10 |
930 | #define DA9063_OUT_CLOCK 0x20 |
931 | #define DA9063_RTC_CLOCK 0x40 |
932 | #define DA9063_OUT_32K_EN 0x80 |
933 | |
934 | /* DA9063_REG_BUCK_ILIM_A (addr=0x9A) */ |
935 | #define DA9063_BIO_ILIM_MASK 0x0F |
936 | #define DA9063_BMEM_ILIM_MASK 0xF0 |
937 | |
938 | /* DA9063_REG_BUCK_ILIM_B (addr=0x9B) */ |
939 | #define DA9063_BPRO_ILIM_MASK 0x0F |
940 | #define DA9063_BPERI_ILIM_MASK 0xF0 |
941 | |
942 | /* DA9063_REG_BUCK_ILIM_C (addr=0x9C) */ |
943 | #define DA9063_BCORE1_ILIM_MASK 0x0F |
944 | #define DA9063_BCORE2_ILIM_MASK 0xF0 |
945 | |
946 | /* DA9063_REG_Bxxxx_CFG common bits (addr=0x9D-0xA2) */ |
947 | #define DA9063_BUCK_FB_MASK 0x07 |
948 | #define DA9063_BUCK_PD_DIS_MASK 0x20 |
949 | #define DA9063_BUCK_MODE_MASK 0xC0 |
950 | #define DA9063_BUCK_MODE_MANUAL 0x00 |
951 | #define DA9063_BUCK_MODE_SLEEP 0x40 |
952 | #define DA9063_BUCK_MODE_SYNC 0x80 |
953 | #define DA9063_BUCK_MODE_AUTO 0xC0 |
954 | |
955 | /* DA9063_REG_BPRO_CFG (addr=0x9F) */ |
956 | #define DA9063_BPRO_VTTR_EN 0x08 |
957 | #define DA9063_BPRO_VTT_EN 0x10 |
958 | |
959 | /* DA9063_REG_VBxxxx_A/B (addr=0xA3-0xA8, 0xB4-0xB9) */ |
960 | #define DA9063_VBUCK_MASK 0x7F |
961 | #define DA9063_VBUCK_BIAS 0 |
962 | #define DA9063_BUCK_SL 0x80 |
963 | |
964 | /* DA9063_REG_VLDOx_A/B (addr=0xA9-0x3, 0xBA-0xC4) */ |
965 | #define DA9063_LDO_SL 0x80 |
966 | |
967 | /* DA9063_REG_VLDO1_A/B (addr=0xA9, 0xBA) */ |
968 | #define DA9063_VLDO1_MASK 0x3F |
969 | #define DA9063_VLDO1_BIAS 0 |
970 | |
971 | /* DA9063_REG_VLDO2_A/B (addr=0xAA, 0xBB) */ |
972 | #define DA9063_VLDO2_MASK 0x3F |
973 | #define DA9063_VLDO2_BIAS 0 |
974 | |
975 | /* DA9063_REG_VLDO3_A/B (addr=0xAB, 0xBC) */ |
976 | #define DA9063_VLDO3_MASK 0x7F |
977 | #define DA9063_VLDO3_BIAS 0 |
978 | |
979 | /* DA9063_REG_VLDO4_A/B (addr=0xAC, 0xBD) */ |
980 | #define DA9063_VLDO4_MASK 0x7F |
981 | #define DA9063_VLDO4_BIAS 0 |
982 | |
983 | /* DA9063_REG_VLDO5_A/B (addr=0xAD, 0xBE) */ |
984 | #define DA9063_VLDO5_MASK 0x3F |
985 | #define DA9063_VLDO5_BIAS 2 |
986 | |
987 | /* DA9063_REG_VLDO6_A/B (addr=0xAE, 0xBF) */ |
988 | #define DA9063_VLDO6_MASK 0x3F |
989 | #define DA9063_VLDO6_BIAS 2 |
990 | |
991 | /* DA9063_REG_VLDO7_A/B (addr=0xAF, 0xC0) */ |
992 | #define DA9063_VLDO7_MASK 0x3F |
993 | #define DA9063_VLDO7_BIAS 2 |
994 | |
995 | /* DA9063_REG_VLDO8_A/B (addr=0xB0, 0xC1) */ |
996 | #define DA9063_VLDO8_MASK 0x3F |
997 | #define DA9063_VLDO8_BIAS 2 |
998 | |
999 | /* DA9063_REG_VLDO9_A/B (addr=0xB1, 0xC2) */ |
1000 | #define DA9063_VLDO9_MASK 0x3F |
1001 | #define DA9063_VLDO9_BIAS 3 |
1002 | |
1003 | /* DA9063_REG_VLDO10_A/B (addr=0xB2, 0xC3) */ |
1004 | #define DA9063_VLDO10_MASK 0x3F |
1005 | #define DA9063_VLDO10_BIAS 2 |
1006 | |
1007 | /* DA9063_REG_VLDO11_A/B (addr=0xB3, 0xC4) */ |
1008 | #define DA9063_VLDO11_MASK 0x3F |
1009 | #define DA9063_VLDO11_BIAS 2 |
1010 | |
1011 | /* DA9063_REG_GPO11_LED (addr=0xC6) */ |
1012 | /* DA9063_REG_GPO14_LED (addr=0xC7) */ |
1013 | /* DA9063_REG_GPO15_LED (addr=0xC8) */ |
1014 | #define DA9063_GPIO_DIM 0x80 |
1015 | #define DA9063_GPIO_PWM_MASK 0x7F |
1016 | |
1017 | /* DA9063_REG_CONFIG_H (addr=0x10D) */ |
1018 | #define DA9063_PWM_CLK_MASK 0x01 |
1019 | #define DA9063_PWM_CLK_PWM2MHZ 0x00 |
1020 | #define DA9063_PWM_CLK_PWM1MHZ 0x01 |
1021 | #define DA9063_LDO8_MODE_MASK 0x02 |
1022 | #define DA9063_LDO8_MODE_LDO 0 |
1023 | #define DA9063_LDO8_MODE_VIBR 0x02 |
1024 | #define DA9063_MERGE_SENSE_MASK 0x04 |
1025 | #define DA9063_MERGE_SENSE_GP_FB2 0x00 |
1026 | #define DA9063_MERGE_SENSE_GPIO4 0x04 |
1027 | #define DA9063_BCORE_MERGE 0x08 |
1028 | #define DA9063_BPRO_OD 0x10 |
1029 | #define DA9063_BCORE2_OD 0x20 |
1030 | #define DA9063_BCORE1_OD 0x40 |
1031 | #define DA9063_BUCK_MERGE 0x80 |
1032 | |
1033 | /* DA9063_REG_CONFIG_I (addr=0x10E) */ |
1034 | #define DA9063_NONKEY_PIN_MASK 0x03 |
1035 | #define DA9063_NONKEY_PIN_PORT 0x00 |
1036 | #define DA9063_NONKEY_PIN_SWDOWN 0x01 |
1037 | #define DA9063_NONKEY_PIN_AUTODOWN 0x02 |
1038 | #define DA9063_NONKEY_PIN_AUTOFLPRT 0x03 |
1039 | |
1040 | /* DA9063_REG_CONFIG_J (addr=0x10F) */ |
1041 | #define DA9063_TWOWIRE_TO 0x40 |
1042 | |
1043 | /* DA9063_REG_MON_REG_2 (addr=0x115) */ |
1044 | #define DA9063_LDO1_MON_EN 0x01 |
1045 | #define DA9063_LDO2_MON_EN 0x02 |
1046 | #define DA9063_LDO3_MON_EN 0x04 |
1047 | #define DA9063_LDO4_MON_EN 0x08 |
1048 | #define DA9063_LDO5_MON_EN 0x10 |
1049 | #define DA9063_LDO6_MON_EN 0x20 |
1050 | #define DA9063_LDO7_MON_EN 0x40 |
1051 | #define DA9063_LDO8_MON_EN 0x80 |
1052 | |
1053 | /* DA9063_REG_MON_REG_3 (addr=0x116) */ |
1054 | #define DA9063_LDO9_MON_EN 0x01 |
1055 | #define DA9063_LDO10_MON_EN 0x02 |
1056 | #define DA9063_LDO11_MON_EN 0x04 |
1057 | |
1058 | /* DA9063_REG_MON_REG_4 (addr=0x117) */ |
1059 | #define DA9063_BCORE1_MON_EN 0x04 |
1060 | #define DA9063_BCORE2_MON_EN 0x08 |
1061 | #define DA9063_BPRO_MON_EN 0x10 |
1062 | #define DA9063_BIO_MON_EN 0x20 |
1063 | #define DA9063_BMEM_MON_EN 0x40 |
1064 | #define DA9063_BPERI_MON_EN 0x80 |
1065 | |
1066 | /* DA9063_REG_MON_REG_5 (addr=0x116) */ |
1067 | #define DA9063_MON_A8_IDX_MASK 0x07 |
1068 | #define DA9063_MON_A8_IDX_NONE 0x00 |
1069 | #define DA9063_MON_A8_IDX_BCORE1 0x01 |
1070 | #define DA9063_MON_A8_IDX_BCORE2 0x02 |
1071 | #define DA9063_MON_A8_IDX_BPRO 0x03 |
1072 | #define DA9063_MON_A8_IDX_LDO3 0x04 |
1073 | #define DA9063_MON_A8_IDX_LDO4 0x05 |
1074 | #define DA9063_MON_A8_IDX_LDO11 0x06 |
1075 | #define DA9063_MON_A9_IDX_MASK 0x70 |
1076 | #define DA9063_MON_A9_IDX_NONE 0x00 |
1077 | #define DA9063_MON_A9_IDX_BIO 0x01 |
1078 | #define DA9063_MON_A9_IDX_BMEM 0x02 |
1079 | #define DA9063_MON_A9_IDX_BPERI 0x03 |
1080 | #define DA9063_MON_A9_IDX_LDO1 0x04 |
1081 | #define DA9063_MON_A9_IDX_LDO2 0x05 |
1082 | #define DA9063_MON_A9_IDX_LDO5 0x06 |
1083 | |
1084 | /* DA9063_REG_MON_REG_6 (addr=0x117) */ |
1085 | #define DA9063_MON_A10_IDX_MASK 0x07 |
1086 | #define DA9063_MON_A10_IDX_NONE 0x00 |
1087 | #define DA9063_MON_A10_IDX_LDO6 0x01 |
1088 | #define DA9063_MON_A10_IDX_LDO7 0x02 |
1089 | #define DA9063_MON_A10_IDX_LDO8 0x03 |
1090 | #define DA9063_MON_A10_IDX_LDO9 0x04 |
1091 | #define DA9063_MON_A10_IDX_LDO10 0x05 |
1092 | |
1093 | /* DA9063_REG_VARIANT_ID (addr=0x182) */ |
1094 | #define DA9063_VARIANT_ID_VRC_SHIFT 0 |
1095 | #define DA9063_VARIANT_ID_VRC_MASK 0x0F |
1096 | #define DA9063_VARIANT_ID_MRC_SHIFT 4 |
1097 | #define DA9063_VARIANT_ID_MRC_MASK 0xF0 |
1098 | |
1099 | #endif /* _DA9063_REG_H */ |
1100 | |