1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * max8998-private.h - Voltage regulator driver for the Maxim 8998 |
4 | * |
5 | * Copyright (C) 2009-2010 Samsung Electrnoics |
6 | * Kyungmin Park <kyungmin.park@samsung.com> |
7 | * Marek Szyprowski <m.szyprowski@samsung.com> |
8 | */ |
9 | |
10 | #ifndef __LINUX_MFD_MAX8998_PRIV_H |
11 | #define __LINUX_MFD_MAX8998_PRIV_H |
12 | |
13 | #define MAX8998_NUM_IRQ_REGS 4 |
14 | |
15 | /* MAX 8998 registers */ |
16 | enum { |
17 | MAX8998_REG_IRQ1, |
18 | MAX8998_REG_IRQ2, |
19 | MAX8998_REG_IRQ3, |
20 | MAX8998_REG_IRQ4, |
21 | MAX8998_REG_IRQM1, |
22 | MAX8998_REG_IRQM2, |
23 | MAX8998_REG_IRQM3, |
24 | MAX8998_REG_IRQM4, |
25 | MAX8998_REG_STATUS1, |
26 | MAX8998_REG_STATUS2, |
27 | MAX8998_REG_STATUSM1, |
28 | MAX8998_REG_STATUSM2, |
29 | MAX8998_REG_CHGR1, |
30 | MAX8998_REG_CHGR2, |
31 | MAX8998_REG_LDO_ACTIVE_DISCHARGE1, |
32 | MAX8998_REG_LDO_ACTIVE_DISCHARGE2, |
33 | MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, |
34 | MAX8998_REG_ONOFF1, |
35 | MAX8998_REG_ONOFF2, |
36 | MAX8998_REG_ONOFF3, |
37 | MAX8998_REG_ONOFF4, |
38 | MAX8998_REG_BUCK1_VOLTAGE1, |
39 | MAX8998_REG_BUCK1_VOLTAGE2, |
40 | MAX8998_REG_BUCK1_VOLTAGE3, |
41 | MAX8998_REG_BUCK1_VOLTAGE4, |
42 | MAX8998_REG_BUCK2_VOLTAGE1, |
43 | MAX8998_REG_BUCK2_VOLTAGE2, |
44 | MAX8998_REG_BUCK3, |
45 | MAX8998_REG_BUCK4, |
46 | MAX8998_REG_LDO2_LDO3, |
47 | MAX8998_REG_LDO4, |
48 | MAX8998_REG_LDO5, |
49 | MAX8998_REG_LDO6, |
50 | MAX8998_REG_LDO7, |
51 | MAX8998_REG_LDO8_LDO9, |
52 | MAX8998_REG_LDO10_LDO11, |
53 | MAX8998_REG_LDO12, |
54 | MAX8998_REG_LDO13, |
55 | MAX8998_REG_LDO14, |
56 | MAX8998_REG_LDO15, |
57 | MAX8998_REG_LDO16, |
58 | MAX8998_REG_LDO17, |
59 | MAX8998_REG_BKCHR, |
60 | MAX8998_REG_LBCNFG1, |
61 | MAX8998_REG_LBCNFG2, |
62 | }; |
63 | |
64 | /* IRQ definitions */ |
65 | enum { |
66 | MAX8998_IRQ_DCINF, |
67 | MAX8998_IRQ_DCINR, |
68 | MAX8998_IRQ_JIGF, |
69 | MAX8998_IRQ_JIGR, |
70 | MAX8998_IRQ_PWRONF, |
71 | MAX8998_IRQ_PWRONR, |
72 | |
73 | MAX8998_IRQ_WTSREVNT, |
74 | MAX8998_IRQ_SMPLEVNT, |
75 | MAX8998_IRQ_ALARM1, |
76 | MAX8998_IRQ_ALARM0, |
77 | |
78 | MAX8998_IRQ_ONKEY1S, |
79 | MAX8998_IRQ_TOPOFFR, |
80 | MAX8998_IRQ_DCINOVPR, |
81 | MAX8998_IRQ_CHGRSTF, |
82 | MAX8998_IRQ_DONER, |
83 | MAX8998_IRQ_CHGFAULT, |
84 | |
85 | MAX8998_IRQ_LOBAT1, |
86 | MAX8998_IRQ_LOBAT2, |
87 | |
88 | MAX8998_IRQ_NR, |
89 | }; |
90 | |
91 | /* MAX8998 various variants */ |
92 | enum { |
93 | TYPE_MAX8998 = 0, /* Default */ |
94 | TYPE_LP3974, /* National version of MAX8998 */ |
95 | TYPE_LP3979, /* Added AVS */ |
96 | }; |
97 | |
98 | #define MAX8998_IRQ_DCINF_MASK (1 << 2) |
99 | #define MAX8998_IRQ_DCINR_MASK (1 << 3) |
100 | #define MAX8998_IRQ_JIGF_MASK (1 << 4) |
101 | #define MAX8998_IRQ_JIGR_MASK (1 << 5) |
102 | #define MAX8998_IRQ_PWRONF_MASK (1 << 6) |
103 | #define MAX8998_IRQ_PWRONR_MASK (1 << 7) |
104 | |
105 | #define MAX8998_IRQ_WTSREVNT_MASK (1 << 0) |
106 | #define MAX8998_IRQ_SMPLEVNT_MASK (1 << 1) |
107 | #define MAX8998_IRQ_ALARM1_MASK (1 << 2) |
108 | #define MAX8998_IRQ_ALARM0_MASK (1 << 3) |
109 | |
110 | #define MAX8998_IRQ_ONKEY1S_MASK (1 << 0) |
111 | #define MAX8998_IRQ_TOPOFFR_MASK (1 << 2) |
112 | #define MAX8998_IRQ_DCINOVPR_MASK (1 << 3) |
113 | #define MAX8998_IRQ_CHGRSTF_MASK (1 << 4) |
114 | #define MAX8998_IRQ_DONER_MASK (1 << 5) |
115 | #define MAX8998_IRQ_CHGFAULT_MASK (1 << 7) |
116 | |
117 | #define MAX8998_IRQ_LOBAT1_MASK (1 << 0) |
118 | #define MAX8998_IRQ_LOBAT2_MASK (1 << 1) |
119 | |
120 | #define MAX8998_ENRAMP (1 << 4) |
121 | |
122 | struct irq_domain; |
123 | |
124 | /** |
125 | * struct max8998_dev - max8998 master device for sub-drivers |
126 | * @dev: master device of the chip (can be used to access platform data) |
127 | * @pdata: platform data for the driver and subdrivers |
128 | * @i2c: i2c client private data for regulator |
129 | * @rtc: i2c client private data for rtc |
130 | * @iolock: mutex for serializing io access |
131 | * @irqlock: mutex for buslock |
132 | * @irq_base: base IRQ number for max8998, required for IRQs |
133 | * @irq: generic IRQ number for max8998 |
134 | * @ono: power onoff IRQ number for max8998 |
135 | * @irq_masks_cur: currently active value |
136 | * @irq_masks_cache: cached hardware value |
137 | * @type: indicate which max8998 "variant" is used |
138 | */ |
139 | struct max8998_dev { |
140 | struct device *dev; |
141 | struct max8998_platform_data *pdata; |
142 | struct i2c_client *i2c; |
143 | struct i2c_client *rtc; |
144 | struct mutex iolock; |
145 | struct mutex irqlock; |
146 | |
147 | unsigned int irq_base; |
148 | struct irq_domain *irq_domain; |
149 | int irq; |
150 | int ono; |
151 | u8 irq_masks_cur[MAX8998_NUM_IRQ_REGS]; |
152 | u8 irq_masks_cache[MAX8998_NUM_IRQ_REGS]; |
153 | unsigned long type; |
154 | bool wakeup; |
155 | }; |
156 | |
157 | int max8998_irq_init(struct max8998_dev *max8998); |
158 | void max8998_irq_exit(struct max8998_dev *max8998); |
159 | int max8998_irq_resume(struct max8998_dev *max8998); |
160 | |
161 | extern int max8998_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest); |
162 | extern int max8998_bulk_read(struct i2c_client *i2c, u8 reg, int count, |
163 | u8 *buf); |
164 | extern int max8998_write_reg(struct i2c_client *i2c, u8 reg, u8 value); |
165 | extern int max8998_bulk_write(struct i2c_client *i2c, u8 reg, int count, |
166 | u8 *buf); |
167 | extern int max8998_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask); |
168 | |
169 | #endif /* __LINUX_MFD_MAX8998_PRIV_H */ |
170 | |