1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com> |
4 | */ |
5 | |
6 | #ifndef __MFD_MT6323_CORE_H__ |
7 | #define __MFD_MT6323_CORE_H__ |
8 | |
9 | enum MT6323_IRQ_STATUS_numbers { |
10 | MT6323_IRQ_STATUS_SPKL_AB = 0, |
11 | MT6323_IRQ_STATUS_SPKL, |
12 | MT6323_IRQ_STATUS_BAT_L, |
13 | MT6323_IRQ_STATUS_BAT_H, |
14 | MT6323_IRQ_STATUS_WATCHDOG, |
15 | MT6323_IRQ_STATUS_PWRKEY, |
16 | MT6323_IRQ_STATUS_THR_L, |
17 | MT6323_IRQ_STATUS_THR_H, |
18 | MT6323_IRQ_STATUS_VBATON_UNDET, |
19 | MT6323_IRQ_STATUS_BVALID_DET, |
20 | MT6323_IRQ_STATUS_CHRDET, |
21 | MT6323_IRQ_STATUS_OV, |
22 | MT6323_IRQ_STATUS_LDO = 16, |
23 | MT6323_IRQ_STATUS_FCHRKEY, |
24 | MT6323_IRQ_STATUS_ACCDET, |
25 | MT6323_IRQ_STATUS_AUDIO, |
26 | MT6323_IRQ_STATUS_RTC, |
27 | MT6323_IRQ_STATUS_VPROC, |
28 | MT6323_IRQ_STATUS_VSYS, |
29 | MT6323_IRQ_STATUS_VPA, |
30 | MT6323_IRQ_STATUS_NR, |
31 | }; |
32 | |
33 | #endif /* __MFD_MT6323_CORE_H__ */ |
34 | |