1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Freescale MXS Low Resolution Analog-to-Digital Converter driver |
4 | * |
5 | * Copyright (c) 2012 DENX Software Engineering, GmbH. |
6 | * Copyright (c) 2016 Ksenija Stanojevic <ksenija.stanojevic@gmail.com> |
7 | * |
8 | * Author: Marek Vasut <marex@denx.de> |
9 | */ |
10 | |
11 | #ifndef __MFD_MXS_LRADC_H |
12 | #define __MFD_MXS_LRADC_H |
13 | |
14 | #include <linux/bitops.h> |
15 | #include <linux/io.h> |
16 | #include <linux/stmp_device.h> |
17 | |
18 | #define LRADC_MAX_DELAY_CHANS 4 |
19 | #define LRADC_MAX_MAPPED_CHANS 8 |
20 | #define LRADC_MAX_TOTAL_CHANS 16 |
21 | |
22 | #define LRADC_DELAY_TIMER_HZ 2000 |
23 | |
24 | #define LRADC_CTRL0 0x00 |
25 | # define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23) |
26 | # define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22) |
27 | # define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21) |
28 | # define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20) |
29 | # define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19) |
30 | # define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18) |
31 | # define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17) |
32 | # define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16) |
33 | |
34 | # define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20) |
35 | # define LRADC_CTRL0_MX23_YM BIT(19) |
36 | # define LRADC_CTRL0_MX23_XM BIT(18) |
37 | # define LRADC_CTRL0_MX23_YP BIT(17) |
38 | # define LRADC_CTRL0_MX23_XP BIT(16) |
39 | |
40 | # define LRADC_CTRL0_MX28_PLATE_MASK \ |
41 | (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \ |
42 | LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \ |
43 | LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \ |
44 | LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW) |
45 | |
46 | # define LRADC_CTRL0_MX23_PLATE_MASK \ |
47 | (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \ |
48 | LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \ |
49 | LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP) |
50 | |
51 | #define LRADC_CTRL1 0x10 |
52 | #define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24) |
53 | #define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16)) |
54 | #define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16) |
55 | #define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16) |
56 | #define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16 |
57 | #define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8) |
58 | #define LRADC_CTRL1_LRADC_IRQ(n) BIT(n) |
59 | #define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff |
60 | #define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff |
61 | #define LRADC_CTRL1_LRADC_IRQ_OFFSET 0 |
62 | |
63 | #define LRADC_CTRL2 0x20 |
64 | #define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24 |
65 | #define LRADC_CTRL2_TEMPSENSE_PWD BIT(15) |
66 | |
67 | #define LRADC_STATUS 0x40 |
68 | #define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0) |
69 | |
70 | #define LRADC_CH(n) (0x50 + (0x10 * (n))) |
71 | #define LRADC_CH_ACCUMULATE BIT(29) |
72 | #define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24) |
73 | #define LRADC_CH_NUM_SAMPLES_OFFSET 24 |
74 | #define LRADC_CH_NUM_SAMPLES(x) \ |
75 | ((x) << LRADC_CH_NUM_SAMPLES_OFFSET) |
76 | #define LRADC_CH_VALUE_MASK 0x3ffff |
77 | #define LRADC_CH_VALUE_OFFSET 0 |
78 | |
79 | #define LRADC_DELAY(n) (0xd0 + (0x10 * (n))) |
80 | #define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xffUL << 24) |
81 | #define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24 |
82 | #define LRADC_DELAY_TRIGGER(x) \ |
83 | (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \ |
84 | LRADC_DELAY_TRIGGER_LRADCS_MASK) |
85 | #define LRADC_DELAY_KICK BIT(20) |
86 | #define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16) |
87 | #define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16 |
88 | #define LRADC_DELAY_TRIGGER_DELAYS(x) \ |
89 | (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \ |
90 | LRADC_DELAY_TRIGGER_DELAYS_MASK) |
91 | #define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11) |
92 | #define LRADC_DELAY_LOOP_COUNT_OFFSET 11 |
93 | #define LRADC_DELAY_LOOP(x) \ |
94 | (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \ |
95 | LRADC_DELAY_LOOP_COUNT_MASK) |
96 | #define LRADC_DELAY_DELAY_MASK 0x7ff |
97 | #define LRADC_DELAY_DELAY_OFFSET 0 |
98 | #define LRADC_DELAY_DELAY(x) \ |
99 | (((x) << LRADC_DELAY_DELAY_OFFSET) & \ |
100 | LRADC_DELAY_DELAY_MASK) |
101 | |
102 | #define LRADC_CTRL4 0x140 |
103 | #define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4)) |
104 | #define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4) |
105 | #define LRADC_CTRL4_LRADCSELECT(n, x) \ |
106 | (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \ |
107 | LRADC_CTRL4_LRADCSELECT_MASK(n)) |
108 | |
109 | #define LRADC_RESOLUTION 12 |
110 | #define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1) |
111 | |
112 | #define BUFFER_VCHANS_LIMITED 0x3f |
113 | #define BUFFER_VCHANS_ALL 0xff |
114 | |
115 | /* |
116 | * Certain LRADC channels are shared between touchscreen |
117 | * and/or touch-buttons and generic LRADC block. Therefore when using |
118 | * either of these, these channels are not available for the regular |
119 | * sampling. The shared channels are as follows: |
120 | * |
121 | * CH0 -- Touch button #0 |
122 | * CH1 -- Touch button #1 |
123 | * CH2 -- Touch screen XPUL |
124 | * CH3 -- Touch screen YPLL |
125 | * CH4 -- Touch screen XNUL |
126 | * CH5 -- Touch screen YNLR |
127 | * CH6 -- Touch screen WIPER (5-wire only) |
128 | * |
129 | * The bit fields below represents which parts of the LRADC block are |
130 | * switched into special mode of operation. These channels can not |
131 | * be sampled as regular LRADC channels. The driver will refuse any |
132 | * attempt to sample these channels. |
133 | */ |
134 | #define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0)) |
135 | #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2) |
136 | #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2) |
137 | |
138 | enum mxs_lradc_id { |
139 | IMX23_LRADC, |
140 | IMX28_LRADC, |
141 | }; |
142 | |
143 | enum mxs_lradc_ts_wires { |
144 | MXS_LRADC_TOUCHSCREEN_NONE = 0, |
145 | MXS_LRADC_TOUCHSCREEN_4WIRE, |
146 | MXS_LRADC_TOUCHSCREEN_5WIRE, |
147 | }; |
148 | |
149 | /** |
150 | * struct mxs_lradc |
151 | * @soc: soc type (IMX23 or IMX28) |
152 | * @clk: 2 kHz clock for delay units |
153 | * @buffer_vchans: channels that can be used during buffered capture |
154 | * @touchscreen_wire: touchscreen type (4-wire or 5-wire) |
155 | * @use_touchbutton: button state (on or off) |
156 | */ |
157 | struct mxs_lradc { |
158 | enum mxs_lradc_id soc; |
159 | struct clk *clk; |
160 | u8 buffer_vchans; |
161 | |
162 | enum mxs_lradc_ts_wires touchscreen_wire; |
163 | bool use_touchbutton; |
164 | }; |
165 | |
166 | static inline u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc) |
167 | { |
168 | switch (lradc->soc) { |
169 | case IMX23_LRADC: |
170 | return LRADC_CTRL1_MX23_LRADC_IRQ_MASK; |
171 | case IMX28_LRADC: |
172 | return LRADC_CTRL1_MX28_LRADC_IRQ_MASK; |
173 | default: |
174 | return 0; |
175 | } |
176 | } |
177 | |
178 | #endif /* __MXS_LRADC_H */ |
179 | |