1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * core.h -- Core driver for NXP PCF50633 |
4 | * |
5 | * (C) 2006-2008 by Openmoko, Inc. |
6 | * All rights reserved. |
7 | */ |
8 | |
9 | #ifndef __LINUX_MFD_PCF50633_CORE_H |
10 | #define __LINUX_MFD_PCF50633_CORE_H |
11 | |
12 | #include <linux/i2c.h> |
13 | #include <linux/workqueue.h> |
14 | #include <linux/regulator/driver.h> |
15 | #include <linux/regulator/machine.h> |
16 | #include <linux/pm.h> |
17 | #include <linux/power_supply.h> |
18 | #include <linux/mfd/pcf50633/backlight.h> |
19 | |
20 | struct pcf50633; |
21 | struct regmap; |
22 | |
23 | #define PCF50633_NUM_REGULATORS 11 |
24 | |
25 | struct pcf50633_platform_data { |
26 | struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS]; |
27 | |
28 | char **batteries; |
29 | int num_batteries; |
30 | |
31 | /* |
32 | * Should be set accordingly to the reference resistor used, see |
33 | * I_{ch(ref)} charger reference current in the pcf50633 User |
34 | * Manual. |
35 | */ |
36 | int charger_reference_current_ma; |
37 | |
38 | /* Callbacks */ |
39 | void (*probe_done)(struct pcf50633 *); |
40 | void (*mbc_event_callback)(struct pcf50633 *, int); |
41 | void (*regulator_registered)(struct pcf50633 *, int); |
42 | void (*force_shutdown)(struct pcf50633 *); |
43 | |
44 | u8 resumers[5]; |
45 | |
46 | struct pcf50633_bl_platform_data *backlight_data; |
47 | }; |
48 | |
49 | struct pcf50633_irq { |
50 | void (*handler) (int, void *); |
51 | void *data; |
52 | }; |
53 | |
54 | int pcf50633_register_irq(struct pcf50633 *pcf, int irq, |
55 | void (*handler) (int, void *), void *data); |
56 | int pcf50633_free_irq(struct pcf50633 *pcf, int irq); |
57 | |
58 | int pcf50633_irq_mask(struct pcf50633 *pcf, int irq); |
59 | int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq); |
60 | int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq); |
61 | |
62 | int pcf50633_read_block(struct pcf50633 *, u8 reg, |
63 | int nr_regs, u8 *data); |
64 | int pcf50633_write_block(struct pcf50633 *pcf, u8 reg, |
65 | int nr_regs, u8 *data); |
66 | u8 pcf50633_reg_read(struct pcf50633 *, u8 reg); |
67 | int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val); |
68 | |
69 | int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val); |
70 | int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits); |
71 | |
72 | /* Interrupt registers */ |
73 | |
74 | #define PCF50633_REG_INT1 0x02 |
75 | #define PCF50633_REG_INT2 0x03 |
76 | #define PCF50633_REG_INT3 0x04 |
77 | #define PCF50633_REG_INT4 0x05 |
78 | #define PCF50633_REG_INT5 0x06 |
79 | |
80 | #define PCF50633_REG_INT1M 0x07 |
81 | #define PCF50633_REG_INT2M 0x08 |
82 | #define PCF50633_REG_INT3M 0x09 |
83 | #define PCF50633_REG_INT4M 0x0a |
84 | #define PCF50633_REG_INT5M 0x0b |
85 | |
86 | enum { |
87 | /* Chip IRQs */ |
88 | PCF50633_IRQ_ADPINS, |
89 | PCF50633_IRQ_ADPREM, |
90 | PCF50633_IRQ_USBINS, |
91 | PCF50633_IRQ_USBREM, |
92 | PCF50633_IRQ_RESERVED1, |
93 | PCF50633_IRQ_RESERVED2, |
94 | PCF50633_IRQ_ALARM, |
95 | PCF50633_IRQ_SECOND, |
96 | PCF50633_IRQ_ONKEYR, |
97 | PCF50633_IRQ_ONKEYF, |
98 | PCF50633_IRQ_EXTON1R, |
99 | PCF50633_IRQ_EXTON1F, |
100 | PCF50633_IRQ_EXTON2R, |
101 | PCF50633_IRQ_EXTON2F, |
102 | PCF50633_IRQ_EXTON3R, |
103 | PCF50633_IRQ_EXTON3F, |
104 | PCF50633_IRQ_BATFULL, |
105 | PCF50633_IRQ_CHGHALT, |
106 | PCF50633_IRQ_THLIMON, |
107 | PCF50633_IRQ_THLIMOFF, |
108 | PCF50633_IRQ_USBLIMON, |
109 | PCF50633_IRQ_USBLIMOFF, |
110 | PCF50633_IRQ_ADCRDY, |
111 | PCF50633_IRQ_ONKEY1S, |
112 | PCF50633_IRQ_LOWSYS, |
113 | PCF50633_IRQ_LOWBAT, |
114 | PCF50633_IRQ_HIGHTMP, |
115 | PCF50633_IRQ_AUTOPWRFAIL, |
116 | PCF50633_IRQ_DWN1PWRFAIL, |
117 | PCF50633_IRQ_DWN2PWRFAIL, |
118 | PCF50633_IRQ_LEDPWRFAIL, |
119 | PCF50633_IRQ_LEDOVP, |
120 | PCF50633_IRQ_LDO1PWRFAIL, |
121 | PCF50633_IRQ_LDO2PWRFAIL, |
122 | PCF50633_IRQ_LDO3PWRFAIL, |
123 | PCF50633_IRQ_LDO4PWRFAIL, |
124 | PCF50633_IRQ_LDO5PWRFAIL, |
125 | PCF50633_IRQ_LDO6PWRFAIL, |
126 | PCF50633_IRQ_HCLDOPWRFAIL, |
127 | PCF50633_IRQ_HCLDOOVL, |
128 | |
129 | /* Always last */ |
130 | PCF50633_NUM_IRQ, |
131 | }; |
132 | |
133 | struct pcf50633 { |
134 | struct device *dev; |
135 | struct regmap *regmap; |
136 | |
137 | struct pcf50633_platform_data *pdata; |
138 | int irq; |
139 | struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ]; |
140 | struct work_struct irq_work; |
141 | struct workqueue_struct *work_queue; |
142 | struct mutex lock; |
143 | |
144 | u8 mask_regs[5]; |
145 | |
146 | u8 suspend_irq_masks[5]; |
147 | u8 resume_reason[5]; |
148 | int is_suspended; |
149 | |
150 | int onkey1s_held; |
151 | |
152 | struct platform_device *rtc_pdev; |
153 | struct platform_device *mbc_pdev; |
154 | struct platform_device *adc_pdev; |
155 | struct platform_device *input_pdev; |
156 | struct platform_device *bl_pdev; |
157 | struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS]; |
158 | }; |
159 | |
160 | enum pcf50633_reg_int1 { |
161 | PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */ |
162 | PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */ |
163 | PCF50633_INT1_USBINS = 0x04, /* USB inserted */ |
164 | PCF50633_INT1_USBREM = 0x08, /* USB removed */ |
165 | /* reserved */ |
166 | PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */ |
167 | PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */ |
168 | }; |
169 | |
170 | enum pcf50633_reg_int2 { |
171 | PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */ |
172 | PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */ |
173 | PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */ |
174 | PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */ |
175 | PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */ |
176 | PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */ |
177 | PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */ |
178 | PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */ |
179 | }; |
180 | |
181 | enum pcf50633_reg_int3 { |
182 | PCF50633_INT3_BATFULL = 0x01, /* Battery full */ |
183 | PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */ |
184 | PCF50633_INT3_THLIMON = 0x04, |
185 | PCF50633_INT3_THLIMOFF = 0x08, |
186 | PCF50633_INT3_USBLIMON = 0x10, |
187 | PCF50633_INT3_USBLIMOFF = 0x20, |
188 | PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */ |
189 | PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */ |
190 | }; |
191 | |
192 | enum pcf50633_reg_int4 { |
193 | PCF50633_INT4_LOWSYS = 0x01, |
194 | PCF50633_INT4_LOWBAT = 0x02, |
195 | PCF50633_INT4_HIGHTMP = 0x04, |
196 | PCF50633_INT4_AUTOPWRFAIL = 0x08, |
197 | PCF50633_INT4_DWN1PWRFAIL = 0x10, |
198 | PCF50633_INT4_DWN2PWRFAIL = 0x20, |
199 | PCF50633_INT4_LEDPWRFAIL = 0x40, |
200 | PCF50633_INT4_LEDOVP = 0x80, |
201 | }; |
202 | |
203 | enum pcf50633_reg_int5 { |
204 | PCF50633_INT5_LDO1PWRFAIL = 0x01, |
205 | PCF50633_INT5_LDO2PWRFAIL = 0x02, |
206 | PCF50633_INT5_LDO3PWRFAIL = 0x04, |
207 | PCF50633_INT5_LDO4PWRFAIL = 0x08, |
208 | PCF50633_INT5_LDO5PWRFAIL = 0x10, |
209 | PCF50633_INT5_LDO6PWRFAIL = 0x20, |
210 | PCF50633_INT5_HCLDOPWRFAIL = 0x40, |
211 | PCF50633_INT5_HCLDOOVL = 0x80, |
212 | }; |
213 | |
214 | /* misc. registers */ |
215 | #define PCF50633_REG_OOCSHDWN 0x0c |
216 | |
217 | /* LED registers */ |
218 | #define PCF50633_REG_LEDOUT 0x28 |
219 | #define PCF50633_REG_LEDENA 0x29 |
220 | #define PCF50633_REG_LEDCTL 0x2a |
221 | #define PCF50633_REG_LEDDIM 0x2b |
222 | |
223 | static inline struct pcf50633 *dev_to_pcf50633(struct device *dev) |
224 | { |
225 | return dev_get_drvdata(dev); |
226 | } |
227 | |
228 | int pcf50633_irq_init(struct pcf50633 *pcf, int irq); |
229 | void pcf50633_irq_free(struct pcf50633 *pcf); |
230 | extern const struct dev_pm_ops pcf50633_pm; |
231 | |
232 | #endif |
233 | |