1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Core driver interface for TI TPS65090 PMIC family |
4 | * |
5 | * Copyright (C) 2012 NVIDIA Corporation |
6 | */ |
7 | |
8 | #ifndef __LINUX_MFD_TPS65090_H |
9 | #define __LINUX_MFD_TPS65090_H |
10 | |
11 | #include <linux/irq.h> |
12 | #include <linux/regmap.h> |
13 | |
14 | /* TPS65090 IRQs */ |
15 | enum { |
16 | TPS65090_IRQ_INTERRUPT, |
17 | TPS65090_IRQ_VAC_STATUS_CHANGE, |
18 | TPS65090_IRQ_VSYS_STATUS_CHANGE, |
19 | TPS65090_IRQ_BAT_STATUS_CHANGE, |
20 | TPS65090_IRQ_CHARGING_STATUS_CHANGE, |
21 | TPS65090_IRQ_CHARGING_COMPLETE, |
22 | TPS65090_IRQ_OVERLOAD_DCDC1, |
23 | TPS65090_IRQ_OVERLOAD_DCDC2, |
24 | TPS65090_IRQ_OVERLOAD_DCDC3, |
25 | TPS65090_IRQ_OVERLOAD_FET1, |
26 | TPS65090_IRQ_OVERLOAD_FET2, |
27 | TPS65090_IRQ_OVERLOAD_FET3, |
28 | TPS65090_IRQ_OVERLOAD_FET4, |
29 | TPS65090_IRQ_OVERLOAD_FET5, |
30 | TPS65090_IRQ_OVERLOAD_FET6, |
31 | TPS65090_IRQ_OVERLOAD_FET7, |
32 | }; |
33 | |
34 | /* TPS65090 Regulator ID */ |
35 | enum { |
36 | TPS65090_REGULATOR_DCDC1, |
37 | TPS65090_REGULATOR_DCDC2, |
38 | TPS65090_REGULATOR_DCDC3, |
39 | TPS65090_REGULATOR_FET1, |
40 | TPS65090_REGULATOR_FET2, |
41 | TPS65090_REGULATOR_FET3, |
42 | TPS65090_REGULATOR_FET4, |
43 | TPS65090_REGULATOR_FET5, |
44 | TPS65090_REGULATOR_FET6, |
45 | TPS65090_REGULATOR_FET7, |
46 | TPS65090_REGULATOR_LDO1, |
47 | TPS65090_REGULATOR_LDO2, |
48 | |
49 | /* Last entry for maximum ID */ |
50 | TPS65090_REGULATOR_MAX, |
51 | }; |
52 | |
53 | /* Register addresses */ |
54 | #define TPS65090_REG_INTR_STS 0x00 |
55 | #define TPS65090_REG_INTR_STS2 0x01 |
56 | #define TPS65090_REG_INTR_MASK 0x02 |
57 | #define TPS65090_REG_INTR_MASK2 0x03 |
58 | #define TPS65090_REG_CG_CTRL0 0x04 |
59 | #define TPS65090_REG_CG_CTRL1 0x05 |
60 | #define TPS65090_REG_CG_CTRL2 0x06 |
61 | #define TPS65090_REG_CG_CTRL3 0x07 |
62 | #define TPS65090_REG_CG_CTRL4 0x08 |
63 | #define TPS65090_REG_CG_CTRL5 0x09 |
64 | #define TPS65090_REG_CG_STATUS1 0x0a |
65 | #define TPS65090_REG_CG_STATUS2 0x0b |
66 | #define TPS65090_REG_AD_OUT1 0x17 |
67 | #define TPS65090_REG_AD_OUT2 0x18 |
68 | |
69 | #define TPS65090_MAX_REG TPS65090_REG_AD_OUT2 |
70 | #define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1) |
71 | |
72 | struct gpio_desc; |
73 | |
74 | struct tps65090 { |
75 | struct device *dev; |
76 | struct regmap *rmap; |
77 | struct regmap_irq_chip_data *irq_data; |
78 | }; |
79 | |
80 | /* |
81 | * struct tps65090_regulator_plat_data |
82 | * |
83 | * @reg_init_data: The regulator init data. |
84 | * @enable_ext_control: Enable extrenal control or not. Only available for |
85 | * DCDC1, DCDC2 and DCDC3. |
86 | * @gpiod: Gpio descriptor if external control is enabled and controlled through |
87 | * gpio |
88 | * @overcurrent_wait_valid: True if the overcurrent_wait should be applied. |
89 | * @overcurrent_wait: Value to set as the overcurrent wait time. This is the |
90 | * actual bitfield value, not a time in ms (valid value are 0 - 3). |
91 | */ |
92 | struct tps65090_regulator_plat_data { |
93 | struct regulator_init_data *reg_init_data; |
94 | bool enable_ext_control; |
95 | struct gpio_desc *gpiod; |
96 | bool overcurrent_wait_valid; |
97 | int overcurrent_wait; |
98 | }; |
99 | |
100 | struct tps65090_platform_data { |
101 | int irq_base; |
102 | |
103 | char **supplied_to; |
104 | size_t num_supplicants; |
105 | int enable_low_current_chrg; |
106 | |
107 | struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX]; |
108 | }; |
109 | |
110 | /* |
111 | * NOTE: the functions below are not intended for use outside |
112 | * of the TPS65090 sub-device drivers |
113 | */ |
114 | static inline int tps65090_write(struct device *dev, int reg, uint8_t val) |
115 | { |
116 | struct tps65090 *tps = dev_get_drvdata(dev); |
117 | |
118 | return regmap_write(map: tps->rmap, reg, val); |
119 | } |
120 | |
121 | static inline int tps65090_read(struct device *dev, int reg, uint8_t *val) |
122 | { |
123 | struct tps65090 *tps = dev_get_drvdata(dev); |
124 | unsigned int temp_val; |
125 | int ret; |
126 | |
127 | ret = regmap_read(map: tps->rmap, reg, val: &temp_val); |
128 | if (!ret) |
129 | *val = temp_val; |
130 | return ret; |
131 | } |
132 | |
133 | static inline int tps65090_set_bits(struct device *dev, int reg, |
134 | uint8_t bit_num) |
135 | { |
136 | struct tps65090 *tps = dev_get_drvdata(dev); |
137 | |
138 | return regmap_update_bits(map: tps->rmap, reg, BIT(bit_num), val: ~0u); |
139 | } |
140 | |
141 | static inline int tps65090_clr_bits(struct device *dev, int reg, |
142 | uint8_t bit_num) |
143 | { |
144 | struct tps65090 *tps = dev_get_drvdata(dev); |
145 | |
146 | return regmap_update_bits(map: tps->rmap, reg, BIT(bit_num), val: 0u); |
147 | } |
148 | |
149 | #endif /*__LINUX_MFD_TPS65090_H */ |
150 | |