1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef LINUX_MSI_H
3#define LINUX_MSI_H
4
5#include <linux/kobject.h>
6#include <linux/list.h>
7
8struct msi_msg {
9 u32 address_lo; /* low 32 bits of msi message address */
10 u32 address_hi; /* high 32 bits of msi message address */
11 u32 data; /* 16 bits of msi message data */
12};
13
14extern int pci_msi_ignore_mask;
15/* Helper functions */
16struct irq_data;
17struct msi_desc;
18struct pci_dev;
19struct platform_msi_priv_data;
20void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
21#ifdef CONFIG_GENERIC_MSI_IRQ
22void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
23#else
24static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
25{
26}
27#endif
28
29typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
30 struct msi_msg *msg);
31
32/**
33 * platform_msi_desc - Platform device specific msi descriptor data
34 * @msi_priv_data: Pointer to platform private data
35 * @msi_index: The index of the MSI descriptor for multi MSI
36 */
37struct platform_msi_desc {
38 struct platform_msi_priv_data *msi_priv_data;
39 u16 msi_index;
40};
41
42/**
43 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
44 * @msi_index: The index of the MSI descriptor
45 */
46struct fsl_mc_msi_desc {
47 u16 msi_index;
48};
49
50/**
51 * struct msi_desc - Descriptor structure for MSI based interrupts
52 * @list: List head for management
53 * @irq: The base interrupt number
54 * @nvec_used: The number of vectors used
55 * @dev: Pointer to the device which uses this descriptor
56 * @msg: The last set MSI message cached for reuse
57 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
58 *
59 * @masked: [PCI MSI/X] Mask bits
60 * @is_msix: [PCI MSI/X] True if MSI-X
61 * @multiple: [PCI MSI/X] log2 num of messages allocated
62 * @multi_cap: [PCI MSI/X] log2 num of messages supported
63 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
64 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
65 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
66 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
67 * @mask_pos: [PCI MSI] Mask register position
68 * @mask_base: [PCI MSI-X] Mask register base address
69 * @platform: [platform] Platform device specific msi descriptor data
70 * @fsl_mc: [fsl-mc] FSL MC device specific msi descriptor data
71 */
72struct msi_desc {
73 /* Shared device/bus type independent data */
74 struct list_head list;
75 unsigned int irq;
76 unsigned int nvec_used;
77 struct device *dev;
78 struct msi_msg msg;
79 struct irq_affinity_desc *affinity;
80
81 union {
82 /* PCI MSI/X specific data */
83 struct {
84 u32 masked;
85 struct {
86 u8 is_msix : 1;
87 u8 multiple : 3;
88 u8 multi_cap : 3;
89 u8 maskbit : 1;
90 u8 is_64 : 1;
91 u16 entry_nr;
92 unsigned default_irq;
93 } msi_attrib;
94 union {
95 u8 mask_pos;
96 void __iomem *mask_base;
97 };
98 };
99
100 /*
101 * Non PCI variants add their data structure here. New
102 * entries need to use a named structure. We want
103 * proper name spaces for this. The PCI part is
104 * anonymous for now as it would require an immediate
105 * tree wide cleanup.
106 */
107 struct platform_msi_desc platform;
108 struct fsl_mc_msi_desc fsl_mc;
109 };
110};
111
112/* Helpers to hide struct msi_desc implementation details */
113#define msi_desc_to_dev(desc) ((desc)->dev)
114#define dev_to_msi_list(dev) (&(dev)->msi_list)
115#define first_msi_entry(dev) \
116 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
117#define for_each_msi_entry(desc, dev) \
118 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
119#define for_each_msi_entry_safe(desc, tmp, dev) \
120 list_for_each_entry_safe((desc), (tmp), dev_to_msi_list((dev)), list)
121
122#ifdef CONFIG_PCI_MSI
123#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
124#define for_each_pci_msi_entry(desc, pdev) \
125 for_each_msi_entry((desc), &(pdev)->dev)
126
127struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
128void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
129void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
130#else /* CONFIG_PCI_MSI */
131static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
132{
133 return NULL;
134}
135static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
136{
137}
138#endif /* CONFIG_PCI_MSI */
139
140struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
141 const struct irq_affinity_desc *affinity);
142void free_msi_entry(struct msi_desc *entry);
143void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
144void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
145
146u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
147u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
148void pci_msi_mask_irq(struct irq_data *data);
149void pci_msi_unmask_irq(struct irq_data *data);
150
151/* Conversion helpers. Should be removed after merging */
152static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
153{
154 __pci_write_msi_msg(entry, msg);
155}
156static inline void write_msi_msg(int irq, struct msi_msg *msg)
157{
158 pci_write_msi_msg(irq, msg);
159}
160static inline void mask_msi_irq(struct irq_data *data)
161{
162 pci_msi_mask_irq(data);
163}
164static inline void unmask_msi_irq(struct irq_data *data)
165{
166 pci_msi_unmask_irq(data);
167}
168
169/*
170 * The arch hooks to setup up msi irqs. Those functions are
171 * implemented as weak symbols so that they /can/ be overriden by
172 * architecture specific code if needed.
173 */
174int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
175void arch_teardown_msi_irq(unsigned int irq);
176int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
177void arch_teardown_msi_irqs(struct pci_dev *dev);
178void arch_restore_msi_irqs(struct pci_dev *dev);
179
180void default_teardown_msi_irqs(struct pci_dev *dev);
181void default_restore_msi_irqs(struct pci_dev *dev);
182
183struct msi_controller {
184 struct module *owner;
185 struct device *dev;
186 struct device_node *of_node;
187 struct list_head list;
188
189 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
190 struct msi_desc *desc);
191 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
192 int nvec, int type);
193 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
194};
195
196#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
197
198#include <linux/irqhandler.h>
199#include <asm/msi.h>
200
201struct irq_domain;
202struct irq_domain_ops;
203struct irq_chip;
204struct device_node;
205struct fwnode_handle;
206struct msi_domain_info;
207
208/**
209 * struct msi_domain_ops - MSI interrupt domain callbacks
210 * @get_hwirq: Retrieve the resulting hw irq number
211 * @msi_init: Domain specific init function for MSI interrupts
212 * @msi_free: Domain specific function to free a MSI interrupts
213 * @msi_check: Callback for verification of the domain/info/dev data
214 * @msi_prepare: Prepare the allocation of the interrupts in the domain
215 * @msi_finish: Optional callback to finalize the allocation
216 * @set_desc: Set the msi descriptor for an interrupt
217 * @handle_error: Optional error handler if the allocation fails
218 *
219 * @get_hwirq, @msi_init and @msi_free are callbacks used by
220 * msi_create_irq_domain() and related interfaces
221 *
222 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
223 * are callbacks used by msi_domain_alloc_irqs() and related
224 * interfaces which are based on msi_desc.
225 */
226struct msi_domain_ops {
227 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
228 msi_alloc_info_t *arg);
229 int (*msi_init)(struct irq_domain *domain,
230 struct msi_domain_info *info,
231 unsigned int virq, irq_hw_number_t hwirq,
232 msi_alloc_info_t *arg);
233 void (*msi_free)(struct irq_domain *domain,
234 struct msi_domain_info *info,
235 unsigned int virq);
236 int (*msi_check)(struct irq_domain *domain,
237 struct msi_domain_info *info,
238 struct device *dev);
239 int (*msi_prepare)(struct irq_domain *domain,
240 struct device *dev, int nvec,
241 msi_alloc_info_t *arg);
242 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
243 void (*set_desc)(msi_alloc_info_t *arg,
244 struct msi_desc *desc);
245 int (*handle_error)(struct irq_domain *domain,
246 struct msi_desc *desc, int error);
247};
248
249/**
250 * struct msi_domain_info - MSI interrupt domain data
251 * @flags: Flags to decribe features and capabilities
252 * @ops: The callback data structure
253 * @chip: Optional: associated interrupt chip
254 * @chip_data: Optional: associated interrupt chip data
255 * @handler: Optional: associated interrupt flow handler
256 * @handler_data: Optional: associated interrupt flow handler data
257 * @handler_name: Optional: associated interrupt flow handler name
258 * @data: Optional: domain specific data
259 */
260struct msi_domain_info {
261 u32 flags;
262 struct msi_domain_ops *ops;
263 struct irq_chip *chip;
264 void *chip_data;
265 irq_flow_handler_t handler;
266 void *handler_data;
267 const char *handler_name;
268 void *data;
269};
270
271/* Flags for msi_domain_info */
272enum {
273 /*
274 * Init non implemented ops callbacks with default MSI domain
275 * callbacks.
276 */
277 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
278 /*
279 * Init non implemented chip callbacks with default MSI chip
280 * callbacks.
281 */
282 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
283 /* Support multiple PCI MSI interrupts */
284 MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
285 /* Support PCI MSIX interrupts */
286 MSI_FLAG_PCI_MSIX = (1 << 3),
287 /* Needs early activate, required for PCI */
288 MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
289 /*
290 * Must reactivate when irq is started even when
291 * MSI_FLAG_ACTIVATE_EARLY has been set.
292 */
293 MSI_FLAG_MUST_REACTIVATE = (1 << 5),
294 /* Is level-triggered capable, using two messages */
295 MSI_FLAG_LEVEL_CAPABLE = (1 << 6),
296};
297
298int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
299 bool force);
300
301struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
302 struct msi_domain_info *info,
303 struct irq_domain *parent);
304int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
305 int nvec);
306void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
307struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
308
309struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
310 struct msi_domain_info *info,
311 struct irq_domain *parent);
312int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
313 irq_write_msi_msg_t write_msi_msg);
314void platform_msi_domain_free_irqs(struct device *dev);
315
316/* When an MSI domain is used as an intermediate domain */
317int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
318 int nvec, msi_alloc_info_t *args);
319int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
320 int virq, int nvec, msi_alloc_info_t *args);
321struct irq_domain *
322__platform_msi_create_device_domain(struct device *dev,
323 unsigned int nvec,
324 bool is_tree,
325 irq_write_msi_msg_t write_msi_msg,
326 const struct irq_domain_ops *ops,
327 void *host_data);
328
329#define platform_msi_create_device_domain(dev, nvec, write, ops, data) \
330 __platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
331#define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
332 __platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
333
334int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
335 unsigned int nr_irqs);
336void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
337 unsigned int nvec);
338void *platform_msi_get_host_data(struct irq_domain *domain);
339#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
340
341#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
342void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
343struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
344 struct msi_domain_info *info,
345 struct irq_domain *parent);
346irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
347 struct msi_desc *desc);
348int pci_msi_domain_check_cap(struct irq_domain *domain,
349 struct msi_domain_info *info, struct device *dev);
350u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
351struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
352#else
353static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
354{
355 return NULL;
356}
357#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
358
359#endif /* LINUX_MSI_H */
360