1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __QCOM_SMD_RPM_H__ |
3 | #define __QCOM_SMD_RPM_H__ |
4 | |
5 | #include <linux/types.h> |
6 | |
7 | struct qcom_smd_rpm; |
8 | |
9 | #define QCOM_SMD_RPM_ACTIVE_STATE 0 |
10 | #define QCOM_SMD_RPM_SLEEP_STATE 1 |
11 | #define QCOM_SMD_RPM_STATE_NUM 2 |
12 | |
13 | /* |
14 | * Constants used for addressing resources in the RPM. |
15 | */ |
16 | #define QCOM_SMD_RPM_BBYB 0x62796262 |
17 | #define QCOM_SMD_RPM_BOBB 0x62626f62 |
18 | #define QCOM_SMD_RPM_BOOST 0x61747362 |
19 | #define QCOM_SMD_RPM_BUS_CLK 0x316b6c63 |
20 | #define QCOM_SMD_RPM_BUS_MASTER 0x73616d62 |
21 | #define QCOM_SMD_RPM_BUS_SLAVE 0x766c7362 |
22 | #define QCOM_SMD_RPM_CLK_BUF_A 0x616B6C63 |
23 | #define QCOM_SMD_RPM_LDOA 0x616f646c |
24 | #define QCOM_SMD_RPM_LDOB 0x626F646C |
25 | #define QCOM_SMD_RPM_LDOE 0x656f646c |
26 | #define QCOM_SMD_RPM_RWCX 0x78637772 |
27 | #define QCOM_SMD_RPM_RWMX 0x786d7772 |
28 | #define QCOM_SMD_RPM_RWLC 0x636c7772 |
29 | #define QCOM_SMD_RPM_RWLM 0x6d6c7772 |
30 | #define QCOM_SMD_RPM_MEM_CLK 0x326b6c63 |
31 | #define QCOM_SMD_RPM_MISC_CLK 0x306b6c63 |
32 | #define QCOM_SMD_RPM_NCPA 0x6170636E |
33 | #define QCOM_SMD_RPM_NCPB 0x6270636E |
34 | #define QCOM_SMD_RPM_OCMEM_PWR 0x706d636f |
35 | #define QCOM_SMD_RPM_QPIC_CLK 0x63697071 |
36 | #define QCOM_SMD_RPM_QUP_CLK 0x707571 |
37 | #define QCOM_SMD_RPM_SMPA 0x61706d73 |
38 | #define QCOM_SMD_RPM_SMPB 0x62706d73 |
39 | #define QCOM_SMD_RPM_SMPE 0x65706d73 |
40 | #define QCOM_SMD_RPM_SPDM 0x63707362 |
41 | #define QCOM_SMD_RPM_VSA 0x00617376 |
42 | #define QCOM_SMD_RPM_MMAXI_CLK 0x69786d6d |
43 | #define QCOM_SMD_RPM_IPA_CLK 0x617069 |
44 | #define QCOM_SMD_RPM_CE_CLK 0x6563 |
45 | #define QCOM_SMD_RPM_AGGR_CLK 0x72676761 |
46 | #define QCOM_SMD_RPM_HWKM_CLK 0x6d6b7768 |
47 | #define QCOM_SMD_RPM_PKA_CLK 0x616b70 |
48 | #define QCOM_SMD_RPM_MCFG_CLK 0x6766636d |
49 | |
50 | #define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 |
51 | #define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 |
52 | #define QCOM_RPM_SMD_KEY_RATE 0x007a484b |
53 | #define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 |
54 | #define QCOM_RPM_SMD_KEY_STATE 0x54415453 |
55 | #define QCOM_RPM_SCALING_ENABLE_ID 0x2 |
56 | |
57 | struct clk_smd_rpm_req { |
58 | __le32 key; |
59 | __le32 nbytes; |
60 | __le32 value; |
61 | }; |
62 | |
63 | int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, |
64 | int state, |
65 | u32 resource_type, u32 resource_id, |
66 | void *buf, size_t count); |
67 | |
68 | #endif |
69 | |