1/* SPDX-License-Identifier: GPL-2.0-or-later
2 *
3 * Copyright (C) 2005 David Brownell
4 */
5
6#ifndef __LINUX_SPI_H
7#define __LINUX_SPI_H
8
9#include <linux/device.h>
10#include <linux/mod_devicetable.h>
11#include <linux/slab.h>
12#include <linux/kthread.h>
13#include <linux/completion.h>
14#include <linux/scatterlist.h>
15#include <linux/gpio/consumer.h>
16
17struct dma_chan;
18struct property_entry;
19struct spi_controller;
20struct spi_transfer;
21struct spi_controller_mem_ops;
22
23/*
24 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
25 * and SPI infrastructure.
26 */
27extern struct bus_type spi_bus_type;
28
29/**
30 * struct spi_statistics - statistics for spi transfers
31 * @lock: lock protecting this structure
32 *
33 * @messages: number of spi-messages handled
34 * @transfers: number of spi_transfers handled
35 * @errors: number of errors during spi_transfer
36 * @timedout: number of timeouts during spi_transfer
37 *
38 * @spi_sync: number of times spi_sync is used
39 * @spi_sync_immediate:
40 * number of times spi_sync is executed immediately
41 * in calling context without queuing and scheduling
42 * @spi_async: number of times spi_async is used
43 *
44 * @bytes: number of bytes transferred to/from device
45 * @bytes_tx: number of bytes sent to device
46 * @bytes_rx: number of bytes received from device
47 *
48 * @transfer_bytes_histo:
49 * transfer bytes histogramm
50 *
51 * @transfers_split_maxsize:
52 * number of transfers that have been split because of
53 * maxsize limit
54 */
55struct spi_statistics {
56 spinlock_t lock; /* lock for the whole structure */
57
58 unsigned long messages;
59 unsigned long transfers;
60 unsigned long errors;
61 unsigned long timedout;
62
63 unsigned long spi_sync;
64 unsigned long spi_sync_immediate;
65 unsigned long spi_async;
66
67 unsigned long long bytes;
68 unsigned long long bytes_rx;
69 unsigned long long bytes_tx;
70
71#define SPI_STATISTICS_HISTO_SIZE 17
72 unsigned long transfer_bytes_histo[SPI_STATISTICS_HISTO_SIZE];
73
74 unsigned long transfers_split_maxsize;
75};
76
77void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
78 struct spi_transfer *xfer,
79 struct spi_controller *ctlr);
80
81#define SPI_STATISTICS_ADD_TO_FIELD(stats, field, count) \
82 do { \
83 unsigned long flags; \
84 spin_lock_irqsave(&(stats)->lock, flags); \
85 (stats)->field += count; \
86 spin_unlock_irqrestore(&(stats)->lock, flags); \
87 } while (0)
88
89#define SPI_STATISTICS_INCREMENT_FIELD(stats, field) \
90 SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
91
92/**
93 * struct spi_device - Controller side proxy for an SPI slave device
94 * @dev: Driver model representation of the device.
95 * @controller: SPI controller used with the device.
96 * @master: Copy of controller, for backwards compatibility.
97 * @max_speed_hz: Maximum clock rate to be used with this chip
98 * (on this board); may be changed by the device's driver.
99 * The spi_transfer.speed_hz can override this for each transfer.
100 * @chip_select: Chipselect, distinguishing chips handled by @controller.
101 * @mode: The spi mode defines how data is clocked out and in.
102 * This may be changed by the device's driver.
103 * The "active low" default for chipselect mode can be overridden
104 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
105 * each word in a transfer (by specifying SPI_LSB_FIRST).
106 * @bits_per_word: Data transfers involve one or more words; word sizes
107 * like eight or 12 bits are common. In-memory wordsizes are
108 * powers of two bytes (e.g. 20 bit samples use 32 bits).
109 * This may be changed by the device's driver, or left at the
110 * default (0) indicating protocol words are eight bit bytes.
111 * The spi_transfer.bits_per_word can override this for each transfer.
112 * @irq: Negative, or the number passed to request_irq() to receive
113 * interrupts from this device.
114 * @controller_state: Controller's runtime state
115 * @controller_data: Board-specific definitions for controller, such as
116 * FIFO initialization parameters; from board_info.controller_data
117 * @modalias: Name of the driver to use with this device, or an alias
118 * for that name. This appears in the sysfs "modalias" attribute
119 * for driver coldplugging, and in uevents used for hotplugging
120 * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when
121 * not using a GPIO line) use cs_gpiod in new drivers by opting in on
122 * the spi_master.
123 * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when
124 * not using a GPIO line)
125 * @word_delay_usecs: microsecond delay to be inserted between consecutive
126 * words of a transfer
127 *
128 * @statistics: statistics for the spi_device
129 *
130 * A @spi_device is used to interchange data between an SPI slave
131 * (usually a discrete chip) and CPU memory.
132 *
133 * In @dev, the platform_data is used to hold information about this
134 * device that's meaningful to the device's protocol driver, but not
135 * to its controller. One example might be an identifier for a chip
136 * variant with slightly different functionality; another might be
137 * information about how this particular board wires the chip's pins.
138 */
139struct spi_device {
140 struct device dev;
141 struct spi_controller *controller;
142 struct spi_controller *master; /* compatibility layer */
143 u32 max_speed_hz;
144 u8 chip_select;
145 u8 bits_per_word;
146 u16 mode;
147#define SPI_CPHA 0x01 /* clock phase */
148#define SPI_CPOL 0x02 /* clock polarity */
149#define SPI_MODE_0 (0|0) /* (original MicroWire) */
150#define SPI_MODE_1 (0|SPI_CPHA)
151#define SPI_MODE_2 (SPI_CPOL|0)
152#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
153#define SPI_CS_HIGH 0x04 /* chipselect active high? */
154#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
155#define SPI_3WIRE 0x10 /* SI/SO signals shared */
156#define SPI_LOOP 0x20 /* loopback mode */
157#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
158#define SPI_READY 0x80 /* slave pulls low to pause */
159#define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
160#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
161#define SPI_RX_DUAL 0x400 /* receive with 2 wires */
162#define SPI_RX_QUAD 0x800 /* receive with 4 wires */
163#define SPI_CS_WORD 0x1000 /* toggle cs after each word */
164#define SPI_TX_OCTAL 0x2000 /* transmit with 8 wires */
165#define SPI_RX_OCTAL 0x4000 /* receive with 8 wires */
166#define SPI_3WIRE_HIZ 0x8000 /* high impedance turnaround */
167 int irq;
168 void *controller_state;
169 void *controller_data;
170 char modalias[SPI_NAME_SIZE];
171 const char *driver_override;
172 int cs_gpio; /* LEGACY: chip select gpio */
173 struct gpio_desc *cs_gpiod; /* chip select gpio desc */
174 uint8_t word_delay_usecs; /* inter-word delay */
175
176 /* the statistics */
177 struct spi_statistics statistics;
178
179 /*
180 * likely need more hooks for more protocol options affecting how
181 * the controller talks to each chip, like:
182 * - memory packing (12 bit samples into low bits, others zeroed)
183 * - priority
184 * - chipselect delays
185 * - ...
186 */
187};
188
189static inline struct spi_device *to_spi_device(struct device *dev)
190{
191 return dev ? container_of(dev, struct spi_device, dev) : NULL;
192}
193
194/* most drivers won't need to care about device refcounting */
195static inline struct spi_device *spi_dev_get(struct spi_device *spi)
196{
197 return (spi && get_device(&spi->dev)) ? spi : NULL;
198}
199
200static inline void spi_dev_put(struct spi_device *spi)
201{
202 if (spi)
203 put_device(&spi->dev);
204}
205
206/* ctldata is for the bus_controller driver's runtime state */
207static inline void *spi_get_ctldata(struct spi_device *spi)
208{
209 return spi->controller_state;
210}
211
212static inline void spi_set_ctldata(struct spi_device *spi, void *state)
213{
214 spi->controller_state = state;
215}
216
217/* device driver data */
218
219static inline void spi_set_drvdata(struct spi_device *spi, void *data)
220{
221 dev_set_drvdata(&spi->dev, data);
222}
223
224static inline void *spi_get_drvdata(struct spi_device *spi)
225{
226 return dev_get_drvdata(&spi->dev);
227}
228
229struct spi_message;
230struct spi_transfer;
231
232/**
233 * struct spi_driver - Host side "protocol" driver
234 * @id_table: List of SPI devices supported by this driver
235 * @probe: Binds this driver to the spi device. Drivers can verify
236 * that the device is actually present, and may need to configure
237 * characteristics (such as bits_per_word) which weren't needed for
238 * the initial configuration done during system setup.
239 * @remove: Unbinds this driver from the spi device
240 * @shutdown: Standard shutdown callback used during system state
241 * transitions such as powerdown/halt and kexec
242 * @driver: SPI device drivers should initialize the name and owner
243 * field of this structure.
244 *
245 * This represents the kind of device driver that uses SPI messages to
246 * interact with the hardware at the other end of a SPI link. It's called
247 * a "protocol" driver because it works through messages rather than talking
248 * directly to SPI hardware (which is what the underlying SPI controller
249 * driver does to pass those messages). These protocols are defined in the
250 * specification for the device(s) supported by the driver.
251 *
252 * As a rule, those device protocols represent the lowest level interface
253 * supported by a driver, and it will support upper level interfaces too.
254 * Examples of such upper levels include frameworks like MTD, networking,
255 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
256 */
257struct spi_driver {
258 const struct spi_device_id *id_table;
259 int (*probe)(struct spi_device *spi);
260 int (*remove)(struct spi_device *spi);
261 void (*shutdown)(struct spi_device *spi);
262 struct device_driver driver;
263};
264
265static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
266{
267 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
268}
269
270extern int __spi_register_driver(struct module *owner, struct spi_driver *sdrv);
271
272/**
273 * spi_unregister_driver - reverse effect of spi_register_driver
274 * @sdrv: the driver to unregister
275 * Context: can sleep
276 */
277static inline void spi_unregister_driver(struct spi_driver *sdrv)
278{
279 if (sdrv)
280 driver_unregister(&sdrv->driver);
281}
282
283/* use a define to avoid include chaining to get THIS_MODULE */
284#define spi_register_driver(driver) \
285 __spi_register_driver(THIS_MODULE, driver)
286
287/**
288 * module_spi_driver() - Helper macro for registering a SPI driver
289 * @__spi_driver: spi_driver struct
290 *
291 * Helper macro for SPI drivers which do not do anything special in module
292 * init/exit. This eliminates a lot of boilerplate. Each module may only
293 * use this macro once, and calling it replaces module_init() and module_exit()
294 */
295#define module_spi_driver(__spi_driver) \
296 module_driver(__spi_driver, spi_register_driver, \
297 spi_unregister_driver)
298
299/**
300 * struct spi_controller - interface to SPI master or slave controller
301 * @dev: device interface to this driver
302 * @list: link with the global spi_controller list
303 * @bus_num: board-specific (and often SOC-specific) identifier for a
304 * given SPI controller.
305 * @num_chipselect: chipselects are used to distinguish individual
306 * SPI slaves, and are numbered from zero to num_chipselects.
307 * each slave has a chipselect signal, but it's common that not
308 * every chipselect is connected to a slave.
309 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
310 * @mode_bits: flags understood by this controller driver
311 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
312 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
313 * supported. If set, the SPI core will reject any transfer with an
314 * unsupported bits_per_word. If not set, this value is simply ignored,
315 * and it's up to the individual driver to perform any validation.
316 * @min_speed_hz: Lowest supported transfer speed
317 * @max_speed_hz: Highest supported transfer speed
318 * @flags: other constraints relevant to this driver
319 * @slave: indicates that this is an SPI slave controller
320 * @max_transfer_size: function that returns the max transfer size for
321 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
322 * @max_message_size: function that returns the max message size for
323 * a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
324 * @io_mutex: mutex for physical bus access
325 * @bus_lock_spinlock: spinlock for SPI bus locking
326 * @bus_lock_mutex: mutex for exclusion of multiple callers
327 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
328 * @setup: updates the device mode and clocking records used by a
329 * device's SPI controller; protocol code may call this. This
330 * must fail if an unrecognized or unsupported mode is requested.
331 * It's always safe to call this unless transfers are pending on
332 * the device whose settings are being modified.
333 * @transfer: adds a message to the controller's transfer queue.
334 * @cleanup: frees controller-specific state
335 * @can_dma: determine whether this controller supports DMA
336 * @queued: whether this controller is providing an internal message queue
337 * @kworker: thread struct for message pump
338 * @kworker_task: pointer to task for message pump kworker thread
339 * @pump_messages: work struct for scheduling work to the message pump
340 * @queue_lock: spinlock to syncronise access to message queue
341 * @queue: message queue
342 * @idling: the device is entering idle state
343 * @cur_msg: the currently in-flight message
344 * @cur_msg_prepared: spi_prepare_message was called for the currently
345 * in-flight message
346 * @cur_msg_mapped: message has been mapped for DMA
347 * @xfer_completion: used by core transfer_one_message()
348 * @busy: message pump is busy
349 * @running: message pump is running
350 * @rt: whether this queue is set to run as a realtime task
351 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
352 * while the hardware is prepared, using the parent
353 * device for the spidev
354 * @max_dma_len: Maximum length of a DMA transfer for the device.
355 * @prepare_transfer_hardware: a message will soon arrive from the queue
356 * so the subsystem requests the driver to prepare the transfer hardware
357 * by issuing this call
358 * @transfer_one_message: the subsystem calls the driver to transfer a single
359 * message while queuing transfers that arrive in the meantime. When the
360 * driver is finished with this message, it must call
361 * spi_finalize_current_message() so the subsystem can issue the next
362 * message
363 * @unprepare_transfer_hardware: there are currently no more messages on the
364 * queue so the subsystem notifies the driver that it may relax the
365 * hardware by issuing this call
366 * @set_cs: set the logic level of the chip select line. May be called
367 * from interrupt context.
368 * @prepare_message: set up the controller to transfer a single message,
369 * for example doing DMA mapping. Called from threaded
370 * context.
371 * @transfer_one: transfer a single spi_transfer.
372 * - return 0 if the transfer is finished,
373 * - return 1 if the transfer is still in progress. When
374 * the driver is finished with this transfer it must
375 * call spi_finalize_current_transfer() so the subsystem
376 * can issue the next transfer. Note: transfer_one and
377 * transfer_one_message are mutually exclusive; when both
378 * are set, the generic subsystem does not call your
379 * transfer_one callback.
380 * @handle_err: the subsystem calls the driver to handle an error that occurs
381 * in the generic implementation of transfer_one_message().
382 * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
383 * This field is optional and should only be implemented if the
384 * controller has native support for memory like operations.
385 * @unprepare_message: undo any work done by prepare_message().
386 * @slave_abort: abort the ongoing transfer request on an SPI slave controller
387 * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
388 * CS number. Any individual value may be -ENOENT for CS lines that
389 * are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
390 * in new drivers.
391 * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
392 * number. Any individual value may be NULL for CS lines that
393 * are not GPIOs (driven by the SPI controller itself).
394 * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
395 * GPIO descriptors rather than using global GPIO numbers grabbed by the
396 * driver. This will fill in @cs_gpiods and @cs_gpios should not be used,
397 * and SPI devices will have the cs_gpiod assigned rather than cs_gpio.
398 * @statistics: statistics for the spi_controller
399 * @dma_tx: DMA transmit channel
400 * @dma_rx: DMA receive channel
401 * @dummy_rx: dummy receive buffer for full-duplex devices
402 * @dummy_tx: dummy transmit buffer for full-duplex devices
403 * @fw_translate_cs: If the boot firmware uses different numbering scheme
404 * what Linux expects, this optional hook can be used to translate
405 * between the two.
406 *
407 * Each SPI controller can communicate with one or more @spi_device
408 * children. These make a small bus, sharing MOSI, MISO and SCK signals
409 * but not chip select signals. Each device may be configured to use a
410 * different clock rate, since those shared signals are ignored unless
411 * the chip is selected.
412 *
413 * The driver for an SPI controller manages access to those devices through
414 * a queue of spi_message transactions, copying data between CPU memory and
415 * an SPI slave device. For each such message it queues, it calls the
416 * message's completion function when the transaction completes.
417 */
418struct spi_controller {
419 struct device dev;
420
421 struct list_head list;
422
423 /* other than negative (== assign one dynamically), bus_num is fully
424 * board-specific. usually that simplifies to being SOC-specific.
425 * example: one SOC has three SPI controllers, numbered 0..2,
426 * and one board's schematics might show it using SPI-2. software
427 * would normally use bus_num=2 for that controller.
428 */
429 s16 bus_num;
430
431 /* chipselects will be integral to many controllers; some others
432 * might use board-specific GPIOs.
433 */
434 u16 num_chipselect;
435
436 /* some SPI controllers pose alignment requirements on DMAable
437 * buffers; let protocol drivers know about these requirements.
438 */
439 u16 dma_alignment;
440
441 /* spi_device.mode flags understood by this controller driver */
442 u16 mode_bits;
443
444 /* bitmask of supported bits_per_word for transfers */
445 u32 bits_per_word_mask;
446#define SPI_BPW_MASK(bits) BIT((bits) - 1)
447#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
448#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
449
450 /* limits on transfer speed */
451 u32 min_speed_hz;
452 u32 max_speed_hz;
453
454 /* other constraints relevant to this driver */
455 u16 flags;
456#define SPI_CONTROLLER_HALF_DUPLEX BIT(0) /* can't do full duplex */
457#define SPI_CONTROLLER_NO_RX BIT(1) /* can't do buffer read */
458#define SPI_CONTROLLER_NO_TX BIT(2) /* can't do buffer write */
459#define SPI_CONTROLLER_MUST_RX BIT(3) /* requires rx */
460#define SPI_CONTROLLER_MUST_TX BIT(4) /* requires tx */
461
462#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
463
464 /* flag indicating this is an SPI slave controller */
465 bool slave;
466
467 /*
468 * on some hardware transfer / message size may be constrained
469 * the limit may depend on device transfer settings
470 */
471 size_t (*max_transfer_size)(struct spi_device *spi);
472 size_t (*max_message_size)(struct spi_device *spi);
473
474 /* I/O mutex */
475 struct mutex io_mutex;
476
477 /* lock and mutex for SPI bus locking */
478 spinlock_t bus_lock_spinlock;
479 struct mutex bus_lock_mutex;
480
481 /* flag indicating that the SPI bus is locked for exclusive use */
482 bool bus_lock_flag;
483
484 /* Setup mode and clock, etc (spi driver may call many times).
485 *
486 * IMPORTANT: this may be called when transfers to another
487 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
488 * which could break those transfers.
489 */
490 int (*setup)(struct spi_device *spi);
491
492 /* bidirectional bulk transfers
493 *
494 * + The transfer() method may not sleep; its main role is
495 * just to add the message to the queue.
496 * + For now there's no remove-from-queue operation, or
497 * any other request management
498 * + To a given spi_device, message queueing is pure fifo
499 *
500 * + The controller's main job is to process its message queue,
501 * selecting a chip (for masters), then transferring data
502 * + If there are multiple spi_device children, the i/o queue
503 * arbitration algorithm is unspecified (round robin, fifo,
504 * priority, reservations, preemption, etc)
505 *
506 * + Chipselect stays active during the entire message
507 * (unless modified by spi_transfer.cs_change != 0).
508 * + The message transfers use clock and SPI mode parameters
509 * previously established by setup() for this device
510 */
511 int (*transfer)(struct spi_device *spi,
512 struct spi_message *mesg);
513
514 /* called on release() to free memory provided by spi_controller */
515 void (*cleanup)(struct spi_device *spi);
516
517 /*
518 * Used to enable core support for DMA handling, if can_dma()
519 * exists and returns true then the transfer will be mapped
520 * prior to transfer_one() being called. The driver should
521 * not modify or store xfer and dma_tx and dma_rx must be set
522 * while the device is prepared.
523 */
524 bool (*can_dma)(struct spi_controller *ctlr,
525 struct spi_device *spi,
526 struct spi_transfer *xfer);
527
528 /*
529 * These hooks are for drivers that want to use the generic
530 * controller transfer queueing mechanism. If these are used, the
531 * transfer() function above must NOT be specified by the driver.
532 * Over time we expect SPI drivers to be phased over to this API.
533 */
534 bool queued;
535 struct kthread_worker kworker;
536 struct task_struct *kworker_task;
537 struct kthread_work pump_messages;
538 spinlock_t queue_lock;
539 struct list_head queue;
540 struct spi_message *cur_msg;
541 bool idling;
542 bool busy;
543 bool running;
544 bool rt;
545 bool auto_runtime_pm;
546 bool cur_msg_prepared;
547 bool cur_msg_mapped;
548 struct completion xfer_completion;
549 size_t max_dma_len;
550
551 int (*prepare_transfer_hardware)(struct spi_controller *ctlr);
552 int (*transfer_one_message)(struct spi_controller *ctlr,
553 struct spi_message *mesg);
554 int (*unprepare_transfer_hardware)(struct spi_controller *ctlr);
555 int (*prepare_message)(struct spi_controller *ctlr,
556 struct spi_message *message);
557 int (*unprepare_message)(struct spi_controller *ctlr,
558 struct spi_message *message);
559 int (*slave_abort)(struct spi_controller *ctlr);
560
561 /*
562 * These hooks are for drivers that use a generic implementation
563 * of transfer_one_message() provied by the core.
564 */
565 void (*set_cs)(struct spi_device *spi, bool enable);
566 int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
567 struct spi_transfer *transfer);
568 void (*handle_err)(struct spi_controller *ctlr,
569 struct spi_message *message);
570
571 /* Optimized handlers for SPI memory-like operations. */
572 const struct spi_controller_mem_ops *mem_ops;
573
574 /* gpio chip select */
575 int *cs_gpios;
576 struct gpio_desc **cs_gpiods;
577 bool use_gpio_descriptors;
578
579 /* statistics */
580 struct spi_statistics statistics;
581
582 /* DMA channels for use with core dmaengine helpers */
583 struct dma_chan *dma_tx;
584 struct dma_chan *dma_rx;
585
586 /* dummy data for full duplex devices */
587 void *dummy_rx;
588 void *dummy_tx;
589
590 int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
591};
592
593static inline void *spi_controller_get_devdata(struct spi_controller *ctlr)
594{
595 return dev_get_drvdata(&ctlr->dev);
596}
597
598static inline void spi_controller_set_devdata(struct spi_controller *ctlr,
599 void *data)
600{
601 dev_set_drvdata(&ctlr->dev, data);
602}
603
604static inline struct spi_controller *spi_controller_get(struct spi_controller *ctlr)
605{
606 if (!ctlr || !get_device(&ctlr->dev))
607 return NULL;
608 return ctlr;
609}
610
611static inline void spi_controller_put(struct spi_controller *ctlr)
612{
613 if (ctlr)
614 put_device(&ctlr->dev);
615}
616
617static inline bool spi_controller_is_slave(struct spi_controller *ctlr)
618{
619 return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->slave;
620}
621
622/* PM calls that need to be issued by the driver */
623extern int spi_controller_suspend(struct spi_controller *ctlr);
624extern int spi_controller_resume(struct spi_controller *ctlr);
625
626/* Calls the driver make to interact with the message queue */
627extern struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr);
628extern void spi_finalize_current_message(struct spi_controller *ctlr);
629extern void spi_finalize_current_transfer(struct spi_controller *ctlr);
630
631/* the spi driver core manages memory for the spi_controller classdev */
632extern struct spi_controller *__spi_alloc_controller(struct device *host,
633 unsigned int size, bool slave);
634
635static inline struct spi_controller *spi_alloc_master(struct device *host,
636 unsigned int size)
637{
638 return __spi_alloc_controller(host, size, false);
639}
640
641static inline struct spi_controller *spi_alloc_slave(struct device *host,
642 unsigned int size)
643{
644 if (!IS_ENABLED(CONFIG_SPI_SLAVE))
645 return NULL;
646
647 return __spi_alloc_controller(host, size, true);
648}
649
650extern int spi_register_controller(struct spi_controller *ctlr);
651extern int devm_spi_register_controller(struct device *dev,
652 struct spi_controller *ctlr);
653extern void spi_unregister_controller(struct spi_controller *ctlr);
654
655extern struct spi_controller *spi_busnum_to_master(u16 busnum);
656
657/*
658 * SPI resource management while processing a SPI message
659 */
660
661typedef void (*spi_res_release_t)(struct spi_controller *ctlr,
662 struct spi_message *msg,
663 void *res);
664
665/**
666 * struct spi_res - spi resource management structure
667 * @entry: list entry
668 * @release: release code called prior to freeing this resource
669 * @data: extra data allocated for the specific use-case
670 *
671 * this is based on ideas from devres, but focused on life-cycle
672 * management during spi_message processing
673 */
674struct spi_res {
675 struct list_head entry;
676 spi_res_release_t release;
677 unsigned long long data[]; /* guarantee ull alignment */
678};
679
680extern void *spi_res_alloc(struct spi_device *spi,
681 spi_res_release_t release,
682 size_t size, gfp_t gfp);
683extern void spi_res_add(struct spi_message *message, void *res);
684extern void spi_res_free(void *res);
685
686extern void spi_res_release(struct spi_controller *ctlr,
687 struct spi_message *message);
688
689/*---------------------------------------------------------------------------*/
690
691/*
692 * I/O INTERFACE between SPI controller and protocol drivers
693 *
694 * Protocol drivers use a queue of spi_messages, each transferring data
695 * between the controller and memory buffers.
696 *
697 * The spi_messages themselves consist of a series of read+write transfer
698 * segments. Those segments always read the same number of bits as they
699 * write; but one or the other is easily ignored by passing a null buffer
700 * pointer. (This is unlike most types of I/O API, because SPI hardware
701 * is full duplex.)
702 *
703 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
704 * up to the protocol driver, which guarantees the integrity of both (as
705 * well as the data buffers) for as long as the message is queued.
706 */
707
708/**
709 * struct spi_transfer - a read/write buffer pair
710 * @tx_buf: data to be written (dma-safe memory), or NULL
711 * @rx_buf: data to be read (dma-safe memory), or NULL
712 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
713 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
714 * @tx_nbits: number of bits used for writing. If 0 the default
715 * (SPI_NBITS_SINGLE) is used.
716 * @rx_nbits: number of bits used for reading. If 0 the default
717 * (SPI_NBITS_SINGLE) is used.
718 * @len: size of rx and tx buffers (in bytes)
719 * @speed_hz: Select a speed other than the device default for this
720 * transfer. If 0 the default (from @spi_device) is used.
721 * @bits_per_word: select a bits_per_word other than the device default
722 * for this transfer. If 0 the default (from @spi_device) is used.
723 * @cs_change: affects chipselect after this transfer completes
724 * @delay_usecs: microseconds to delay after this transfer before
725 * (optionally) changing the chipselect status, then starting
726 * the next transfer or completing this @spi_message.
727 * @word_delay_usecs: microseconds to inter word delay after each word size
728 * (set by bits_per_word) transmission.
729 * @word_delay: clock cycles to inter word delay after each word size
730 * (set by bits_per_word) transmission.
731 * @transfer_list: transfers are sequenced through @spi_message.transfers
732 * @tx_sg: Scatterlist for transmit, currently not for client use
733 * @rx_sg: Scatterlist for receive, currently not for client use
734 *
735 * SPI transfers always write the same number of bytes as they read.
736 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
737 * In some cases, they may also want to provide DMA addresses for
738 * the data being transferred; that may reduce overhead, when the
739 * underlying driver uses dma.
740 *
741 * If the transmit buffer is null, zeroes will be shifted out
742 * while filling @rx_buf. If the receive buffer is null, the data
743 * shifted in will be discarded. Only "len" bytes shift out (or in).
744 * It's an error to try to shift out a partial word. (For example, by
745 * shifting out three bytes with word size of sixteen or twenty bits;
746 * the former uses two bytes per word, the latter uses four bytes.)
747 *
748 * In-memory data values are always in native CPU byte order, translated
749 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
750 * for example when bits_per_word is sixteen, buffers are 2N bytes long
751 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
752 *
753 * When the word size of the SPI transfer is not a power-of-two multiple
754 * of eight bits, those in-memory words include extra bits. In-memory
755 * words are always seen by protocol drivers as right-justified, so the
756 * undefined (rx) or unused (tx) bits are always the most significant bits.
757 *
758 * All SPI transfers start with the relevant chipselect active. Normally
759 * it stays selected until after the last transfer in a message. Drivers
760 * can affect the chipselect signal using cs_change.
761 *
762 * (i) If the transfer isn't the last one in the message, this flag is
763 * used to make the chipselect briefly go inactive in the middle of the
764 * message. Toggling chipselect in this way may be needed to terminate
765 * a chip command, letting a single spi_message perform all of group of
766 * chip transactions together.
767 *
768 * (ii) When the transfer is the last one in the message, the chip may
769 * stay selected until the next transfer. On multi-device SPI busses
770 * with nothing blocking messages going to other devices, this is just
771 * a performance hint; starting a message to another device deselects
772 * this one. But in other cases, this can be used to ensure correctness.
773 * Some devices need protocol transactions to be built from a series of
774 * spi_message submissions, where the content of one message is determined
775 * by the results of previous messages and where the whole transaction
776 * ends when the chipselect goes intactive.
777 *
778 * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
779 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
780 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
781 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
782 *
783 * The code that submits an spi_message (and its spi_transfers)
784 * to the lower layers is responsible for managing its memory.
785 * Zero-initialize every field you don't set up explicitly, to
786 * insulate against future API updates. After you submit a message
787 * and its transfers, ignore them until its completion callback.
788 */
789struct spi_transfer {
790 /* it's ok if tx_buf == rx_buf (right?)
791 * for MicroWire, one buffer must be null
792 * buffers must work with dma_*map_single() calls, unless
793 * spi_message.is_dma_mapped reports a pre-existing mapping
794 */
795 const void *tx_buf;
796 void *rx_buf;
797 unsigned len;
798
799 dma_addr_t tx_dma;
800 dma_addr_t rx_dma;
801 struct sg_table tx_sg;
802 struct sg_table rx_sg;
803
804 unsigned cs_change:1;
805 unsigned tx_nbits:3;
806 unsigned rx_nbits:3;
807#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
808#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
809#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
810 u8 bits_per_word;
811 u8 word_delay_usecs;
812 u16 delay_usecs;
813 u32 speed_hz;
814 u16 word_delay;
815
816 struct list_head transfer_list;
817};
818
819/**
820 * struct spi_message - one multi-segment SPI transaction
821 * @transfers: list of transfer segments in this transaction
822 * @spi: SPI device to which the transaction is queued
823 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
824 * addresses for each transfer buffer
825 * @complete: called to report transaction completions
826 * @context: the argument to complete() when it's called
827 * @frame_length: the total number of bytes in the message
828 * @actual_length: the total number of bytes that were transferred in all
829 * successful segments
830 * @status: zero for success, else negative errno
831 * @queue: for use by whichever driver currently owns the message
832 * @state: for use by whichever driver currently owns the message
833 * @resources: for resource management when the spi message is processed
834 *
835 * A @spi_message is used to execute an atomic sequence of data transfers,
836 * each represented by a struct spi_transfer. The sequence is "atomic"
837 * in the sense that no other spi_message may use that SPI bus until that
838 * sequence completes. On some systems, many such sequences can execute as
839 * as single programmed DMA transfer. On all systems, these messages are
840 * queued, and might complete after transactions to other devices. Messages
841 * sent to a given spi_device are always executed in FIFO order.
842 *
843 * The code that submits an spi_message (and its spi_transfers)
844 * to the lower layers is responsible for managing its memory.
845 * Zero-initialize every field you don't set up explicitly, to
846 * insulate against future API updates. After you submit a message
847 * and its transfers, ignore them until its completion callback.
848 */
849struct spi_message {
850 struct list_head transfers;
851
852 struct spi_device *spi;
853
854 unsigned is_dma_mapped:1;
855
856 /* REVISIT: we might want a flag affecting the behavior of the
857 * last transfer ... allowing things like "read 16 bit length L"
858 * immediately followed by "read L bytes". Basically imposing
859 * a specific message scheduling algorithm.
860 *
861 * Some controller drivers (message-at-a-time queue processing)
862 * could provide that as their default scheduling algorithm. But
863 * others (with multi-message pipelines) could need a flag to
864 * tell them about such special cases.
865 */
866
867 /* completion is reported through a callback */
868 void (*complete)(void *context);
869 void *context;
870 unsigned frame_length;
871 unsigned actual_length;
872 int status;
873
874 /* for optional use by whatever driver currently owns the
875 * spi_message ... between calls to spi_async and then later
876 * complete(), that's the spi_controller controller driver.
877 */
878 struct list_head queue;
879 void *state;
880
881 /* list of spi_res reources when the spi message is processed */
882 struct list_head resources;
883};
884
885static inline void spi_message_init_no_memset(struct spi_message *m)
886{
887 INIT_LIST_HEAD(&m->transfers);
888 INIT_LIST_HEAD(&m->resources);
889}
890
891static inline void spi_message_init(struct spi_message *m)
892{
893 memset(m, 0, sizeof *m);
894 spi_message_init_no_memset(m);
895}
896
897static inline void
898spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
899{
900 list_add_tail(&t->transfer_list, &m->transfers);
901}
902
903static inline void
904spi_transfer_del(struct spi_transfer *t)
905{
906 list_del(&t->transfer_list);
907}
908
909/**
910 * spi_message_init_with_transfers - Initialize spi_message and append transfers
911 * @m: spi_message to be initialized
912 * @xfers: An array of spi transfers
913 * @num_xfers: Number of items in the xfer array
914 *
915 * This function initializes the given spi_message and adds each spi_transfer in
916 * the given array to the message.
917 */
918static inline void
919spi_message_init_with_transfers(struct spi_message *m,
920struct spi_transfer *xfers, unsigned int num_xfers)
921{
922 unsigned int i;
923
924 spi_message_init(m);
925 for (i = 0; i < num_xfers; ++i)
926 spi_message_add_tail(&xfers[i], m);
927}
928
929/* It's fine to embed message and transaction structures in other data
930 * structures so long as you don't free them while they're in use.
931 */
932
933static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
934{
935 struct spi_message *m;
936
937 m = kzalloc(sizeof(struct spi_message)
938 + ntrans * sizeof(struct spi_transfer),
939 flags);
940 if (m) {
941 unsigned i;
942 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
943
944 spi_message_init_no_memset(m);
945 for (i = 0; i < ntrans; i++, t++)
946 spi_message_add_tail(t, m);
947 }
948 return m;
949}
950
951static inline void spi_message_free(struct spi_message *m)
952{
953 kfree(m);
954}
955
956extern int spi_setup(struct spi_device *spi);
957extern int spi_async(struct spi_device *spi, struct spi_message *message);
958extern int spi_async_locked(struct spi_device *spi,
959 struct spi_message *message);
960extern int spi_slave_abort(struct spi_device *spi);
961
962static inline size_t
963spi_max_message_size(struct spi_device *spi)
964{
965 struct spi_controller *ctlr = spi->controller;
966
967 if (!ctlr->max_message_size)
968 return SIZE_MAX;
969 return ctlr->max_message_size(spi);
970}
971
972static inline size_t
973spi_max_transfer_size(struct spi_device *spi)
974{
975 struct spi_controller *ctlr = spi->controller;
976 size_t tr_max = SIZE_MAX;
977 size_t msg_max = spi_max_message_size(spi);
978
979 if (ctlr->max_transfer_size)
980 tr_max = ctlr->max_transfer_size(spi);
981
982 /* transfer size limit must not be greater than messsage size limit */
983 return min(tr_max, msg_max);
984}
985
986/*---------------------------------------------------------------------------*/
987
988/* SPI transfer replacement methods which make use of spi_res */
989
990struct spi_replaced_transfers;
991typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr,
992 struct spi_message *msg,
993 struct spi_replaced_transfers *res);
994/**
995 * struct spi_replaced_transfers - structure describing the spi_transfer
996 * replacements that have occurred
997 * so that they can get reverted
998 * @release: some extra release code to get executed prior to
999 * relasing this structure
1000 * @extradata: pointer to some extra data if requested or NULL
1001 * @replaced_transfers: transfers that have been replaced and which need
1002 * to get restored
1003 * @replaced_after: the transfer after which the @replaced_transfers
1004 * are to get re-inserted
1005 * @inserted: number of transfers inserted
1006 * @inserted_transfers: array of spi_transfers of array-size @inserted,
1007 * that have been replacing replaced_transfers
1008 *
1009 * note: that @extradata will point to @inserted_transfers[@inserted]
1010 * if some extra allocation is requested, so alignment will be the same
1011 * as for spi_transfers
1012 */
1013struct spi_replaced_transfers {
1014 spi_replaced_release_t release;
1015 void *extradata;
1016 struct list_head replaced_transfers;
1017 struct list_head *replaced_after;
1018 size_t inserted;
1019 struct spi_transfer inserted_transfers[];
1020};
1021
1022extern struct spi_replaced_transfers *spi_replace_transfers(
1023 struct spi_message *msg,
1024 struct spi_transfer *xfer_first,
1025 size_t remove,
1026 size_t insert,
1027 spi_replaced_release_t release,
1028 size_t extradatasize,
1029 gfp_t gfp);
1030
1031/*---------------------------------------------------------------------------*/
1032
1033/* SPI transfer transformation methods */
1034
1035extern int spi_split_transfers_maxsize(struct spi_controller *ctlr,
1036 struct spi_message *msg,
1037 size_t maxsize,
1038 gfp_t gfp);
1039
1040/*---------------------------------------------------------------------------*/
1041
1042/* All these synchronous SPI transfer routines are utilities layered
1043 * over the core async transfer primitive. Here, "synchronous" means
1044 * they will sleep uninterruptibly until the async transfer completes.
1045 */
1046
1047extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1048extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1049extern int spi_bus_lock(struct spi_controller *ctlr);
1050extern int spi_bus_unlock(struct spi_controller *ctlr);
1051
1052/**
1053 * spi_sync_transfer - synchronous SPI data transfer
1054 * @spi: device with which data will be exchanged
1055 * @xfers: An array of spi_transfers
1056 * @num_xfers: Number of items in the xfer array
1057 * Context: can sleep
1058 *
1059 * Does a synchronous SPI data transfer of the given spi_transfer array.
1060 *
1061 * For more specific semantics see spi_sync().
1062 *
1063 * Return: Return: zero on success, else a negative error code.
1064 */
1065static inline int
1066spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
1067 unsigned int num_xfers)
1068{
1069 struct spi_message msg;
1070
1071 spi_message_init_with_transfers(&msg, xfers, num_xfers);
1072
1073 return spi_sync(spi, &msg);
1074}
1075
1076/**
1077 * spi_write - SPI synchronous write
1078 * @spi: device to which data will be written
1079 * @buf: data buffer
1080 * @len: data buffer size
1081 * Context: can sleep
1082 *
1083 * This function writes the buffer @buf.
1084 * Callable only from contexts that can sleep.
1085 *
1086 * Return: zero on success, else a negative error code.
1087 */
1088static inline int
1089spi_write(struct spi_device *spi, const void *buf, size_t len)
1090{
1091 struct spi_transfer t = {
1092 .tx_buf = buf,
1093 .len = len,
1094 };
1095
1096 return spi_sync_transfer(spi, &t, 1);
1097}
1098
1099/**
1100 * spi_read - SPI synchronous read
1101 * @spi: device from which data will be read
1102 * @buf: data buffer
1103 * @len: data buffer size
1104 * Context: can sleep
1105 *
1106 * This function reads the buffer @buf.
1107 * Callable only from contexts that can sleep.
1108 *
1109 * Return: zero on success, else a negative error code.
1110 */
1111static inline int
1112spi_read(struct spi_device *spi, void *buf, size_t len)
1113{
1114 struct spi_transfer t = {
1115 .rx_buf = buf,
1116 .len = len,
1117 };
1118
1119 return spi_sync_transfer(spi, &t, 1);
1120}
1121
1122/* this copies txbuf and rxbuf data; for small transfers only! */
1123extern int spi_write_then_read(struct spi_device *spi,
1124 const void *txbuf, unsigned n_tx,
1125 void *rxbuf, unsigned n_rx);
1126
1127/**
1128 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1129 * @spi: device with which data will be exchanged
1130 * @cmd: command to be written before data is read back
1131 * Context: can sleep
1132 *
1133 * Callable only from contexts that can sleep.
1134 *
1135 * Return: the (unsigned) eight bit number returned by the
1136 * device, or else a negative error code.
1137 */
1138static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
1139{
1140 ssize_t status;
1141 u8 result;
1142
1143 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
1144
1145 /* return negative errno or unsigned value */
1146 return (status < 0) ? status : result;
1147}
1148
1149/**
1150 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1151 * @spi: device with which data will be exchanged
1152 * @cmd: command to be written before data is read back
1153 * Context: can sleep
1154 *
1155 * The number is returned in wire-order, which is at least sometimes
1156 * big-endian.
1157 *
1158 * Callable only from contexts that can sleep.
1159 *
1160 * Return: the (unsigned) sixteen bit number returned by the
1161 * device, or else a negative error code.
1162 */
1163static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
1164{
1165 ssize_t status;
1166 u16 result;
1167
1168 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1169
1170 /* return negative errno or unsigned value */
1171 return (status < 0) ? status : result;
1172}
1173
1174/**
1175 * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1176 * @spi: device with which data will be exchanged
1177 * @cmd: command to be written before data is read back
1178 * Context: can sleep
1179 *
1180 * This function is similar to spi_w8r16, with the exception that it will
1181 * convert the read 16 bit data word from big-endian to native endianness.
1182 *
1183 * Callable only from contexts that can sleep.
1184 *
1185 * Return: the (unsigned) sixteen bit number returned by the device in cpu
1186 * endianness, or else a negative error code.
1187 */
1188static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
1189
1190{
1191 ssize_t status;
1192 __be16 result;
1193
1194 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
1195 if (status < 0)
1196 return status;
1197
1198 return be16_to_cpu(result);
1199}
1200
1201/*---------------------------------------------------------------------------*/
1202
1203/*
1204 * INTERFACE between board init code and SPI infrastructure.
1205 *
1206 * No SPI driver ever sees these SPI device table segments, but
1207 * it's how the SPI core (or adapters that get hotplugged) grows
1208 * the driver model tree.
1209 *
1210 * As a rule, SPI devices can't be probed. Instead, board init code
1211 * provides a table listing the devices which are present, with enough
1212 * information to bind and set up the device's driver. There's basic
1213 * support for nonstatic configurations too; enough to handle adding
1214 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1215 */
1216
1217/**
1218 * struct spi_board_info - board-specific template for a SPI device
1219 * @modalias: Initializes spi_device.modalias; identifies the driver.
1220 * @platform_data: Initializes spi_device.platform_data; the particular
1221 * data stored there is driver-specific.
1222 * @properties: Additional device properties for the device.
1223 * @controller_data: Initializes spi_device.controller_data; some
1224 * controllers need hints about hardware setup, e.g. for DMA.
1225 * @irq: Initializes spi_device.irq; depends on how the board is wired.
1226 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
1227 * from the chip datasheet and board-specific signal quality issues.
1228 * @bus_num: Identifies which spi_controller parents the spi_device; unused
1229 * by spi_new_device(), and otherwise depends on board wiring.
1230 * @chip_select: Initializes spi_device.chip_select; depends on how
1231 * the board is wired.
1232 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
1233 * wiring (some devices support both 3WIRE and standard modes), and
1234 * possibly presence of an inverter in the chipselect path.
1235 *
1236 * When adding new SPI devices to the device tree, these structures serve
1237 * as a partial device template. They hold information which can't always
1238 * be determined by drivers. Information that probe() can establish (such
1239 * as the default transfer wordsize) is not included here.
1240 *
1241 * These structures are used in two places. Their primary role is to
1242 * be stored in tables of board-specific device descriptors, which are
1243 * declared early in board initialization and then used (much later) to
1244 * populate a controller's device tree after the that controller's driver
1245 * initializes. A secondary (and atypical) role is as a parameter to
1246 * spi_new_device() call, which happens after those controller drivers
1247 * are active in some dynamic board configuration models.
1248 */
1249struct spi_board_info {
1250 /* the device name and module name are coupled, like platform_bus;
1251 * "modalias" is normally the driver name.
1252 *
1253 * platform_data goes to spi_device.dev.platform_data,
1254 * controller_data goes to spi_device.controller_data,
1255 * device properties are copied and attached to spi_device,
1256 * irq is copied too
1257 */
1258 char modalias[SPI_NAME_SIZE];
1259 const void *platform_data;
1260 const struct property_entry *properties;
1261 void *controller_data;
1262 int irq;
1263
1264 /* slower signaling on noisy or low voltage boards */
1265 u32 max_speed_hz;
1266
1267
1268 /* bus_num is board specific and matches the bus_num of some
1269 * spi_controller that will probably be registered later.
1270 *
1271 * chip_select reflects how this chip is wired to that master;
1272 * it's less than num_chipselect.
1273 */
1274 u16 bus_num;
1275 u16 chip_select;
1276
1277 /* mode becomes spi_device.mode, and is essential for chips
1278 * where the default of SPI_CS_HIGH = 0 is wrong.
1279 */
1280 u16 mode;
1281
1282 /* ... may need additional spi_device chip config data here.
1283 * avoid stuff protocol drivers can set; but include stuff
1284 * needed to behave without being bound to a driver:
1285 * - quirks like clock rate mattering when not selected
1286 */
1287};
1288
1289#ifdef CONFIG_SPI
1290extern int
1291spi_register_board_info(struct spi_board_info const *info, unsigned n);
1292#else
1293/* board init code may ignore whether SPI is configured or not */
1294static inline int
1295spi_register_board_info(struct spi_board_info const *info, unsigned n)
1296 { return 0; }
1297#endif
1298
1299/* If you're hotplugging an adapter with devices (parport, usb, etc)
1300 * use spi_new_device() to describe each device. You can also call
1301 * spi_unregister_device() to start making that device vanish, but
1302 * normally that would be handled by spi_unregister_controller().
1303 *
1304 * You can also use spi_alloc_device() and spi_add_device() to use a two
1305 * stage registration sequence for each spi_device. This gives the caller
1306 * some more control over the spi_device structure before it is registered,
1307 * but requires that caller to initialize fields that would otherwise
1308 * be defined using the board info.
1309 */
1310extern struct spi_device *
1311spi_alloc_device(struct spi_controller *ctlr);
1312
1313extern int
1314spi_add_device(struct spi_device *spi);
1315
1316extern struct spi_device *
1317spi_new_device(struct spi_controller *, struct spi_board_info *);
1318
1319extern void spi_unregister_device(struct spi_device *spi);
1320
1321extern const struct spi_device_id *
1322spi_get_device_id(const struct spi_device *sdev);
1323
1324static inline bool
1325spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer)
1326{
1327 return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers);
1328}
1329
1330/* OF support code */
1331#if IS_ENABLED(CONFIG_OF)
1332
1333/* must call put_device() when done with returned spi_device device */
1334extern struct spi_device *
1335of_find_spi_device_by_node(struct device_node *node);
1336
1337#else
1338
1339static inline struct spi_device *
1340of_find_spi_device_by_node(struct device_node *node)
1341{
1342 return NULL;
1343}
1344
1345#endif /* IS_ENABLED(CONFIG_OF) */
1346
1347/* Compatibility layer */
1348#define spi_master spi_controller
1349
1350#define SPI_MASTER_HALF_DUPLEX SPI_CONTROLLER_HALF_DUPLEX
1351#define SPI_MASTER_NO_RX SPI_CONTROLLER_NO_RX
1352#define SPI_MASTER_NO_TX SPI_CONTROLLER_NO_TX
1353#define SPI_MASTER_MUST_RX SPI_CONTROLLER_MUST_RX
1354#define SPI_MASTER_MUST_TX SPI_CONTROLLER_MUST_TX
1355
1356#define spi_master_get_devdata(_ctlr) spi_controller_get_devdata(_ctlr)
1357#define spi_master_set_devdata(_ctlr, _data) \
1358 spi_controller_set_devdata(_ctlr, _data)
1359#define spi_master_get(_ctlr) spi_controller_get(_ctlr)
1360#define spi_master_put(_ctlr) spi_controller_put(_ctlr)
1361#define spi_master_suspend(_ctlr) spi_controller_suspend(_ctlr)
1362#define spi_master_resume(_ctlr) spi_controller_resume(_ctlr)
1363
1364#define spi_register_master(_ctlr) spi_register_controller(_ctlr)
1365#define devm_spi_register_master(_dev, _ctlr) \
1366 devm_spi_register_controller(_dev, _ctlr)
1367#define spi_unregister_master(_ctlr) spi_unregister_controller(_ctlr)
1368
1369#endif /* __LINUX_SPI_H */
1370