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1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
---|---|
2 | /* |
3 | * Platform data for WM8904 |
4 | * |
5 | * Copyright 2009 Wolfson Microelectronics PLC. |
6 | * |
7 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
8 | */ |
9 | |
10 | #ifndef __MFD_WM8994_PDATA_H__ |
11 | #define __MFD_WM8994_PDATA_H__ |
12 | |
13 | /* Used to enable configuration of a GPIO to all zeros */ |
14 | #define WM8904_GPIO_NO_CONFIG 0x8000 |
15 | |
16 | /* |
17 | * R6 (0x06) - Mic Bias Control 0 |
18 | */ |
19 | #define WM8904_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */ |
20 | #define WM8904_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */ |
21 | #define WM8904_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */ |
22 | #define WM8904_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ |
23 | #define WM8904_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ |
24 | #define WM8904_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ |
25 | #define WM8904_MICDET_ENA 0x0002 /* MICDET_ENA */ |
26 | #define WM8904_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */ |
27 | #define WM8904_MICDET_ENA_SHIFT 1 /* MICDET_ENA */ |
28 | #define WM8904_MICDET_ENA_WIDTH 1 /* MICDET_ENA */ |
29 | #define WM8904_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */ |
30 | #define WM8904_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */ |
31 | #define WM8904_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */ |
32 | #define WM8904_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */ |
33 | |
34 | /* |
35 | * R7 (0x07) - Mic Bias Control 1 |
36 | */ |
37 | #define WM8904_MIC_DET_FILTER_ENA 0x8000 /* MIC_DET_FILTER_ENA */ |
38 | #define WM8904_MIC_DET_FILTER_ENA_MASK 0x8000 /* MIC_DET_FILTER_ENA */ |
39 | #define WM8904_MIC_DET_FILTER_ENA_SHIFT 15 /* MIC_DET_FILTER_ENA */ |
40 | #define WM8904_MIC_DET_FILTER_ENA_WIDTH 1 /* MIC_DET_FILTER_ENA */ |
41 | #define WM8904_MIC_SHORT_FILTER_ENA 0x4000 /* MIC_SHORT_FILTER_ENA */ |
42 | #define WM8904_MIC_SHORT_FILTER_ENA_MASK 0x4000 /* MIC_SHORT_FILTER_ENA */ |
43 | #define WM8904_MIC_SHORT_FILTER_ENA_SHIFT 14 /* MIC_SHORT_FILTER_ENA */ |
44 | #define WM8904_MIC_SHORT_FILTER_ENA_WIDTH 1 /* MIC_SHORT_FILTER_ENA */ |
45 | #define WM8904_MICBIAS_SEL_MASK 0x0007 /* MICBIAS_SEL - [2:0] */ |
46 | #define WM8904_MICBIAS_SEL_SHIFT 0 /* MICBIAS_SEL - [2:0] */ |
47 | #define WM8904_MICBIAS_SEL_WIDTH 3 /* MICBIAS_SEL - [2:0] */ |
48 | |
49 | |
50 | /* |
51 | * R121 (0x79) - GPIO Control 1 |
52 | */ |
53 | #define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */ |
54 | #define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */ |
55 | #define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */ |
56 | #define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */ |
57 | #define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */ |
58 | #define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */ |
59 | #define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */ |
60 | #define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */ |
61 | #define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ |
62 | #define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */ |
63 | #define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */ |
64 | |
65 | /* |
66 | * R122 (0x7A) - GPIO Control 2 |
67 | */ |
68 | #define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */ |
69 | #define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */ |
70 | #define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */ |
71 | #define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */ |
72 | #define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */ |
73 | #define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */ |
74 | #define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */ |
75 | #define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */ |
76 | #define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */ |
77 | #define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */ |
78 | #define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */ |
79 | |
80 | /* |
81 | * R123 (0x7B) - GPIO Control 3 |
82 | */ |
83 | #define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */ |
84 | #define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */ |
85 | #define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */ |
86 | #define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */ |
87 | #define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */ |
88 | #define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */ |
89 | #define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */ |
90 | #define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */ |
91 | #define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ |
92 | #define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */ |
93 | #define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */ |
94 | |
95 | /* |
96 | * R124 (0x7C) - GPIO Control 4 |
97 | */ |
98 | #define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */ |
99 | #define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */ |
100 | #define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */ |
101 | #define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */ |
102 | #define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */ |
103 | #define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */ |
104 | #define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */ |
105 | #define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */ |
106 | #define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */ |
107 | #define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */ |
108 | #define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */ |
109 | #define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */ |
110 | #define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */ |
111 | #define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */ |
112 | #define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */ |
113 | |
114 | #define WM8904_MIC_REGS 2 |
115 | #define WM8904_GPIO_REGS 4 |
116 | #define WM8904_DRC_REGS 4 |
117 | #define WM8904_EQ_REGS 24 |
118 | |
119 | /** |
120 | * DRC configurations are specified with a label and a set of register |
121 | * values to write (the enable bits will be ignored). At runtime an |
122 | * enumerated control will be presented for each DRC block allowing |
123 | * the user to choose the configuration to use. |
124 | * |
125 | * Configurations may be generated by hand or by using the DRC control |
126 | * panel provided by the WISCE - see http://www.wolfsonmicro.com/wisce/ |
127 | * for details. |
128 | */ |
129 | struct wm8904_drc_cfg { |
130 | const char *name; |
131 | u16 regs[WM8904_DRC_REGS]; |
132 | }; |
133 | |
134 | /** |
135 | * ReTune Mobile configurations are specified with a label, sample |
136 | * rate and set of values to write (the enable bits will be ignored). |
137 | * |
138 | * Configurations are expected to be generated using the ReTune Mobile |
139 | * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/ |
140 | */ |
141 | struct wm8904_retune_mobile_cfg { |
142 | const char *name; |
143 | unsigned int rate; |
144 | u16 regs[WM8904_EQ_REGS]; |
145 | }; |
146 | |
147 | struct wm8904_pdata { |
148 | int num_drc_cfgs; |
149 | struct wm8904_drc_cfg *drc_cfgs; |
150 | |
151 | int num_retune_mobile_cfgs; |
152 | struct wm8904_retune_mobile_cfg *retune_mobile_cfgs; |
153 | |
154 | u32 gpio_cfg[WM8904_GPIO_REGS]; |
155 | u32 mic_cfg[WM8904_MIC_REGS]; |
156 | }; |
157 | |
158 | #endif |
159 |
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