| 1 | /* |
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| 2 | * linux/include/video/pmagb-b-fb.h |
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| 3 | * |
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| 4 | * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support, |
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| 5 | * Copyright (C) 1999, 2000, 2001 by |
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| 6 | * Michael Engel <engel@unix-ag.org> and |
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| 7 | * Karsten Merker <merker@linuxtag.org> |
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| 8 | * Copyright (c) 2005 Maciej W. Rozycki |
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| 9 | * |
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| 10 | * This file is subject to the terms and conditions of the GNU General |
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| 11 | * Public License. See the file COPYING in the main directory of this |
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| 12 | * archive for more details. |
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| 13 | */ |
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| 14 | |
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| 15 | /* IOmem resource offsets. */ |
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| 16 | #define PMAGB_B_ROM 0x000000 /* REX option ROM */ |
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| 17 | #define PMAGB_B_SFB 0x100000 /* SFB ASIC */ |
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| 18 | #define PMAGB_B_GP0 0x140000 /* general purpose output 0 */ |
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| 19 | #define PMAGB_B_GP1 0x180000 /* general purpose output 1 */ |
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| 20 | #define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */ |
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| 21 | #define PMAGB_B_FBMEM 0x200000 /* frame buffer */ |
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| 22 | #define PMAGB_B_SIZE 0x400000 /* address space size */ |
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| 23 | |
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| 24 | /* IOmem register offsets. */ |
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| 25 | #define SFB_REG_VID_HOR 0x64 /* video horizontal setup */ |
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| 26 | #define SFB_REG_VID_VER 0x68 /* video vertical setup */ |
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| 27 | #define SFB_REG_VID_BASE 0x6c /* video base address */ |
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| 28 | #define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */ |
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| 29 | #define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */ |
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| 30 | |
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| 31 | /* Video horizontal setup register constants. All bits are r/w. */ |
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| 32 | #define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */ |
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| 33 | #define SFB_VID_HOR_BP_MASK 0x7f |
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| 34 | #define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */ |
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| 35 | #define SFB_VID_HOR_SYN_MASK 0x7f |
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| 36 | #define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */ |
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| 37 | #define SFB_VID_HOR_FP_MASK 0x1f |
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| 38 | #define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */ |
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| 39 | #define SFB_VID_HOR_PIX_MASK 0x1ff |
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| 40 | |
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| 41 | /* Video vertical setup register constants. All bits are r/w. */ |
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| 42 | #define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */ |
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| 43 | #define SFB_VID_VER_BP_MASK 0x3f |
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| 44 | #define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */ |
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| 45 | #define SFB_VID_VER_SYN_MASK 0x3f |
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| 46 | #define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */ |
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| 47 | #define SFB_VID_VER_FP_MASK 0x1f |
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| 48 | #define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */ |
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| 49 | #define SFB_VID_VER_SL_MASK 0x7ff |
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| 50 | |
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| 51 | /* Video base address register constants. All bits are r/w. */ |
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| 52 | #define SFB_VID_BASE_MASK 0x1ff /* video base row address */ |
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| 53 | |
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| 54 | /* Bt459 register offsets, byte-wide registers. */ |
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| 55 | #define BT459_ADDR_LO 0x0 /* address low */ |
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| 56 | #define BT459_ADDR_HI 0x4 /* address high */ |
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| 57 | #define BT459_DATA 0x8 /* data window register */ |
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| 58 | #define BT459_CMAP 0xc /* color map window register */ |
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| 59 | |
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