| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | |
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| 3 | #ifndef __XEN_PUBLIC_HVM_PARAMS_H__ |
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| 4 | #define __XEN_PUBLIC_HVM_PARAMS_H__ |
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| 5 | |
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| 6 | #include <xen/interface/hvm/hvm_op.h> |
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| 7 | |
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| 8 | /* |
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| 9 | * Parameter space for HVMOP_{set,get}_param. |
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| 10 | */ |
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| 11 | |
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| 12 | #define HVM_PARAM_CALLBACK_IRQ 0 |
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| 13 | /* |
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| 14 | * How should CPU0 event-channel notifications be delivered? |
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| 15 | * |
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| 16 | * If val == 0 then CPU0 event-channel notifications are not delivered. |
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| 17 | * If val != 0, val[63:56] encodes the type, as follows: |
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| 18 | */ |
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| 19 | |
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| 20 | #define HVM_PARAM_CALLBACK_TYPE_GSI 0 |
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| 21 | /* |
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| 22 | * val[55:0] is a delivery GSI. GSI 0 cannot be used, as it aliases val == 0, |
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| 23 | * and disables all notifications. |
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| 24 | */ |
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| 25 | |
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| 26 | #define HVM_PARAM_CALLBACK_TYPE_PCI_INTX 1 |
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| 27 | /* |
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| 28 | * val[55:0] is a delivery PCI INTx line: |
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| 29 | * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0] |
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| 30 | */ |
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| 31 | |
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| 32 | #if defined(__i386__) || defined(__x86_64__) |
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| 33 | #define HVM_PARAM_CALLBACK_TYPE_VECTOR 2 |
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| 34 | /* |
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| 35 | * val[7:0] is a vector number. Check for XENFEAT_hvm_callback_vector to know |
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| 36 | * if this delivery method is available. |
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| 37 | */ |
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| 38 | #elif defined(__arm__) || defined(__aarch64__) |
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| 39 | #define HVM_PARAM_CALLBACK_TYPE_PPI 2 |
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| 40 | /* |
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| 41 | * val[55:16] needs to be zero. |
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| 42 | * val[15:8] is interrupt flag of the PPI used by event-channel: |
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| 43 | * bit 8: the PPI is edge(1) or level(0) triggered |
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| 44 | * bit 9: the PPI is active low(1) or high(0) |
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| 45 | * val[7:0] is a PPI number used by event-channel. |
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| 46 | * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to |
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| 47 | * the notification is handled by the interrupt controller. |
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| 48 | */ |
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| 49 | #endif |
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| 50 | |
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| 51 | #define HVM_PARAM_STORE_PFN 1 |
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| 52 | #define HVM_PARAM_STORE_EVTCHN 2 |
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| 53 | |
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| 54 | #define HVM_PARAM_PAE_ENABLED 4 |
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| 55 | |
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| 56 | #define HVM_PARAM_IOREQ_PFN 5 |
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| 57 | |
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| 58 | #define HVM_PARAM_BUFIOREQ_PFN 6 |
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| 59 | |
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| 60 | /* |
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| 61 | * Set mode for virtual timers (currently x86 only): |
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| 62 | * delay_for_missed_ticks (default): |
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| 63 | * Do not advance a vcpu's time beyond the correct delivery time for |
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| 64 | * interrupts that have been missed due to preemption. Deliver missed |
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| 65 | * interrupts when the vcpu is rescheduled and advance the vcpu's virtual |
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| 66 | * time stepwise for each one. |
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| 67 | * no_delay_for_missed_ticks: |
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| 68 | * As above, missed interrupts are delivered, but guest time always tracks |
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| 69 | * wallclock (i.e., real) time while doing so. |
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| 70 | * no_missed_ticks_pending: |
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| 71 | * No missed interrupts are held pending. Instead, to ensure ticks are |
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| 72 | * delivered at some non-zero rate, if we detect missed ticks then the |
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| 73 | * internal tick alarm is not disabled if the VCPU is preempted during the |
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| 74 | * next tick period. |
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| 75 | * one_missed_tick_pending: |
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| 76 | * Missed interrupts are collapsed together and delivered as one 'late tick'. |
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| 77 | * Guest time always tracks wallclock (i.e., real) time. |
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| 78 | */ |
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| 79 | #define HVM_PARAM_TIMER_MODE 10 |
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| 80 | #define HVMPTM_delay_for_missed_ticks 0 |
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| 81 | #define HVMPTM_no_delay_for_missed_ticks 1 |
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| 82 | #define HVMPTM_no_missed_ticks_pending 2 |
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| 83 | #define HVMPTM_one_missed_tick_pending 3 |
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| 84 | |
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| 85 | /* Boolean: Enable virtual HPET (high-precision event timer)? (x86-only) */ |
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| 86 | #define HVM_PARAM_HPET_ENABLED 11 |
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| 87 | |
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| 88 | /* Identity-map page directory used by Intel EPT when CR0.PG=0. */ |
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| 89 | #define HVM_PARAM_IDENT_PT 12 |
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| 90 | |
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| 91 | /* Device Model domain, defaults to 0. */ |
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| 92 | #define HVM_PARAM_DM_DOMAIN 13 |
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| 93 | |
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| 94 | /* ACPI S state: currently support S0 and S3 on x86. */ |
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| 95 | #define HVM_PARAM_ACPI_S_STATE 14 |
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| 96 | |
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| 97 | /* TSS used on Intel when CR0.PE=0. */ |
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| 98 | #define HVM_PARAM_VM86_TSS 15 |
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| 99 | |
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| 100 | /* Boolean: Enable aligning all periodic vpts to reduce interrupts */ |
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| 101 | #define HVM_PARAM_VPT_ALIGN 16 |
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| 102 | |
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| 103 | /* Console debug shared memory ring and event channel */ |
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| 104 | #define HVM_PARAM_CONSOLE_PFN 17 |
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| 105 | #define HVM_PARAM_CONSOLE_EVTCHN 18 |
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| 106 | |
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| 107 | #define HVM_NR_PARAMS 19 |
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| 108 | |
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| 109 | #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */ |
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| 110 | |
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