| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* ----------------------------------------------------------------------- * |
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| 3 | * |
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| 4 | * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved |
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| 5 | * |
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| 6 | * ----------------------------------------------------------------------- */ |
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| 7 | |
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| 8 | /* |
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| 9 | * raid6/x86.h |
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| 10 | * |
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| 11 | * Definitions common to x86 and x86-64 RAID-6 code only |
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| 12 | */ |
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| 13 | |
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| 14 | #ifndef LINUX_RAID_RAID6X86_H |
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| 15 | #define LINUX_RAID_RAID6X86_H |
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| 16 | |
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| 17 | #if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__) |
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| 18 | |
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| 19 | #ifdef __KERNEL__ /* Real code */ |
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| 20 | |
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| 21 | #include <asm/fpu/api.h> |
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| 22 | |
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| 23 | #else /* Dummy code for user space testing */ |
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| 24 | |
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| 25 | static inline void kernel_fpu_begin(void) |
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| 26 | { |
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| 27 | } |
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| 28 | |
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| 29 | static inline void kernel_fpu_end(void) |
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| 30 | { |
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| 31 | } |
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| 32 | |
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| 33 | #define __aligned(x) __attribute__((aligned(x))) |
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| 34 | |
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| 35 | #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ |
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| 36 | #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions |
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| 37 | * (fast save and restore) */ |
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| 38 | #define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */ |
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| 39 | #define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */ |
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| 40 | #define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */ |
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| 41 | #define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */ |
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| 42 | #define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */ |
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| 43 | #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */ |
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| 44 | #define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */ |
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| 45 | #define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular) |
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| 46 | * Instructions |
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| 47 | */ |
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| 48 | #define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular) |
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| 49 | * Instructions |
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| 50 | */ |
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| 51 | #define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length) |
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| 52 | * Extensions |
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| 53 | */ |
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| 54 | #define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ |
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| 55 | |
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| 56 | /* Should work well enough on modern CPUs for testing */ |
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| 57 | static inline int boot_cpu_has(int flag) |
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| 58 | { |
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| 59 | u32 eax, ebx, ecx, edx; |
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| 60 | |
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| 61 | eax = (flag & 0x100) ? 7 : |
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| 62 | (flag & 0x20) ? 0x80000001 : 1; |
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| 63 | ecx = 0; |
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| 64 | |
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| 65 | asm volatile("cpuid" |
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| 66 | : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx)); |
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| 67 | |
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| 68 | return ((flag & 0x100 ? ebx : |
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| 69 | (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1; |
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| 70 | } |
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| 71 | |
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| 72 | #endif /* ndef __KERNEL__ */ |
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| 73 | |
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| 74 | #endif |
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| 75 | #endif |
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| 76 | |
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