1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* |
3 | * card-als4000.c - driver for Avance Logic ALS4000 based soundcards. |
4 | * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>, |
5 | * Jaroslav Kysela <perex@perex.cz> |
6 | * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com> |
7 | * |
8 | * Framework borrowed from Massimo Piccioni's card-als100.c. |
9 | * |
10 | * NOTES |
11 | * |
12 | * Since Avance does not provide any meaningful documentation, and I |
13 | * bought an ALS4000 based soundcard, I was forced to base this driver |
14 | * on reverse engineering. |
15 | * |
16 | * Note: this is no longer true (thank you!): |
17 | * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site. |
18 | * Page numbers stated anywhere below with the "SPECS_PAGE:" tag |
19 | * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998. |
20 | * |
21 | * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an |
22 | * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport |
23 | * interface. These subsystems can be mapped into ISA io-port space, |
24 | * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ |
25 | * services to the subsystems. |
26 | * |
27 | * While ALS4000 is very similar to a SoundBlaster, the differences in |
28 | * DMA and capturing require more changes to the SoundBlaster than |
29 | * desirable, so I made this separate driver. |
30 | * |
31 | * The ALS4000 can do real full duplex playback/capture. |
32 | * |
33 | * FMDAC: |
34 | * - 0x4f -> port 0x14 |
35 | * - port 0x15 |= 1 |
36 | * |
37 | * Enable/disable 3D sound: |
38 | * - 0x50 -> port 0x14 |
39 | * - change bit 6 (0x40) of port 0x15 |
40 | * |
41 | * Set QSound: |
42 | * - 0xdb -> port 0x14 |
43 | * - set port 0x15: |
44 | * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0) |
45 | * |
46 | * Set KSound: |
47 | * - value -> some port 0x0c0d |
48 | * |
49 | * ToDo: |
50 | * - by default, don't enable legacy game and use PCI game I/O |
51 | * - power management? (card can do voice wakeup according to datasheet!!) |
52 | */ |
53 | |
54 | #include <linux/io.h> |
55 | #include <linux/init.h> |
56 | #include <linux/pci.h> |
57 | #include <linux/gameport.h> |
58 | #include <linux/module.h> |
59 | #include <linux/dma-mapping.h> |
60 | #include <sound/core.h> |
61 | #include <sound/pcm.h> |
62 | #include <sound/rawmidi.h> |
63 | #include <sound/mpu401.h> |
64 | #include <sound/opl3.h> |
65 | #include <sound/sb.h> |
66 | #include <sound/initval.h> |
67 | |
68 | MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr" ); |
69 | MODULE_DESCRIPTION("Avance Logic ALS4000" ); |
70 | MODULE_LICENSE("GPL" ); |
71 | |
72 | #if IS_REACHABLE(CONFIG_GAMEPORT) |
73 | #define SUPPORT_JOYSTICK 1 |
74 | #endif |
75 | |
76 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
77 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ |
78 | static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ |
79 | #ifdef SUPPORT_JOYSTICK |
80 | static int joystick_port[SNDRV_CARDS]; |
81 | #endif |
82 | |
83 | module_param_array(index, int, NULL, 0444); |
84 | MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard." ); |
85 | module_param_array(id, charp, NULL, 0444); |
86 | MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard." ); |
87 | module_param_array(enable, bool, NULL, 0444); |
88 | MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard." ); |
89 | #ifdef SUPPORT_JOYSTICK |
90 | module_param_hw_array(joystick_port, int, ioport, NULL, 0444); |
91 | MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)" ); |
92 | #endif |
93 | |
94 | struct snd_card_als4000 { |
95 | /* most frequent access first */ |
96 | unsigned long iobase; |
97 | struct pci_dev *pci; |
98 | struct snd_sb *chip; |
99 | #ifdef SUPPORT_JOYSTICK |
100 | struct gameport *gameport; |
101 | #endif |
102 | }; |
103 | |
104 | static const struct pci_device_id snd_als4000_ids[] = { |
105 | { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */ |
106 | { 0, } |
107 | }; |
108 | |
109 | MODULE_DEVICE_TABLE(pci, snd_als4000_ids); |
110 | |
111 | enum als4k_iobase_t { |
112 | /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */ |
113 | ALS4K_IOD_00_AC97_ACCESS = 0x00, |
114 | ALS4K_IOW_04_AC97_READ = 0x04, |
115 | ALS4K_IOB_06_AC97_STATUS = 0x06, |
116 | ALS4K_IOB_07_IRQSTATUS = 0x07, |
117 | ALS4K_IOD_08_GCR_DATA = 0x08, |
118 | ALS4K_IOB_0C_GCR_INDEX = 0x0c, |
119 | ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e, |
120 | ALS4K_IOB_10_ADLIB_ADDR0 = 0x10, |
121 | ALS4K_IOB_11_ADLIB_ADDR1 = 0x11, |
122 | ALS4K_IOB_12_ADLIB_ADDR2 = 0x12, |
123 | ALS4K_IOB_13_ADLIB_ADDR3 = 0x13, |
124 | ALS4K_IOB_14_MIXER_INDEX = 0x14, |
125 | ALS4K_IOB_15_MIXER_DATA = 0x15, |
126 | ALS4K_IOB_16_ESP_RESET = 0x16, |
127 | ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */ |
128 | ALS4K_IOB_18_OPL_ADDR0 = 0x18, |
129 | ALS4K_IOB_19_OPL_ADDR1 = 0x19, |
130 | ALS4K_IOB_1A_ESP_RD_DATA = 0x1a, |
131 | ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c, |
132 | ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */ |
133 | ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e, |
134 | ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f, |
135 | ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20, |
136 | ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21, |
137 | ALS4K_IOB_30_MIDI_DATA = 0x30, |
138 | ALS4K_IOB_31_MIDI_STATUS = 0x31, |
139 | ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */ |
140 | }; |
141 | |
142 | enum als4k_iobase_0e_t { |
143 | ALS4K_IOB_0E_MPU_IRQ = 0x10, |
144 | ALS4K_IOB_0E_CR1E_IRQ = 0x40, |
145 | ALS4K_IOB_0E_SB_DMA_IRQ = 0x80, |
146 | }; |
147 | |
148 | enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */ |
149 | ALS4K_GCR8C_MISC_CTRL = 0x8c, |
150 | ALS4K_GCR90_TEST_MODE_REG = 0x90, |
151 | ALS4K_GCR91_DMA0_ADDR = 0x91, |
152 | ALS4K_GCR92_DMA0_MODE_COUNT = 0x92, |
153 | ALS4K_GCR93_DMA1_ADDR = 0x93, |
154 | ALS4K_GCR94_DMA1_MODE_COUNT = 0x94, |
155 | ALS4K_GCR95_DMA3_ADDR = 0x95, |
156 | ALS4K_GCR96_DMA3_MODE_COUNT = 0x96, |
157 | ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99, |
158 | ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0, |
159 | ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1, |
160 | ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2, |
161 | ALS4K_GCRA3_FIFO2_COUNT = 0xa3, |
162 | ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4, |
163 | ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5, |
164 | ALS4K_GCRA6_PM_CTRL = 0xa6, |
165 | ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7, |
166 | ALS4K_GCRA8_LEGACY_CFG1 = 0xa8, |
167 | ALS4K_GCRA9_LEGACY_CFG2 = 0xa9, |
168 | ALS4K_GCRFF_DUMMY_SCRATCH = 0xff, |
169 | }; |
170 | |
171 | enum als4k_gcr8c_t { |
172 | ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000, |
173 | ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000 |
174 | }; |
175 | |
176 | static inline void snd_als4k_iobase_writeb(unsigned long iobase, |
177 | enum als4k_iobase_t reg, |
178 | u8 val) |
179 | { |
180 | outb(value: val, port: iobase + reg); |
181 | } |
182 | |
183 | static inline void snd_als4k_iobase_writel(unsigned long iobase, |
184 | enum als4k_iobase_t reg, |
185 | u32 val) |
186 | { |
187 | outl(value: val, port: iobase + reg); |
188 | } |
189 | |
190 | static inline u8 snd_als4k_iobase_readb(unsigned long iobase, |
191 | enum als4k_iobase_t reg) |
192 | { |
193 | return inb(port: iobase + reg); |
194 | } |
195 | |
196 | static inline u32 snd_als4k_iobase_readl(unsigned long iobase, |
197 | enum als4k_iobase_t reg) |
198 | { |
199 | return inl(port: iobase + reg); |
200 | } |
201 | |
202 | static inline void snd_als4k_gcr_write_addr(unsigned long iobase, |
203 | enum als4k_gcr_t reg, |
204 | u32 val) |
205 | { |
206 | snd_als4k_iobase_writeb(iobase, reg: ALS4K_IOB_0C_GCR_INDEX, val: reg); |
207 | snd_als4k_iobase_writel(iobase, reg: ALS4K_IOD_08_GCR_DATA, val); |
208 | } |
209 | |
210 | static inline void snd_als4k_gcr_write(struct snd_sb *sb, |
211 | enum als4k_gcr_t reg, |
212 | u32 val) |
213 | { |
214 | snd_als4k_gcr_write_addr(iobase: sb->alt_port, reg, val); |
215 | } |
216 | |
217 | static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase, |
218 | enum als4k_gcr_t reg) |
219 | { |
220 | /* SPECS_PAGE: 37/38 */ |
221 | snd_als4k_iobase_writeb(iobase, reg: ALS4K_IOB_0C_GCR_INDEX, val: reg); |
222 | return snd_als4k_iobase_readl(iobase, reg: ALS4K_IOD_08_GCR_DATA); |
223 | } |
224 | |
225 | static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg) |
226 | { |
227 | return snd_als4k_gcr_read_addr(iobase: sb->alt_port, reg); |
228 | } |
229 | |
230 | enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */ |
231 | ALS4K_CR0_SB_CONFIG = 0x00, |
232 | ALS4K_CR2_MISC_CONTROL = 0x02, |
233 | ALS4K_CR3_CONFIGURATION = 0x03, |
234 | ALS4K_CR17_FIFO_STATUS = 0x17, |
235 | ALS4K_CR18_ESP_MAJOR_VERSION = 0x18, |
236 | ALS4K_CR19_ESP_MINOR_VERSION = 0x19, |
237 | ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a, |
238 | ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c, |
239 | ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d, |
240 | ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */ |
241 | ALS4K_CR3A_MISC_CONTROL = 0x3a, |
242 | ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */ |
243 | ALS4K_CR3C_CRC32_BYTE1 = 0x3c, |
244 | ALS4K_CR3D_CRC32_BYTE2 = 0x3d, |
245 | ALS4K_CR3E_CRC32_BYTE3 = 0x3e, |
246 | }; |
247 | |
248 | enum als4k_cr0_t { |
249 | ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */ |
250 | ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */ |
251 | ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80, |
252 | }; |
253 | |
254 | static inline void snd_als4_cr_write(struct snd_sb *chip, |
255 | enum als4k_cr_t reg, |
256 | u8 data) |
257 | { |
258 | /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index |
259 | * NOTE: assumes chip->mixer_lock to be locked externally already! |
260 | * SPECS_PAGE: 6 */ |
261 | snd_sbmixer_write(chip, reg: reg | 0xc0, data); |
262 | } |
263 | |
264 | static inline u8 snd_als4_cr_read(struct snd_sb *chip, |
265 | enum als4k_cr_t reg) |
266 | { |
267 | /* NOTE: assumes chip->mixer_lock to be locked externally already! */ |
268 | return snd_sbmixer_read(chip, reg: reg | 0xc0); |
269 | } |
270 | |
271 | |
272 | |
273 | static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate) |
274 | { |
275 | if (!(chip->mode & SB_RATE_LOCK)) { |
276 | snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); |
277 | snd_sbdsp_command(chip, val: rate>>8); |
278 | snd_sbdsp_command(chip, val: rate); |
279 | } |
280 | } |
281 | |
282 | static inline void snd_als4000_set_capture_dma(struct snd_sb *chip, |
283 | dma_addr_t addr, unsigned size) |
284 | { |
285 | /* SPECS_PAGE: 40 */ |
286 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCRA2_FIFO2_PCIADDR, val: addr); |
287 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCRA3_FIFO2_COUNT, val: (size-1)); |
288 | } |
289 | |
290 | static inline void snd_als4000_set_playback_dma(struct snd_sb *chip, |
291 | dma_addr_t addr, |
292 | unsigned size) |
293 | { |
294 | /* SPECS_PAGE: 38 */ |
295 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCR91_DMA0_ADDR, val: addr); |
296 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCR92_DMA0_MODE_COUNT, |
297 | val: (size-1)|0x180000); |
298 | } |
299 | |
300 | #define ALS4000_FORMAT_SIGNED (1<<0) |
301 | #define ALS4000_FORMAT_16BIT (1<<1) |
302 | #define ALS4000_FORMAT_STEREO (1<<2) |
303 | |
304 | static int snd_als4000_get_format(struct snd_pcm_runtime *runtime) |
305 | { |
306 | int result; |
307 | |
308 | result = 0; |
309 | if (snd_pcm_format_signed(format: runtime->format)) |
310 | result |= ALS4000_FORMAT_SIGNED; |
311 | if (snd_pcm_format_physical_width(format: runtime->format) == 16) |
312 | result |= ALS4000_FORMAT_16BIT; |
313 | if (runtime->channels > 1) |
314 | result |= ALS4000_FORMAT_STEREO; |
315 | return result; |
316 | } |
317 | |
318 | /* structure for setting up playback */ |
319 | static const struct { |
320 | unsigned char dsp_cmd, dma_on, dma_off, format; |
321 | } playback_cmd_vals[]={ |
322 | /* ALS4000_FORMAT_U8_MONO */ |
323 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO }, |
324 | /* ALS4000_FORMAT_S8_MONO */ |
325 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO }, |
326 | /* ALS4000_FORMAT_U16L_MONO */ |
327 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO }, |
328 | /* ALS4000_FORMAT_S16L_MONO */ |
329 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO }, |
330 | /* ALS4000_FORMAT_U8_STEREO */ |
331 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO }, |
332 | /* ALS4000_FORMAT_S8_STEREO */ |
333 | { SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO }, |
334 | /* ALS4000_FORMAT_U16L_STEREO */ |
335 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO }, |
336 | /* ALS4000_FORMAT_S16L_STEREO */ |
337 | { SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO }, |
338 | }; |
339 | #define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format]) |
340 | |
341 | /* structure for setting up capture */ |
342 | enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 }; |
343 | static const unsigned char capture_cmd_vals[]= |
344 | { |
345 | CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */ |
346 | CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */ |
347 | CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */ |
348 | CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */ |
349 | CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */ |
350 | CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */ |
351 | CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */ |
352 | CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */ |
353 | }; |
354 | #define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format]) |
355 | |
356 | static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream) |
357 | { |
358 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
359 | struct snd_pcm_runtime *runtime = substream->runtime; |
360 | unsigned long size; |
361 | unsigned count; |
362 | |
363 | chip->capture_format = snd_als4000_get_format(runtime); |
364 | |
365 | size = snd_pcm_lib_buffer_bytes(substream); |
366 | count = snd_pcm_lib_period_bytes(substream); |
367 | |
368 | if (chip->capture_format & ALS4000_FORMAT_16BIT) |
369 | count >>= 1; |
370 | count--; |
371 | |
372 | spin_lock_irq(lock: &chip->reg_lock); |
373 | snd_als4000_set_rate(chip, rate: runtime->rate); |
374 | snd_als4000_set_capture_dma(chip, addr: runtime->dma_addr, size); |
375 | spin_unlock_irq(lock: &chip->reg_lock); |
376 | spin_lock_irq(lock: &chip->mixer_lock); |
377 | snd_als4_cr_write(chip, reg: ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, data: count & 0xff); |
378 | snd_als4_cr_write(chip, reg: ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, data: count >> 8); |
379 | spin_unlock_irq(lock: &chip->mixer_lock); |
380 | return 0; |
381 | } |
382 | |
383 | static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream) |
384 | { |
385 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
386 | struct snd_pcm_runtime *runtime = substream->runtime; |
387 | unsigned long size; |
388 | unsigned count; |
389 | |
390 | chip->playback_format = snd_als4000_get_format(runtime); |
391 | |
392 | size = snd_pcm_lib_buffer_bytes(substream); |
393 | count = snd_pcm_lib_period_bytes(substream); |
394 | |
395 | if (chip->playback_format & ALS4000_FORMAT_16BIT) |
396 | count >>= 1; |
397 | count--; |
398 | |
399 | /* FIXME: from second playback on, there's a lot more clicks and pops |
400 | * involved here than on first playback. Fiddling with |
401 | * tons of different settings didn't help (DMA, speaker on/off, |
402 | * reordering, ...). Something seems to get enabled on playback |
403 | * that I haven't found out how to disable again, which then causes |
404 | * the switching pops to reach the speakers the next time here. */ |
405 | spin_lock_irq(lock: &chip->reg_lock); |
406 | snd_als4000_set_rate(chip, rate: runtime->rate); |
407 | snd_als4000_set_playback_dma(chip, addr: runtime->dma_addr, size); |
408 | |
409 | /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */ |
410 | /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */ |
411 | snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd); |
412 | snd_sbdsp_command(chip, playback_cmd(chip).format); |
413 | snd_sbdsp_command(chip, val: count & 0xff); |
414 | snd_sbdsp_command(chip, val: count >> 8); |
415 | snd_sbdsp_command(chip, playback_cmd(chip).dma_off); |
416 | spin_unlock_irq(lock: &chip->reg_lock); |
417 | |
418 | return 0; |
419 | } |
420 | |
421 | static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
422 | { |
423 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
424 | int result = 0; |
425 | |
426 | /* FIXME race condition in here!!! |
427 | chip->mode non-atomic update gets consistently protected |
428 | by reg_lock always, _except_ for this place!! |
429 | Probably need to take reg_lock as outer (or inner??) lock, too. |
430 | (or serialize both lock operations? probably not, though... - racy?) |
431 | */ |
432 | spin_lock(lock: &chip->mixer_lock); |
433 | switch (cmd) { |
434 | case SNDRV_PCM_TRIGGER_START: |
435 | case SNDRV_PCM_TRIGGER_RESUME: |
436 | chip->mode |= SB_RATE_LOCK_CAPTURE; |
437 | snd_als4_cr_write(chip, reg: ALS4K_CR1E_FIFO2_CONTROL, |
438 | capture_cmd(chip)); |
439 | break; |
440 | case SNDRV_PCM_TRIGGER_STOP: |
441 | case SNDRV_PCM_TRIGGER_SUSPEND: |
442 | chip->mode &= ~SB_RATE_LOCK_CAPTURE; |
443 | snd_als4_cr_write(chip, reg: ALS4K_CR1E_FIFO2_CONTROL, |
444 | capture_cmd(chip)); |
445 | break; |
446 | default: |
447 | result = -EINVAL; |
448 | break; |
449 | } |
450 | spin_unlock(lock: &chip->mixer_lock); |
451 | return result; |
452 | } |
453 | |
454 | static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
455 | { |
456 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
457 | int result = 0; |
458 | |
459 | spin_lock(lock: &chip->reg_lock); |
460 | switch (cmd) { |
461 | case SNDRV_PCM_TRIGGER_START: |
462 | case SNDRV_PCM_TRIGGER_RESUME: |
463 | chip->mode |= SB_RATE_LOCK_PLAYBACK; |
464 | snd_sbdsp_command(chip, playback_cmd(chip).dma_on); |
465 | break; |
466 | case SNDRV_PCM_TRIGGER_STOP: |
467 | case SNDRV_PCM_TRIGGER_SUSPEND: |
468 | snd_sbdsp_command(chip, playback_cmd(chip).dma_off); |
469 | chip->mode &= ~SB_RATE_LOCK_PLAYBACK; |
470 | break; |
471 | default: |
472 | result = -EINVAL; |
473 | break; |
474 | } |
475 | spin_unlock(lock: &chip->reg_lock); |
476 | return result; |
477 | } |
478 | |
479 | static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream) |
480 | { |
481 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
482 | unsigned int result; |
483 | |
484 | spin_lock(lock: &chip->reg_lock); |
485 | result = snd_als4k_gcr_read(sb: chip, reg: ALS4K_GCRA4_FIFO2_CURRENT_ADDR); |
486 | spin_unlock(lock: &chip->reg_lock); |
487 | result &= 0xffff; |
488 | return bytes_to_frames( runtime: substream->runtime, size: result ); |
489 | } |
490 | |
491 | static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream) |
492 | { |
493 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
494 | unsigned result; |
495 | |
496 | spin_lock(lock: &chip->reg_lock); |
497 | result = snd_als4k_gcr_read(sb: chip, reg: ALS4K_GCRA0_FIFO1_CURRENT_ADDR); |
498 | spin_unlock(lock: &chip->reg_lock); |
499 | result &= 0xffff; |
500 | return bytes_to_frames( runtime: substream->runtime, size: result ); |
501 | } |
502 | |
503 | /* FIXME: this IRQ routine doesn't really support IRQ sharing (we always |
504 | * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not). |
505 | * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK |
506 | * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ |
507 | * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something |
508 | * could be optimized here to query/write one register only... |
509 | * And even if both registers need to be queried, then there's still the |
510 | * question of whether it's actually correct to ACK PCI IRQ before reading |
511 | * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear* |
512 | * SB IRQ status. |
513 | * (hmm, SPECS_PAGE: 38 mentions it the other way around!) |
514 | * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS?? |
515 | * */ |
516 | static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id) |
517 | { |
518 | struct snd_sb *chip = dev_id; |
519 | unsigned pci_irqstatus; |
520 | unsigned sb_irqstatus; |
521 | |
522 | /* find out which bit of the ALS4000 PCI block produced the interrupt, |
523 | SPECS_PAGE: 38, 5 */ |
524 | pci_irqstatus = snd_als4k_iobase_readb(iobase: chip->alt_port, |
525 | reg: ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU); |
526 | if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ) |
527 | && (chip->playback_substream)) /* playback */ |
528 | snd_pcm_period_elapsed(substream: chip->playback_substream); |
529 | if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ) |
530 | && (chip->capture_substream)) /* capturing */ |
531 | snd_pcm_period_elapsed(substream: chip->capture_substream); |
532 | if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ) |
533 | && (chip->rmidi)) /* MPU401 interrupt */ |
534 | snd_mpu401_uart_interrupt(irq, dev_id: chip->rmidi->private_data); |
535 | /* ACK the PCI block IRQ */ |
536 | snd_als4k_iobase_writeb(iobase: chip->alt_port, |
537 | reg: ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, val: pci_irqstatus); |
538 | |
539 | spin_lock(lock: &chip->mixer_lock); |
540 | /* SPECS_PAGE: 20 */ |
541 | sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); |
542 | spin_unlock(lock: &chip->mixer_lock); |
543 | |
544 | if (sb_irqstatus & SB_IRQTYPE_8BIT) |
545 | snd_sb_ack_8bit(chip); |
546 | if (sb_irqstatus & SB_IRQTYPE_16BIT) |
547 | snd_sb_ack_16bit(chip); |
548 | if (sb_irqstatus & SB_IRQTYPE_MPUIN) |
549 | inb(port: chip->mpu_port); |
550 | if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA) |
551 | snd_als4k_iobase_readb(iobase: chip->alt_port, |
552 | reg: ALS4K_IOB_16_ACK_FOR_CR1E); |
553 | |
554 | /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n", |
555 | pci_irqstatus, sb_irqstatus); */ |
556 | |
557 | /* only ack the things we actually handled above */ |
558 | return IRQ_RETVAL( |
559 | (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ| |
560 | ALS4K_IOB_0E_MPU_IRQ)) |
561 | || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT| |
562 | SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA)) |
563 | ); |
564 | } |
565 | |
566 | /*****************************************************************/ |
567 | |
568 | static const struct snd_pcm_hardware snd_als4000_playback = |
569 | { |
570 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
571 | SNDRV_PCM_INFO_MMAP_VALID), |
572 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | |
573 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ |
574 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
575 | .rate_min = 4000, |
576 | .rate_max = 48000, |
577 | .channels_min = 1, |
578 | .channels_max = 2, |
579 | .buffer_bytes_max = 65536, |
580 | .period_bytes_min = 64, |
581 | .period_bytes_max = 65536, |
582 | .periods_min = 1, |
583 | .periods_max = 1024, |
584 | .fifo_size = 0 |
585 | }; |
586 | |
587 | static const struct snd_pcm_hardware snd_als4000_capture = |
588 | { |
589 | .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | |
590 | SNDRV_PCM_INFO_MMAP_VALID), |
591 | .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | |
592 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ |
593 | .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, |
594 | .rate_min = 4000, |
595 | .rate_max = 48000, |
596 | .channels_min = 1, |
597 | .channels_max = 2, |
598 | .buffer_bytes_max = 65536, |
599 | .period_bytes_min = 64, |
600 | .period_bytes_max = 65536, |
601 | .periods_min = 1, |
602 | .periods_max = 1024, |
603 | .fifo_size = 0 |
604 | }; |
605 | |
606 | /*****************************************************************/ |
607 | |
608 | static int snd_als4000_playback_open(struct snd_pcm_substream *substream) |
609 | { |
610 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
611 | struct snd_pcm_runtime *runtime = substream->runtime; |
612 | |
613 | chip->playback_substream = substream; |
614 | runtime->hw = snd_als4000_playback; |
615 | return 0; |
616 | } |
617 | |
618 | static int snd_als4000_playback_close(struct snd_pcm_substream *substream) |
619 | { |
620 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
621 | |
622 | chip->playback_substream = NULL; |
623 | return 0; |
624 | } |
625 | |
626 | static int snd_als4000_capture_open(struct snd_pcm_substream *substream) |
627 | { |
628 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
629 | struct snd_pcm_runtime *runtime = substream->runtime; |
630 | |
631 | chip->capture_substream = substream; |
632 | runtime->hw = snd_als4000_capture; |
633 | return 0; |
634 | } |
635 | |
636 | static int snd_als4000_capture_close(struct snd_pcm_substream *substream) |
637 | { |
638 | struct snd_sb *chip = snd_pcm_substream_chip(substream); |
639 | |
640 | chip->capture_substream = NULL; |
641 | return 0; |
642 | } |
643 | |
644 | /******************************************************************/ |
645 | |
646 | static const struct snd_pcm_ops snd_als4000_playback_ops = { |
647 | .open = snd_als4000_playback_open, |
648 | .close = snd_als4000_playback_close, |
649 | .prepare = snd_als4000_playback_prepare, |
650 | .trigger = snd_als4000_playback_trigger, |
651 | .pointer = snd_als4000_playback_pointer |
652 | }; |
653 | |
654 | static const struct snd_pcm_ops snd_als4000_capture_ops = { |
655 | .open = snd_als4000_capture_open, |
656 | .close = snd_als4000_capture_close, |
657 | .prepare = snd_als4000_capture_prepare, |
658 | .trigger = snd_als4000_capture_trigger, |
659 | .pointer = snd_als4000_capture_pointer |
660 | }; |
661 | |
662 | static int snd_als4000_pcm(struct snd_sb *chip, int device) |
663 | { |
664 | struct snd_pcm *pcm; |
665 | int err; |
666 | |
667 | err = snd_pcm_new(card: chip->card, id: "ALS4000 DSP" , device, playback_count: 1, capture_count: 1, rpcm: &pcm); |
668 | if (err < 0) |
669 | return err; |
670 | pcm->private_data = chip; |
671 | pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; |
672 | snd_pcm_set_ops(pcm, direction: SNDRV_PCM_STREAM_PLAYBACK, ops: &snd_als4000_playback_ops); |
673 | snd_pcm_set_ops(pcm, direction: SNDRV_PCM_STREAM_CAPTURE, ops: &snd_als4000_capture_ops); |
674 | |
675 | snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
676 | data: &chip->pci->dev, size: 64*1024, max: 64*1024); |
677 | |
678 | chip->pcm = pcm; |
679 | |
680 | return 0; |
681 | } |
682 | |
683 | /******************************************************************/ |
684 | |
685 | static void snd_als4000_set_addr(unsigned long iobase, |
686 | unsigned int sb_io, |
687 | unsigned int mpu_io, |
688 | unsigned int opl_io, |
689 | unsigned int game_io) |
690 | { |
691 | u32 cfg1 = 0; |
692 | u32 cfg2 = 0; |
693 | |
694 | if (mpu_io > 0) |
695 | cfg2 |= (mpu_io | 1) << 16; |
696 | if (sb_io > 0) |
697 | cfg2 |= (sb_io | 1); |
698 | if (game_io > 0) |
699 | cfg1 |= (game_io | 1) << 16; |
700 | if (opl_io > 0) |
701 | cfg1 |= (opl_io | 1); |
702 | snd_als4k_gcr_write_addr(iobase, reg: ALS4K_GCRA8_LEGACY_CFG1, val: cfg1); |
703 | snd_als4k_gcr_write_addr(iobase, reg: ALS4K_GCRA9_LEGACY_CFG2, val: cfg2); |
704 | } |
705 | |
706 | static void snd_als4000_configure(struct snd_sb *chip) |
707 | { |
708 | u8 tmp; |
709 | int i; |
710 | |
711 | /* do some more configuration */ |
712 | spin_lock_irq(lock: &chip->mixer_lock); |
713 | tmp = snd_als4_cr_read(chip, reg: ALS4K_CR0_SB_CONFIG); |
714 | snd_als4_cr_write(chip, reg: ALS4K_CR0_SB_CONFIG, |
715 | data: tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); |
716 | /* always select DMA channel 0, since we do not actually use DMA |
717 | * SPECS_PAGE: 19/20 */ |
718 | snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0); |
719 | snd_als4_cr_write(chip, reg: ALS4K_CR0_SB_CONFIG, |
720 | data: tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); |
721 | spin_unlock_irq(lock: &chip->mixer_lock); |
722 | |
723 | spin_lock_irq(lock: &chip->reg_lock); |
724 | /* enable interrupts */ |
725 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCR8C_MISC_CTRL, |
726 | val: ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE); |
727 | |
728 | /* SPECS_PAGE: 39 */ |
729 | for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i) |
730 | snd_als4k_gcr_write(sb: chip, reg: i, val: 0); |
731 | /* enable burst mode to prevent dropouts during high PCI bus usage */ |
732 | snd_als4k_gcr_write(sb: chip, reg: ALS4K_GCR99_DMA_EMULATION_CTRL, |
733 | val: (snd_als4k_gcr_read(sb: chip, reg: ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04); |
734 | spin_unlock_irq(lock: &chip->reg_lock); |
735 | } |
736 | |
737 | #ifdef SUPPORT_JOYSTICK |
738 | static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) |
739 | { |
740 | struct gameport *gp; |
741 | struct resource *r; |
742 | int io_port; |
743 | |
744 | if (joystick_port[dev] == 0) |
745 | return -ENODEV; |
746 | |
747 | if (joystick_port[dev] == 1) { /* auto-detect */ |
748 | for (io_port = 0x200; io_port <= 0x218; io_port += 8) { |
749 | r = devm_request_region(&acard->pci->dev, io_port, 8, |
750 | "ALS4000 gameport" ); |
751 | if (r) |
752 | break; |
753 | } |
754 | } else { |
755 | io_port = joystick_port[dev]; |
756 | r = devm_request_region(&acard->pci->dev, io_port, 8, |
757 | "ALS4000 gameport" ); |
758 | } |
759 | |
760 | if (!r) { |
761 | dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n" ); |
762 | return -EBUSY; |
763 | } |
764 | |
765 | acard->gameport = gp = gameport_allocate_port(); |
766 | if (!gp) { |
767 | dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n" ); |
768 | return -ENOMEM; |
769 | } |
770 | |
771 | gameport_set_name(gameport: gp, name: "ALS4000 Gameport" ); |
772 | gameport_set_phys(gameport: gp, fmt: "pci%s/gameport0" , pci_name(pdev: acard->pci)); |
773 | gameport_set_dev_parent(gp, &acard->pci->dev); |
774 | gp->io = io_port; |
775 | |
776 | /* Enable legacy joystick port */ |
777 | snd_als4000_set_addr(iobase: acard->iobase, sb_io: 0, mpu_io: 0, opl_io: 0, game_io: 1); |
778 | |
779 | gameport_register_port(acard->gameport); |
780 | |
781 | return 0; |
782 | } |
783 | |
784 | static void snd_als4000_free_gameport(struct snd_card_als4000 *acard) |
785 | { |
786 | if (acard->gameport) { |
787 | gameport_unregister_port(gameport: acard->gameport); |
788 | acard->gameport = NULL; |
789 | |
790 | /* disable joystick */ |
791 | snd_als4000_set_addr(iobase: acard->iobase, sb_io: 0, mpu_io: 0, opl_io: 0, game_io: 0); |
792 | } |
793 | } |
794 | #else |
795 | static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; } |
796 | static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { } |
797 | #endif |
798 | |
799 | static void snd_card_als4000_free( struct snd_card *card ) |
800 | { |
801 | struct snd_card_als4000 *acard = card->private_data; |
802 | |
803 | /* make sure that interrupts are disabled */ |
804 | snd_als4k_gcr_write_addr(iobase: acard->iobase, reg: ALS4K_GCR8C_MISC_CTRL, val: 0); |
805 | /* free resources */ |
806 | snd_als4000_free_gameport(acard); |
807 | } |
808 | |
809 | static int __snd_card_als4000_probe(struct pci_dev *pci, |
810 | const struct pci_device_id *pci_id) |
811 | { |
812 | static int dev; |
813 | struct snd_card *card; |
814 | struct snd_card_als4000 *acard; |
815 | unsigned long iobase; |
816 | struct snd_sb *chip; |
817 | struct snd_opl3 *opl3; |
818 | unsigned short word; |
819 | int err; |
820 | |
821 | if (dev >= SNDRV_CARDS) |
822 | return -ENODEV; |
823 | if (!enable[dev]) { |
824 | dev++; |
825 | return -ENOENT; |
826 | } |
827 | |
828 | /* enable PCI device */ |
829 | err = pcim_enable_device(pdev: pci); |
830 | if (err < 0) |
831 | return err; |
832 | |
833 | /* check, if we can restrict PCI DMA transfers to 24 bits */ |
834 | if (dma_set_mask_and_coherent(dev: &pci->dev, DMA_BIT_MASK(24))) { |
835 | dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n" ); |
836 | return -ENXIO; |
837 | } |
838 | |
839 | err = pci_request_regions(pci, "ALS4000" ); |
840 | if (err < 0) |
841 | return err; |
842 | iobase = pci_resource_start(pci, 0); |
843 | |
844 | pci_read_config_word(dev: pci, PCI_COMMAND, val: &word); |
845 | pci_write_config_word(dev: pci, PCI_COMMAND, val: word | PCI_COMMAND_IO); |
846 | pci_set_master(dev: pci); |
847 | |
848 | err = snd_devm_card_new(parent: &pci->dev, idx: index[dev], xid: id[dev], THIS_MODULE, |
849 | extra_size: sizeof(*acard) /* private_data: acard */, |
850 | card_ret: &card); |
851 | if (err < 0) |
852 | return err; |
853 | |
854 | acard = card->private_data; |
855 | acard->pci = pci; |
856 | acard->iobase = iobase; |
857 | card->private_free = snd_card_als4000_free; |
858 | |
859 | /* disable all legacy ISA stuff */ |
860 | snd_als4000_set_addr(iobase: acard->iobase, sb_io: 0, mpu_io: 0, opl_io: 0, game_io: 0); |
861 | |
862 | err = snd_sbdsp_create(card, |
863 | port: iobase + ALS4K_IOB_10_ADLIB_ADDR0, |
864 | irq: pci->irq, |
865 | /* internally registered as IRQF_SHARED in case of ALS4000 SB */ |
866 | irq_handler: snd_als4000_interrupt, |
867 | dma8: -1, |
868 | dma16: -1, |
869 | hardware: SB_HW_ALS4000, |
870 | r_chip: &chip); |
871 | if (err < 0) |
872 | return err; |
873 | acard->chip = chip; |
874 | |
875 | chip->pci = pci; |
876 | chip->alt_port = iobase; |
877 | |
878 | snd_als4000_configure(chip); |
879 | |
880 | strcpy(p: card->driver, q: "ALS4000" ); |
881 | strcpy(p: card->shortname, q: "Avance Logic ALS4000" ); |
882 | sprintf(buf: card->longname, fmt: "%s at 0x%lx, irq %i" , |
883 | card->shortname, chip->alt_port, chip->irq); |
884 | |
885 | err = snd_mpu401_uart_new(card, device: 0, MPU401_HW_ALS4000, |
886 | port: iobase + ALS4K_IOB_30_MIDI_DATA, |
887 | MPU401_INFO_INTEGRATED | |
888 | MPU401_INFO_IRQ_HOOK, |
889 | irq: -1, rrawmidi: &chip->rmidi); |
890 | if (err < 0) { |
891 | dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n" , |
892 | iobase + ALS4K_IOB_30_MIDI_DATA); |
893 | return err; |
894 | } |
895 | /* FIXME: ALS4000 has interesting MPU401 configuration features |
896 | * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL |
897 | * (pass-thru / UART switching, fast MIDI clock, etc.), |
898 | * however there doesn't seem to be an ALSA API for this... |
899 | * SPECS_PAGE: 21 */ |
900 | |
901 | err = snd_als4000_pcm(chip, device: 0); |
902 | if (err < 0) |
903 | return err; |
904 | |
905 | err = snd_sbmixer_new(chip); |
906 | if (err < 0) |
907 | return err; |
908 | |
909 | if (snd_opl3_create(card, |
910 | l_port: iobase + ALS4K_IOB_10_ADLIB_ADDR0, |
911 | r_port: iobase + ALS4K_IOB_12_ADLIB_ADDR2, |
912 | OPL3_HW_AUTO, integrated: 1, opl3: &opl3) < 0) { |
913 | dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n" , |
914 | iobase + ALS4K_IOB_10_ADLIB_ADDR0, |
915 | iobase + ALS4K_IOB_12_ADLIB_ADDR2); |
916 | } else { |
917 | err = snd_opl3_hwdep_new(opl3, device: 0, seq_device: 1, NULL); |
918 | if (err < 0) |
919 | return err; |
920 | } |
921 | |
922 | snd_als4000_create_gameport(acard, dev); |
923 | |
924 | err = snd_card_register(card); |
925 | if (err < 0) |
926 | return err; |
927 | |
928 | pci_set_drvdata(pdev: pci, data: card); |
929 | dev++; |
930 | return 0; |
931 | } |
932 | |
933 | static int snd_card_als4000_probe(struct pci_dev *pci, |
934 | const struct pci_device_id *pci_id) |
935 | { |
936 | return snd_card_free_on_error(dev: &pci->dev, ret: __snd_card_als4000_probe(pci, pci_id)); |
937 | } |
938 | |
939 | #ifdef CONFIG_PM_SLEEP |
940 | static int snd_als4000_suspend(struct device *dev) |
941 | { |
942 | struct snd_card *card = dev_get_drvdata(dev); |
943 | struct snd_card_als4000 *acard = card->private_data; |
944 | struct snd_sb *chip = acard->chip; |
945 | |
946 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
947 | |
948 | snd_sbmixer_suspend(chip); |
949 | return 0; |
950 | } |
951 | |
952 | static int snd_als4000_resume(struct device *dev) |
953 | { |
954 | struct snd_card *card = dev_get_drvdata(dev); |
955 | struct snd_card_als4000 *acard = card->private_data; |
956 | struct snd_sb *chip = acard->chip; |
957 | |
958 | snd_als4000_configure(chip); |
959 | snd_sbdsp_reset(chip); |
960 | snd_sbmixer_resume(chip); |
961 | |
962 | #ifdef SUPPORT_JOYSTICK |
963 | if (acard->gameport) |
964 | snd_als4000_set_addr(iobase: acard->iobase, sb_io: 0, mpu_io: 0, opl_io: 0, game_io: 1); |
965 | #endif |
966 | |
967 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
968 | return 0; |
969 | } |
970 | |
971 | static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume); |
972 | #define SND_ALS4000_PM_OPS &snd_als4000_pm |
973 | #else |
974 | #define SND_ALS4000_PM_OPS NULL |
975 | #endif /* CONFIG_PM_SLEEP */ |
976 | |
977 | static struct pci_driver als4000_driver = { |
978 | .name = KBUILD_MODNAME, |
979 | .id_table = snd_als4000_ids, |
980 | .probe = snd_card_als4000_probe, |
981 | .driver = { |
982 | .pm = SND_ALS4000_PM_OPS, |
983 | }, |
984 | }; |
985 | |
986 | module_pci_driver(als4000_driver); |
987 | |