1//===-- BuiltinsHexagon.def - Hexagon Builtin function database --*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the Hexagon-specific builtin function database. Users of
10// this file must define the BUILTIN macro to make use of this information.
11//
12//===----------------------------------------------------------------------===//
13
14// The format of this database matches clang/Basic/Builtins.def.
15
16#if defined(BUILTIN) && !defined(TARGET_BUILTIN)
17# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
18#endif
19
20#pragma push_macro("V68")
21#define V68 "v68"
22#pragma push_macro("V67")
23#define V67 "v67|" V68
24#pragma push_macro("V66")
25#define V66 "v66|" V67
26#pragma push_macro("V65")
27#define V65 "v65|" V66
28#pragma push_macro("V62")
29#define V62 "v62|" V65
30#pragma push_macro("V60")
31#define V60 "v60|" V62
32#pragma push_macro("V55")
33#define V55 "v55|" V60
34#pragma push_macro("V5")
35#define V5 "v5|" V55
36
37#pragma push_macro("HVXV68")
38#define HVXV68 "hvxv68"
39#pragma push_macro("HVXV67")
40#define HVXV67 "hvxv67|" HVXV68
41#pragma push_macro("HVXV66")
42#define HVXV66 "hvxv66|" HVXV67
43#pragma push_macro("HVXV65")
44#define HVXV65 "hvxv65|" HVXV66
45#pragma push_macro("HVXV62")
46#define HVXV62 "hvxv62|" HVXV65
47#pragma push_macro("HVXV60")
48#define HVXV60 "hvxv60|" HVXV62
49
50
51// The builtins below are not autogenerated from iset.py.
52// Make sure you do not overwrite these.
53TARGET_BUILTIN(__builtin_SI_to_SXTHI_asrh, "ii", "", V5)
54TARGET_BUILTIN(__builtin_brev_ldd, "v*LLi*CLLi*iC", "", V5)
55TARGET_BUILTIN(__builtin_brev_ldw, "v*i*Ci*iC", "", V5)
56TARGET_BUILTIN(__builtin_brev_ldh, "v*s*Cs*iC", "", V5)
57TARGET_BUILTIN(__builtin_brev_lduh, "v*Us*CUs*iC", "", V5)
58TARGET_BUILTIN(__builtin_brev_ldb, "v*Sc*CSc*iC", "", V5)
59TARGET_BUILTIN(__builtin_brev_ldub, "v*Uc*CUc*iC", "", V5)
60TARGET_BUILTIN(__builtin_circ_ldd, "LLi*LLi*LLi*iIi", "", V5)
61TARGET_BUILTIN(__builtin_circ_ldw, "i*i*i*iIi", "", V5)
62TARGET_BUILTIN(__builtin_circ_ldh, "s*s*s*iIi", "", V5)
63TARGET_BUILTIN(__builtin_circ_lduh, "Us*Us*Us*iIi", "", V5)
64TARGET_BUILTIN(__builtin_circ_ldb, "c*c*c*iIi", "", V5)
65TARGET_BUILTIN(__builtin_circ_ldub, "Uc*Uc*Uc*iIi", "", V5)
66TARGET_BUILTIN(__builtin_brev_std, "LLi*CLLi*LLiiC", "", V5)
67TARGET_BUILTIN(__builtin_brev_stw, "i*Ci*iiC", "", V5)
68TARGET_BUILTIN(__builtin_brev_sth, "s*Cs*iiC", "", V5)
69TARGET_BUILTIN(__builtin_brev_sthhi, "s*Cs*iiC", "", V5)
70TARGET_BUILTIN(__builtin_brev_stb, "c*Cc*iiC", "", V5)
71TARGET_BUILTIN(__builtin_circ_std, "LLi*LLi*LLiiIi", "", V5)
72TARGET_BUILTIN(__builtin_circ_stw, "i*i*iiIi", "", V5)
73TARGET_BUILTIN(__builtin_circ_sth, "s*s*iiIi", "", V5)
74TARGET_BUILTIN(__builtin_circ_sthhi, "s*s*iiIi", "", V5)
75TARGET_BUILTIN(__builtin_circ_stb, "c*c*iiIi", "", V5)
76TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pci, "iv*IiivC*", "", V5)
77TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pci, "iv*IiivC*", "", V5)
78TARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pci, "iv*IiivC*", "", V5)
79TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pci, "iv*IiivC*", "", V5)
80TARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pci, "iv*IiivC*", "", V5)
81TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pci, "LLiv*IiivC*", "", V5)
82TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrub_pcr, "iv*ivC*", "", V5)
83TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrb_pcr, "iv*ivC*", "", V5)
84TARGET_BUILTIN(__builtin_HEXAGON_L2_loadruh_pcr, "iv*ivC*", "", V5)
85TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrh_pcr, "iv*ivC*", "", V5)
86TARGET_BUILTIN(__builtin_HEXAGON_L2_loadri_pcr, "iv*ivC*", "", V5)
87TARGET_BUILTIN(__builtin_HEXAGON_L2_loadrd_pcr, "LLiv*ivC*", "", V5)
88
89TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pci, "vv*IiiivC*", "", V5)
90TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pci, "vv*IiiivC*", "", V5)
91TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pci, "vv*IiiivC*", "", V5)
92TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pci, "vv*IiiivC*", "", V5)
93TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pci, "vv*IiiLLivC*", "", V5)
94TARGET_BUILTIN(__builtin_HEXAGON_S2_storerb_pcr, "vv*iivC*", "", V5)
95TARGET_BUILTIN(__builtin_HEXAGON_S2_storerh_pcr, "vv*iivC*", "", V5)
96TARGET_BUILTIN(__builtin_HEXAGON_S2_storerf_pcr, "vv*iivC*", "", V5)
97TARGET_BUILTIN(__builtin_HEXAGON_S2_storeri_pcr, "vv*iivC*", "", V5)
98TARGET_BUILTIN(__builtin_HEXAGON_S2_storerd_pcr, "vv*iLLivC*", "", V5)
99
100TARGET_BUILTIN(__builtin_HEXAGON_prefetch,"vv*","", V5)
101TARGET_BUILTIN(__builtin_HEXAGON_A6_vminub_RdP,"LLiLLiLLi","", V62)
102
103TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq,"vV64bv*V16i","", HVXV60)
104TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq,"vV64bv*V16i","", HVXV60)
105TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq,"vV64bv*V16i","", HVXV60)
106TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq,"vV64bv*V16i","", HVXV60)
107TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstoreq_128B,"vV128bv*V32i","", HVXV60)
108TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorenq_128B,"vV128bv*V32i","", HVXV60)
109TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentq_128B,"vV128bv*V32i","", HVXV60)
110TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaskedstorentnq_128B,"vV128bv*V32i","", HVXV60)
111
112
113// These are only valid on v65
114TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt,"V32iV16iLLi","", "hvxv65")
115TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_128B,"V64iV32iLLi","", "hvxv65")
116TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65")
117TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65")
118TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt,"V32iV16iLLi","", "hvxv65")
119TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_128B,"V64iV32iLLi","", "hvxv65")
120TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc,"V32iV32iV16iLLi","", "hvxv65")
121TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_rtt_acc_128B,"V64iV64iV32iLLi","", "hvxv65")
122
123#include "clang/Basic/BuiltinsHexagonDep.def"
124
125#pragma pop_macro("HVXV60")
126#pragma pop_macro("HVXV62")
127#pragma pop_macro("HVXV65")
128#pragma pop_macro("HVXV66")
129#pragma pop_macro("HVXV67")
130#pragma pop_macro("HVXV68")
131
132#pragma pop_macro("V5")
133#pragma pop_macro("V55")
134#pragma pop_macro("V60")
135#pragma pop_macro("V62")
136#pragma pop_macro("V65")
137#pragma pop_macro("V66")
138#pragma pop_macro("V67")
139#pragma pop_macro("V68")
140
141#undef BUILTIN
142#undef TARGET_BUILTIN
143
144