1//===--- BuiltinsPPC.def - PowerPC Builtin function database ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the PowerPC-specific builtin function database. Users of
10// this file must define the BUILTIN macro or the CUSTOM_BUILTIN macro to
11// make use of this information. The latter is used for builtins requiring
12// custom code generation and checking.
13//
14//===----------------------------------------------------------------------===//
15
16// FIXME: this needs to be the full list supported by GCC. Right now, I'm just
17// adding stuff on demand.
18
19// The format of this database matches clang/Basic/Builtins.def except for the
20// MMA builtins that are using their own format documented below.
21
22#if defined(BUILTIN) && !defined(CUSTOM_BUILTIN)
23# define CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE) BUILTIN(__builtin_##ID, "i.", "t")
24#elif defined(CUSTOM_BUILTIN) && !defined(BUILTIN)
25# define BUILTIN(ID, TYPES, ATTRS)
26#endif
27
28BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
29
30// This is just a placeholder, the types and attributes are wrong.
31BUILTIN(__builtin_altivec_vaddcuw, "V4UiV4UiV4Ui", "")
32
33BUILTIN(__builtin_altivec_vaddsbs, "V16ScV16ScV16Sc", "")
34BUILTIN(__builtin_altivec_vaddubs, "V16UcV16UcV16Uc", "")
35BUILTIN(__builtin_altivec_vaddshs, "V8SsV8SsV8Ss", "")
36BUILTIN(__builtin_altivec_vadduhs, "V8UsV8UsV8Us", "")
37BUILTIN(__builtin_altivec_vaddsws, "V4SiV4SiV4Si", "")
38BUILTIN(__builtin_altivec_vadduws, "V4UiV4UiV4Ui", "")
39BUILTIN(__builtin_altivec_vaddeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","")
40BUILTIN(__builtin_altivec_vaddcuq, "V1ULLLiV1ULLLiV1ULLLi","")
41BUILTIN(__builtin_altivec_vaddecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","")
42BUILTIN(__builtin_altivec_vadduqm, "V1ULLLiV16UcV16Uc","")
43
44BUILTIN(__builtin_altivec_vsubsbs, "V16ScV16ScV16Sc", "")
45BUILTIN(__builtin_altivec_vsububs, "V16UcV16UcV16Uc", "")
46BUILTIN(__builtin_altivec_vsubshs, "V8SsV8SsV8Ss", "")
47BUILTIN(__builtin_altivec_vsubuhs, "V8UsV8UsV8Us", "")
48BUILTIN(__builtin_altivec_vsubsws, "V4SiV4SiV4Si", "")
49BUILTIN(__builtin_altivec_vsubuws, "V4UiV4UiV4Ui", "")
50BUILTIN(__builtin_altivec_vsubeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","")
51BUILTIN(__builtin_altivec_vsubcuq, "V1ULLLiV1ULLLiV1ULLLi","")
52BUILTIN(__builtin_altivec_vsubecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","")
53BUILTIN(__builtin_altivec_vsubuqm, "V1ULLLiV16UcV16Uc","")
54
55BUILTIN(__builtin_altivec_vavgsb, "V16ScV16ScV16Sc", "")
56BUILTIN(__builtin_altivec_vavgub, "V16UcV16UcV16Uc", "")
57BUILTIN(__builtin_altivec_vavgsh, "V8SsV8SsV8Ss", "")
58BUILTIN(__builtin_altivec_vavguh, "V8UsV8UsV8Us", "")
59BUILTIN(__builtin_altivec_vavgsw, "V4SiV4SiV4Si", "")
60BUILTIN(__builtin_altivec_vavguw, "V4UiV4UiV4Ui", "")
61
62BUILTIN(__builtin_altivec_vrfip, "V4fV4f", "")
63
64BUILTIN(__builtin_altivec_vcfsx, "V4fV4SiIi", "")
65BUILTIN(__builtin_altivec_vcfux, "V4fV4UiIi", "")
66BUILTIN(__builtin_altivec_vctsxs, "V4SiV4fIi", "")
67BUILTIN(__builtin_altivec_vctuxs, "V4UiV4fIi", "")
68
69BUILTIN(__builtin_altivec_dss, "vUIi", "")
70BUILTIN(__builtin_altivec_dssall, "v", "")
71BUILTIN(__builtin_altivec_dst, "vvC*iUIi", "")
72BUILTIN(__builtin_altivec_dstt, "vvC*iUIi", "")
73BUILTIN(__builtin_altivec_dstst, "vvC*iUIi", "")
74BUILTIN(__builtin_altivec_dststt, "vvC*iUIi", "")
75
76BUILTIN(__builtin_altivec_vexptefp, "V4fV4f", "")
77
78BUILTIN(__builtin_altivec_vrfim, "V4fV4f", "")
79
80BUILTIN(__builtin_altivec_lvx, "V4iivC*", "")
81BUILTIN(__builtin_altivec_lvxl, "V4iivC*", "")
82BUILTIN(__builtin_altivec_lvebx, "V16civC*", "")
83BUILTIN(__builtin_altivec_lvehx, "V8sivC*", "")
84BUILTIN(__builtin_altivec_lvewx, "V4iivC*", "")
85
86BUILTIN(__builtin_altivec_vlogefp, "V4fV4f", "")
87
88BUILTIN(__builtin_altivec_lvsl, "V16cUcvC*", "")
89BUILTIN(__builtin_altivec_lvsr, "V16cUcvC*", "")
90
91BUILTIN(__builtin_altivec_vmaddfp, "V4fV4fV4fV4f", "")
92BUILTIN(__builtin_altivec_vmhaddshs, "V8sV8sV8sV8s", "")
93BUILTIN(__builtin_altivec_vmhraddshs, "V8sV8sV8sV8s", "")
94
95BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "")
96BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "")
97BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "")
98BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "")
99BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "")
100BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "")
101
102BUILTIN(__builtin_altivec_vmuleub, "V8UsV16UcV16Uc", "")
103BUILTIN(__builtin_altivec_vmulesb, "V8SsV16ScV16Sc", "")
104BUILTIN(__builtin_altivec_vmuleuh, "V4UiV8UsV8Us", "")
105BUILTIN(__builtin_altivec_vmulesh, "V4SiV8SsV8Ss", "")
106BUILTIN(__builtin_altivec_vmuleuw, "V2ULLiV4UiV4Ui", "")
107BUILTIN(__builtin_altivec_vmulesw, "V2SLLiV4SiV4Si", "")
108BUILTIN(__builtin_altivec_vmuloub, "V8UsV16UcV16Uc", "")
109BUILTIN(__builtin_altivec_vmulosb, "V8SsV16ScV16Sc", "")
110BUILTIN(__builtin_altivec_vmulouh, "V4UiV8UsV8Us", "")
111BUILTIN(__builtin_altivec_vmulosh, "V4SiV8SsV8Ss", "")
112BUILTIN(__builtin_altivec_vmulouw, "V2ULLiV4UiV4Ui", "")
113BUILTIN(__builtin_altivec_vmulosw, "V2SLLiV4SiV4Si", "")
114BUILTIN(__builtin_altivec_vmuleud, "V1ULLLiV2ULLiV2ULLi", "")
115BUILTIN(__builtin_altivec_vmulesd, "V1SLLLiV2SLLiV2SLLi", "")
116BUILTIN(__builtin_altivec_vmuloud, "V1ULLLiV2ULLiV2ULLi", "")
117BUILTIN(__builtin_altivec_vmulosd, "V1SLLLiV2SLLiV2SLLi", "")
118BUILTIN(__builtin_altivec_vmsumcud, "V1ULLLiV2ULLiV2ULLiV1ULLLi", "")
119
120BUILTIN(__builtin_altivec_vnmsubfp, "V4fV4fV4fV4f", "")
121
122BUILTIN(__builtin_altivec_vpkpx, "V8sV4UiV4Ui", "")
123BUILTIN(__builtin_altivec_vpkuhus, "V16UcV8UsV8Us", "")
124BUILTIN(__builtin_altivec_vpkshss, "V16ScV8SsV8Ss", "")
125BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "")
126BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "")
127BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "")
128BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "")
129BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "")
130BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "")
131BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "")
132BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "")
133
134BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "")
135
136BUILTIN(__builtin_altivec_stvx, "vV4iiv*", "")
137BUILTIN(__builtin_altivec_stvxl, "vV4iiv*", "")
138BUILTIN(__builtin_altivec_stvebx, "vV16civ*", "")
139BUILTIN(__builtin_altivec_stvehx, "vV8siv*", "")
140BUILTIN(__builtin_altivec_stvewx, "vV4iiv*", "")
141
142BUILTIN(__builtin_altivec_vcmpbfp, "V4iV4fV4f", "")
143
144BUILTIN(__builtin_altivec_vcmpgefp, "V4iV4fV4f", "")
145
146BUILTIN(__builtin_altivec_vcmpequb, "V16cV16cV16c", "")
147BUILTIN(__builtin_altivec_vcmpequh, "V8sV8sV8s", "")
148BUILTIN(__builtin_altivec_vcmpequw, "V4iV4iV4i", "")
149BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "")
150BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "")
151
152BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "")
153BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "")
154BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "")
155
156BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "")
157BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "")
158BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "")
159
160BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "")
161BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "")
162BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "")
163BUILTIN(__builtin_altivec_vcmpgtuh, "V8sV8UsV8Us", "")
164BUILTIN(__builtin_altivec_vcmpgtsw, "V4iV4SiV4Si", "")
165BUILTIN(__builtin_altivec_vcmpgtuw, "V4iV4UiV4Ui", "")
166BUILTIN(__builtin_altivec_vcmpgtsd, "V2LLiV2LLiV2LLi", "")
167BUILTIN(__builtin_altivec_vcmpgtud, "V2LLiV2ULLiV2ULLi", "")
168BUILTIN(__builtin_altivec_vcmpgtfp, "V4iV4fV4f", "")
169
170// P10 Vector compare builtins.
171BUILTIN(__builtin_altivec_vcmpequq, "V1LLLiV1ULLLiV1ULLLi", "")
172BUILTIN(__builtin_altivec_vcmpgtsq, "V1LLLiV1SLLLiV1SLLLi", "")
173BUILTIN(__builtin_altivec_vcmpgtuq, "V1LLLiV1ULLLiV1ULLLi", "")
174BUILTIN(__builtin_altivec_vcmpequq_p, "iiV1ULLLiV1LLLi", "")
175BUILTIN(__builtin_altivec_vcmpgtsq_p, "iiV1SLLLiV1SLLLi", "")
176BUILTIN(__builtin_altivec_vcmpgtuq_p, "iiV1ULLLiV1ULLLi", "")
177
178BUILTIN(__builtin_altivec_vmaxsb, "V16ScV16ScV16Sc", "")
179BUILTIN(__builtin_altivec_vmaxub, "V16UcV16UcV16Uc", "")
180BUILTIN(__builtin_altivec_vmaxsh, "V8SsV8SsV8Ss", "")
181BUILTIN(__builtin_altivec_vmaxuh, "V8UsV8UsV8Us", "")
182BUILTIN(__builtin_altivec_vmaxsw, "V4SiV4SiV4Si", "")
183BUILTIN(__builtin_altivec_vmaxuw, "V4UiV4UiV4Ui", "")
184BUILTIN(__builtin_altivec_vmaxsd, "V2LLiV2LLiV2LLi", "")
185BUILTIN(__builtin_altivec_vmaxud, "V2ULLiV2ULLiV2ULLi", "")
186BUILTIN(__builtin_altivec_vmaxfp, "V4fV4fV4f", "")
187
188BUILTIN(__builtin_altivec_mfvscr, "V8Us", "")
189
190BUILTIN(__builtin_altivec_vminsb, "V16ScV16ScV16Sc", "")
191BUILTIN(__builtin_altivec_vminub, "V16UcV16UcV16Uc", "")
192BUILTIN(__builtin_altivec_vminsh, "V8SsV8SsV8Ss", "")
193BUILTIN(__builtin_altivec_vminuh, "V8UsV8UsV8Us", "")
194BUILTIN(__builtin_altivec_vminsw, "V4SiV4SiV4Si", "")
195BUILTIN(__builtin_altivec_vminuw, "V4UiV4UiV4Ui", "")
196BUILTIN(__builtin_altivec_vminsd, "V2LLiV2LLiV2LLi", "")
197BUILTIN(__builtin_altivec_vminud, "V2ULLiV2ULLiV2ULLi", "")
198BUILTIN(__builtin_altivec_vminfp, "V4fV4fV4f", "")
199
200BUILTIN(__builtin_altivec_mtvscr, "vV4i", "")
201
202BUILTIN(__builtin_altivec_vrefp, "V4fV4f", "")
203
204BUILTIN(__builtin_altivec_vrlb, "V16cV16cV16Uc", "")
205BUILTIN(__builtin_altivec_vrlh, "V8sV8sV8Us", "")
206BUILTIN(__builtin_altivec_vrlw, "V4iV4iV4Ui", "")
207BUILTIN(__builtin_altivec_vrld, "V2LLiV2LLiV2ULLi", "")
208
209BUILTIN(__builtin_altivec_vsel_4si, "V4iV4iV4iV4Ui", "")
210
211BUILTIN(__builtin_altivec_vsl, "V4iV4iV4i", "")
212BUILTIN(__builtin_altivec_vslo, "V4iV4iV4i", "")
213
214BUILTIN(__builtin_altivec_vsrab, "V16cV16cV16Uc", "")
215BUILTIN(__builtin_altivec_vsrah, "V8sV8sV8Us", "")
216BUILTIN(__builtin_altivec_vsraw, "V4iV4iV4Ui", "")
217
218BUILTIN(__builtin_altivec_vsr, "V4iV4iV4i", "")
219BUILTIN(__builtin_altivec_vsro, "V4iV4iV4i", "")
220
221BUILTIN(__builtin_altivec_vrfin, "V4fV4f", "")
222
223BUILTIN(__builtin_altivec_vrsqrtefp, "V4fV4f", "")
224
225BUILTIN(__builtin_altivec_vsubcuw, "V4UiV4UiV4Ui", "")
226
227BUILTIN(__builtin_altivec_vsum4sbs, "V4SiV16ScV4Si", "")
228BUILTIN(__builtin_altivec_vsum4ubs, "V4UiV16UcV4Ui", "")
229BUILTIN(__builtin_altivec_vsum4shs, "V4SiV8SsV4Si", "")
230
231BUILTIN(__builtin_altivec_vsum2sws, "V4SiV4SiV4Si", "")
232
233BUILTIN(__builtin_altivec_vsumsws, "V4SiV4SiV4Si", "")
234
235BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "")
236
237BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "")
238BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "")
239BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "")
240BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "")
241
242BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "")
243BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "")
244BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "")
245BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "")
246
247BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "")
248
249BUILTIN(__builtin_altivec_vcmpgefp_p, "iiV4fV4f", "")
250
251BUILTIN(__builtin_altivec_vcmpequb_p, "iiV16cV16c", "")
252BUILTIN(__builtin_altivec_vcmpequh_p, "iiV8sV8s", "")
253BUILTIN(__builtin_altivec_vcmpequw_p, "iiV4iV4i", "")
254BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "")
255BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "")
256
257BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "")
258BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "")
259BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "")
260BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "")
261
262BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "")
263BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "")
264BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "")
265BUILTIN(__builtin_altivec_vcmpgtuh_p, "iiV8UsV8Us", "")
266BUILTIN(__builtin_altivec_vcmpgtsw_p, "iiV4SiV4Si", "")
267BUILTIN(__builtin_altivec_vcmpgtuw_p, "iiV4UiV4Ui", "")
268BUILTIN(__builtin_altivec_vcmpgtsd_p, "iiV2LLiV2LLi", "")
269BUILTIN(__builtin_altivec_vcmpgtud_p, "iiV2ULLiV2ULLi", "")
270BUILTIN(__builtin_altivec_vcmpgtfp_p, "iiV4fV4f", "")
271
272BUILTIN(__builtin_altivec_vgbbd, "V16UcV16Uc", "")
273BUILTIN(__builtin_altivec_vbpermq, "V2ULLiV16UcV16Uc", "")
274
275// P8 Crypto built-ins.
276BUILTIN(__builtin_altivec_crypto_vsbox, "V2ULLiV2ULLi", "")
277BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "")
278BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "")
279BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "")
280BUILTIN(__builtin_altivec_crypto_vcipher, "V2ULLiV2ULLiV2ULLi", "")
281BUILTIN(__builtin_altivec_crypto_vcipherlast, "V2ULLiV2ULLiV2ULLi", "")
282BUILTIN(__builtin_altivec_crypto_vncipher, "V2ULLiV2ULLiV2ULLi", "")
283BUILTIN(__builtin_altivec_crypto_vncipherlast, "V2ULLiV2ULLiV2ULLi", "")
284BUILTIN(__builtin_altivec_crypto_vpmsumb, "V16UcV16UcV16Uc", "")
285BUILTIN(__builtin_altivec_crypto_vpmsumh, "V8UsV8UsV8Us", "")
286BUILTIN(__builtin_altivec_crypto_vpmsumw, "V4UiV4UiV4Ui", "")
287BUILTIN(__builtin_altivec_crypto_vpmsumd, "V2ULLiV2ULLiV2ULLi", "")
288
289BUILTIN(__builtin_altivec_vclzb, "V16UcV16Uc", "")
290BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "")
291BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "")
292BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "")
293BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "")
294BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "")
295BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "")
296BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "")
297
298BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "")
299BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "")
300BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "")
301BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "")
302BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "")
303
304// Vector population count built-ins
305BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "")
306BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "")
307BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "")
308BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "")
309
310// Absolute difference built-ins
311BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "")
312BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "")
313BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "")
314
315// P9 Shift built-ins.
316BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "")
317BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "")
318
319// P9 Vector rotate built-ins
320BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "")
321BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "")
322BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "")
323BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "")
324
325// P9 Vector extend sign builtins.
326BUILTIN(__builtin_altivec_vextsb2w, "V4SiV16Sc", "")
327BUILTIN(__builtin_altivec_vextsb2d, "V2SLLiV16Sc", "")
328BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "")
329BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "")
330BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "")
331
332// P10 Vector extend sign builtins.
333BUILTIN(__builtin_altivec_vextsd2q, "V1SLLLiV2SLLi", "")
334
335// P10 Vector Extract with Mask built-ins.
336BUILTIN(__builtin_altivec_vextractbm, "UiV16Uc", "")
337BUILTIN(__builtin_altivec_vextracthm, "UiV8Us", "")
338BUILTIN(__builtin_altivec_vextractwm, "UiV4Ui", "")
339BUILTIN(__builtin_altivec_vextractdm, "UiV2ULLi", "")
340BUILTIN(__builtin_altivec_vextractqm, "UiV1ULLLi", "")
341
342// P10 Vector Divide Extended built-ins.
343BUILTIN(__builtin_altivec_vdivesw, "V4SiV4SiV4Si", "")
344BUILTIN(__builtin_altivec_vdiveuw, "V4UiV4UiV4Ui", "")
345BUILTIN(__builtin_altivec_vdivesd, "V2LLiV2LLiV2LLi", "")
346BUILTIN(__builtin_altivec_vdiveud, "V2ULLiV2ULLiV2ULLi", "")
347BUILTIN(__builtin_altivec_vdivesq, "V1SLLLiV1SLLLiV1SLLLi", "")
348BUILTIN(__builtin_altivec_vdiveuq, "V1ULLLiV1ULLLiV1ULLLi", "")
349
350// P10 Vector Multiply High built-ins.
351BUILTIN(__builtin_altivec_vmulhsw, "V4SiV4SiV4Si", "")
352BUILTIN(__builtin_altivec_vmulhuw, "V4UiV4UiV4Ui", "")
353BUILTIN(__builtin_altivec_vmulhsd, "V2LLiV2LLiV2LLi", "")
354BUILTIN(__builtin_altivec_vmulhud, "V2ULLiV2ULLiV2ULLi", "")
355
356// P10 Vector Expand with Mask built-ins.
357BUILTIN(__builtin_altivec_vexpandbm, "V16UcV16Uc", "")
358BUILTIN(__builtin_altivec_vexpandhm, "V8UsV8Us", "")
359BUILTIN(__builtin_altivec_vexpandwm, "V4UiV4Ui", "")
360BUILTIN(__builtin_altivec_vexpanddm, "V2ULLiV2ULLi", "")
361BUILTIN(__builtin_altivec_vexpandqm, "V1ULLLiV1ULLLi", "")
362
363// P10 Vector Count with Mask built-ins.
364BUILTIN(__builtin_altivec_vcntmbb, "ULLiV16UcUi", "")
365BUILTIN(__builtin_altivec_vcntmbh, "ULLiV8UsUi", "")
366BUILTIN(__builtin_altivec_vcntmbw, "ULLiV4UiUi", "")
367BUILTIN(__builtin_altivec_vcntmbd, "ULLiV2ULLiUi", "")
368
369// P10 Move to VSR with Mask built-ins.
370BUILTIN(__builtin_altivec_mtvsrbm, "V16UcULLi", "")
371BUILTIN(__builtin_altivec_mtvsrhm, "V8UsULLi", "")
372BUILTIN(__builtin_altivec_mtvsrwm, "V4UiULLi", "")
373BUILTIN(__builtin_altivec_mtvsrdm, "V2ULLiULLi", "")
374BUILTIN(__builtin_altivec_mtvsrqm, "V1ULLLiULLi", "")
375
376// P10 Vector Parallel Bits built-ins.
377BUILTIN(__builtin_altivec_vpdepd, "V2ULLiV2ULLiV2ULLi", "")
378BUILTIN(__builtin_altivec_vpextd, "V2ULLiV2ULLiV2ULLi", "")
379
380// P10 Vector String Isolate Built-ins.
381BUILTIN(__builtin_altivec_vstribr, "V16cV16c", "")
382BUILTIN(__builtin_altivec_vstribl, "V16cV16c", "")
383BUILTIN(__builtin_altivec_vstrihr, "V8sV8s", "")
384BUILTIN(__builtin_altivec_vstrihl, "V8sV8s", "")
385BUILTIN(__builtin_altivec_vstribr_p, "iiV16c", "")
386BUILTIN(__builtin_altivec_vstribl_p, "iiV16c", "")
387BUILTIN(__builtin_altivec_vstrihr_p, "iiV8s", "")
388BUILTIN(__builtin_altivec_vstrihl_p, "iiV8s", "")
389
390// P10 Vector Centrifuge built-in.
391BUILTIN(__builtin_altivec_vcfuged, "V2ULLiV2ULLiV2ULLi", "")
392
393// P10 Vector Gather Every N-th Bit built-in.
394BUILTIN(__builtin_altivec_vgnb, "ULLiV1ULLLiIi", "")
395
396// P10 Vector Clear Bytes built-ins.
397BUILTIN(__builtin_altivec_vclrlb, "V16cV16cUi", "")
398BUILTIN(__builtin_altivec_vclrrb, "V16cV16cUi", "")
399
400// P10 Vector Count Leading / Trailing Zeroes under bit Mask built-ins.
401BUILTIN(__builtin_altivec_vclzdm, "V2ULLiV2ULLiV2ULLi", "")
402BUILTIN(__builtin_altivec_vctzdm, "V2ULLiV2ULLiV2ULLi", "")
403
404// P10 Vector Shift built-ins.
405BUILTIN(__builtin_altivec_vsldbi, "V16UcV16UcV16UcIi", "")
406BUILTIN(__builtin_altivec_vsrdbi, "V16UcV16UcV16UcIi", "")
407
408// P10 Vector Insert built-ins.
409BUILTIN(__builtin_altivec_vinsblx, "V16UcV16UcUiUi", "")
410BUILTIN(__builtin_altivec_vinsbrx, "V16UcV16UcUiUi", "")
411BUILTIN(__builtin_altivec_vinshlx, "V8UsV8UsUiUi", "")
412BUILTIN(__builtin_altivec_vinshrx, "V8UsV8UsUiUi", "")
413BUILTIN(__builtin_altivec_vinswlx, "V4UiV4UiUiUi", "")
414BUILTIN(__builtin_altivec_vinswrx, "V4UiV4UiUiUi", "")
415BUILTIN(__builtin_altivec_vinsdlx, "V2ULLiV2ULLiULLiULLi", "")
416BUILTIN(__builtin_altivec_vinsdrx, "V2ULLiV2ULLiULLiULLi", "")
417BUILTIN(__builtin_altivec_vinsbvlx, "V16UcV16UcUiV16Uc", "")
418BUILTIN(__builtin_altivec_vinsbvrx, "V16UcV16UcUiV16Uc", "")
419BUILTIN(__builtin_altivec_vinshvlx, "V8UsV8UsUiV8Us", "")
420BUILTIN(__builtin_altivec_vinshvrx, "V8UsV8UsUiV8Us", "")
421BUILTIN(__builtin_altivec_vinswvlx, "V4UiV4UiUiV4Ui", "")
422BUILTIN(__builtin_altivec_vinswvrx, "V4UiV4UiUiV4Ui", "")
423BUILTIN(__builtin_altivec_vec_replace_elt, "V4UiV4UiUiIi", "t")
424BUILTIN(__builtin_altivec_vec_replace_unaligned, "V4UiV4UiUiIi", "t")
425
426// P10 Vector Extract built-ins.
427BUILTIN(__builtin_altivec_vextdubvlx, "V2ULLiV16UcV16UcUi", "")
428BUILTIN(__builtin_altivec_vextdubvrx, "V2ULLiV16UcV16UcUi", "")
429BUILTIN(__builtin_altivec_vextduhvlx, "V2ULLiV8UsV8UsUi", "")
430BUILTIN(__builtin_altivec_vextduhvrx, "V2ULLiV8UsV8UsUi", "")
431BUILTIN(__builtin_altivec_vextduwvlx, "V2ULLiV4UiV4UiUi", "")
432BUILTIN(__builtin_altivec_vextduwvrx, "V2ULLiV4UiV4UiUi", "")
433BUILTIN(__builtin_altivec_vextddvlx, "V2ULLiV2ULLiV2ULLiUi", "")
434BUILTIN(__builtin_altivec_vextddvrx, "V2ULLiV2ULLiV2ULLiUi", "")
435
436// P10 Vector rotate built-ins.
437BUILTIN(__builtin_altivec_vrlqmi, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "")
438BUILTIN(__builtin_altivec_vrlqnm, "V1ULLLiV1ULLLiV1ULLLi", "")
439
440// VSX built-ins.
441
442BUILTIN(__builtin_vsx_lxvd2x, "V2divC*", "")
443BUILTIN(__builtin_vsx_lxvw4x, "V4iivC*", "")
444BUILTIN(__builtin_vsx_lxvd2x_be, "V2dSLLivC*", "")
445BUILTIN(__builtin_vsx_lxvw4x_be, "V4iSLLivC*", "")
446
447BUILTIN(__builtin_vsx_stxvd2x, "vV2div*", "")
448BUILTIN(__builtin_vsx_stxvw4x, "vV4iiv*", "")
449BUILTIN(__builtin_vsx_stxvd2x_be, "vV2dSLLivC*", "")
450BUILTIN(__builtin_vsx_stxvw4x_be, "vV4iSLLivC*", "")
451
452BUILTIN(__builtin_vsx_lxvl, "V4ivC*ULLi", "")
453BUILTIN(__builtin_vsx_lxvll, "V4ivC*ULLi", "")
454BUILTIN(__builtin_vsx_stxvl, "vV4iv*ULLi", "")
455BUILTIN(__builtin_vsx_stxvll, "vV4iv*ULLi", "")
456
457BUILTIN(__builtin_vsx_xvmaxdp, "V2dV2dV2d", "")
458BUILTIN(__builtin_vsx_xvmaxsp, "V4fV4fV4f", "")
459BUILTIN(__builtin_vsx_xsmaxdp, "ddd", "")
460
461BUILTIN(__builtin_vsx_xvmindp, "V2dV2dV2d", "")
462BUILTIN(__builtin_vsx_xvminsp, "V4fV4fV4f", "")
463BUILTIN(__builtin_vsx_xsmindp, "ddd", "")
464
465BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "")
466BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "")
467
468BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "")
469BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "")
470
471BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "")
472BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "")
473
474BUILTIN(__builtin_vsx_xvcmpeqdp_p, "iiV2dV2d", "")
475BUILTIN(__builtin_vsx_xvcmpeqsp_p, "iiV4fV4f", "")
476
477BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "")
478BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "")
479
480BUILTIN(__builtin_vsx_xvcmpgedp_p, "iiV2dV2d", "")
481BUILTIN(__builtin_vsx_xvcmpgesp_p, "iiV4fV4f", "")
482
483BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "")
484BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "")
485
486BUILTIN(__builtin_vsx_xvcmpgtdp_p, "iiV2dV2d", "")
487BUILTIN(__builtin_vsx_xvcmpgtsp_p, "iiV4fV4f", "")
488
489BUILTIN(__builtin_vsx_xvrdpim, "V2dV2d", "")
490BUILTIN(__builtin_vsx_xvrspim, "V4fV4f", "")
491
492BUILTIN(__builtin_vsx_xvrdpi, "V2dV2d", "")
493BUILTIN(__builtin_vsx_xvrspi, "V4fV4f", "")
494
495BUILTIN(__builtin_vsx_xvrdpic, "V2dV2d", "")
496BUILTIN(__builtin_vsx_xvrspic, "V4fV4f", "")
497
498BUILTIN(__builtin_vsx_xvrdpiz, "V2dV2d", "")
499BUILTIN(__builtin_vsx_xvrspiz, "V4fV4f", "")
500
501BUILTIN(__builtin_vsx_xvmaddadp, "V2dV2dV2dV2d", "")
502BUILTIN(__builtin_vsx_xvmaddasp, "V4fV4fV4fV4f", "")
503
504BUILTIN(__builtin_vsx_xvmsubadp, "V2dV2dV2dV2d", "")
505BUILTIN(__builtin_vsx_xvmsubasp, "V4fV4fV4fV4f", "")
506
507BUILTIN(__builtin_vsx_xvmuldp, "V2dV2dV2d", "")
508BUILTIN(__builtin_vsx_xvmulsp, "V4fV4fV4f", "")
509
510BUILTIN(__builtin_vsx_xvnmaddadp, "V2dV2dV2dV2d", "")
511BUILTIN(__builtin_vsx_xvnmaddasp, "V4fV4fV4fV4f", "")
512
513BUILTIN(__builtin_vsx_xvnmsubadp, "V2dV2dV2dV2d", "")
514BUILTIN(__builtin_vsx_xvnmsubasp, "V4fV4fV4fV4f", "")
515
516BUILTIN(__builtin_vsx_xvredp, "V2dV2d", "")
517BUILTIN(__builtin_vsx_xvresp, "V4fV4f", "")
518
519BUILTIN(__builtin_vsx_xvrsqrtedp, "V2dV2d", "")
520BUILTIN(__builtin_vsx_xvrsqrtesp, "V4fV4f", "")
521
522BUILTIN(__builtin_vsx_xvsqrtdp, "V2dV2d", "")
523BUILTIN(__builtin_vsx_xvsqrtsp, "V4fV4f", "")
524
525BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "")
526
527BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "")
528BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "")
529
530BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "")
531BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "")
532
533BUILTIN(__builtin_vsx_xxgenpcvbm, "V16UcV16Uci", "")
534BUILTIN(__builtin_vsx_xxgenpcvhm, "V8UsV8Usi", "")
535BUILTIN(__builtin_vsx_xxgenpcvwm, "V4UiV4Uii", "")
536BUILTIN(__builtin_vsx_xxgenpcvdm, "V2ULLiV2ULLii", "")
537
538// vector Insert/Extract exponent/significand builtins
539BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "")
540BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "")
541BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "")
542BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "")
543BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "")
544BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "")
545
546// Conversion builtins
547BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "")
548BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "")
549BUILTIN(__builtin_vsx_xvcvspsxds, "V2SLLiV4f", "")
550BUILTIN(__builtin_vsx_xvcvspuxds, "V2ULLiV4f", "")
551BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "")
552BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "")
553BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "")
554BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "")
555BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "")
556BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "")
557
558BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "")
559BUILTIN(__builtin_vsx_xvcvhpsp, "V4fV8Us", "")
560
561BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "")
562BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "")
563
564// Vector Test Data Class builtins
565BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "")
566BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "")
567
568BUILTIN(__builtin_vsx_insertword, "V16UcV4UiV16UcIi", "")
569BUILTIN(__builtin_vsx_extractuword, "V2ULLiV16UcIi", "")
570
571BUILTIN(__builtin_vsx_xxpermdi, "v.", "t")
572BUILTIN(__builtin_vsx_xxsldwi, "v.", "t")
573
574BUILTIN(__builtin_vsx_xxeval, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "")
575
576BUILTIN(__builtin_vsx_xvtlsbb, "iV16UcUi", "")
577
578BUILTIN(__builtin_vsx_xvtdivdp, "iV2dV2d", "")
579BUILTIN(__builtin_vsx_xvtdivsp, "iV4fV4f", "")
580BUILTIN(__builtin_vsx_xvtsqrtdp, "iV2d", "")
581BUILTIN(__builtin_vsx_xvtsqrtsp, "iV4f", "")
582
583// P10 Vector Permute Extended built-in.
584BUILTIN(__builtin_vsx_xxpermx, "V16UcV16UcV16UcV16UcIi", "")
585
586// P10 Vector Blend built-ins.
587BUILTIN(__builtin_vsx_xxblendvb, "V16UcV16UcV16UcV16Uc", "")
588BUILTIN(__builtin_vsx_xxblendvh, "V8UsV8UsV8UsV8Us", "")
589BUILTIN(__builtin_vsx_xxblendvw, "V4UiV4UiV4UiV4Ui", "")
590BUILTIN(__builtin_vsx_xxblendvd, "V2ULLiV2ULLiV2ULLiV2ULLi", "")
591
592// Float 128 built-ins
593BUILTIN(__builtin_sqrtf128_round_to_odd, "LLdLLd", "")
594BUILTIN(__builtin_addf128_round_to_odd, "LLdLLdLLd", "")
595BUILTIN(__builtin_subf128_round_to_odd, "LLdLLdLLd", "")
596BUILTIN(__builtin_mulf128_round_to_odd, "LLdLLdLLd", "")
597BUILTIN(__builtin_divf128_round_to_odd, "LLdLLdLLd", "")
598BUILTIN(__builtin_fmaf128_round_to_odd, "LLdLLdLLdLLd", "")
599BUILTIN(__builtin_truncf128_round_to_odd, "dLLd", "")
600BUILTIN(__builtin_vsx_scalar_extract_expq, "ULLiLLd", "")
601BUILTIN(__builtin_vsx_scalar_insert_exp_qp, "LLdLLdULLi", "")
602
603// Fastmath by default builtins
604BUILTIN(__builtin_ppc_rsqrtf, "V4fV4f", "")
605BUILTIN(__builtin_ppc_rsqrtd, "V2dV2d", "")
606BUILTIN(__builtin_ppc_recipdivf, "V4fV4fV4f", "")
607BUILTIN(__builtin_ppc_recipdivd, "V2dV2dV2d", "")
608
609// HTM builtins
610BUILTIN(__builtin_tbegin, "UiUIi", "")
611BUILTIN(__builtin_tend, "UiUIi", "")
612
613BUILTIN(__builtin_tabort, "UiUi", "")
614BUILTIN(__builtin_tabortdc, "UiUiUiUi", "")
615BUILTIN(__builtin_tabortdci, "UiUiUii", "")
616BUILTIN(__builtin_tabortwc, "UiUiUiUi", "")
617BUILTIN(__builtin_tabortwci, "UiUiUii", "")
618
619BUILTIN(__builtin_tcheck, "Ui", "")
620BUILTIN(__builtin_treclaim, "UiUi", "")
621BUILTIN(__builtin_trechkpt, "Ui", "")
622BUILTIN(__builtin_tsr, "UiUi", "")
623
624BUILTIN(__builtin_tendall, "Ui", "")
625BUILTIN(__builtin_tresume, "Ui", "")
626BUILTIN(__builtin_tsuspend, "Ui", "")
627
628BUILTIN(__builtin_get_texasr, "LUi", "c")
629BUILTIN(__builtin_get_texasru, "LUi", "c")
630BUILTIN(__builtin_get_tfhar, "LUi", "c")
631BUILTIN(__builtin_get_tfiar, "LUi", "c")
632
633BUILTIN(__builtin_set_texasr, "vLUi", "c")
634BUILTIN(__builtin_set_texasru, "vLUi", "c")
635BUILTIN(__builtin_set_tfhar, "vLUi", "c")
636BUILTIN(__builtin_set_tfiar, "vLUi", "c")
637
638BUILTIN(__builtin_ttest, "LUi", "")
639
640// Scalar built-ins
641BUILTIN(__builtin_divwe, "SiSiSi", "")
642BUILTIN(__builtin_divweu, "UiUiUi", "")
643BUILTIN(__builtin_divde, "SLLiSLLiSLLi", "")
644BUILTIN(__builtin_divdeu, "ULLiULLiULLi", "")
645BUILTIN(__builtin_bpermd, "SLLiSLLiSLLi", "")
646BUILTIN(__builtin_pdepd, "ULLiULLiULLi", "")
647BUILTIN(__builtin_pextd, "ULLiULLiULLi", "")
648BUILTIN(__builtin_cfuged, "ULLiULLiULLi", "")
649BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "")
650BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "")
651
652// Generate random number
653BUILTIN(__builtin_darn, "LLi", "")
654BUILTIN(__builtin_darn_raw, "LLi", "")
655BUILTIN(__builtin_darn_32, "i", "")
656
657// Vector int128 (un)pack
658BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "")
659BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "")
660
661// Set the floating point rounding mode
662BUILTIN(__builtin_setrnd, "di", "")
663
664// Get content from current FPSCR
665BUILTIN(__builtin_readflm, "d", "")
666
667// Set content of FPSCR, and return its content before update
668BUILTIN(__builtin_setflm, "dd", "")
669
670// Cache built-ins
671BUILTIN(__builtin_dcbf, "vvC*", "")
672
673// Built-ins requiring custom code generation.
674// Because these built-ins rely on target-dependent types and to avoid pervasive
675// change, they are type checked manually in Sema using custom type descriptors.
676// The first argument of the CUSTOM_BUILTIN macro is the name of the built-in
677// with its prefix, the second argument specifies the type of the function
678// (result value, then each argument) as follows:
679// i -> Unsigned integer followed by the greatest possible value for that
680// argument or 0 if no constraint on the value.
681// (e.g. i15 for a 4-bits value)
682// V -> Vector type used with MMA builtins (vector unsigned char)
683// W -> PPC Vector type followed by the size of the vector type.
684// (e.g. W512 for __vector_quad)
685// any other descriptor -> Fall back to generic type descriptor decoding.
686// The 'C' suffix can be used as a suffix to specify the const type.
687// The '*' suffix can be used as a suffix to specify a pointer to a type.
688// The third argument is set to true if the builtin accumulates its result into
689// its given accumulator.
690
691CUSTOM_BUILTIN(vsx_lxvp, "W256SLLiW256C*", false)
692CUSTOM_BUILTIN(vsx_stxvp, "vW256SLLiW256C*", false)
693CUSTOM_BUILTIN(vsx_assemble_pair, "vW256*VV", false)
694CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false)
695
696CUSTOM_BUILTIN(mma_assemble_acc, "vW512*VVVV", false)
697CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false)
698CUSTOM_BUILTIN(mma_xxmtacc, "vW512*", true)
699CUSTOM_BUILTIN(mma_xxmfacc, "vW512*", true)
700CUSTOM_BUILTIN(mma_xxsetaccz, "vW512*", false)
701CUSTOM_BUILTIN(mma_xvi4ger8, "vW512*VV", false)
702CUSTOM_BUILTIN(mma_xvi8ger4, "vW512*VV", false)
703CUSTOM_BUILTIN(mma_xvi16ger2, "vW512*VV", false)
704CUSTOM_BUILTIN(mma_xvi16ger2s, "vW512*VV", false)
705CUSTOM_BUILTIN(mma_xvf16ger2, "vW512*VV", false)
706CUSTOM_BUILTIN(mma_xvf32ger, "vW512*VV", false)
707CUSTOM_BUILTIN(mma_xvf64ger, "vW512*W256V", false)
708CUSTOM_BUILTIN(mma_pmxvi4ger8, "vW512*VVi15i15i255", false)
709CUSTOM_BUILTIN(mma_pmxvi8ger4, "vW512*VVi15i15i15", false)
710CUSTOM_BUILTIN(mma_pmxvi16ger2, "vW512*VVi15i15i3", false)
711CUSTOM_BUILTIN(mma_pmxvi16ger2s, "vW512*VVi15i15i3", false)
712CUSTOM_BUILTIN(mma_pmxvf16ger2, "vW512*VVi15i15i3", false)
713CUSTOM_BUILTIN(mma_pmxvf32ger, "vW512*VVi15i15", false)
714CUSTOM_BUILTIN(mma_pmxvf64ger, "vW512*W256Vi15i3", false)
715CUSTOM_BUILTIN(mma_xvi4ger8pp, "vW512*VV", true)
716CUSTOM_BUILTIN(mma_xvi8ger4pp, "vW512*VV", true)
717CUSTOM_BUILTIN(mma_xvi8ger4spp, "vW512*VV", true)
718CUSTOM_BUILTIN(mma_xvi16ger2pp, "vW512*VV", true)
719CUSTOM_BUILTIN(mma_xvi16ger2spp, "vW512*VV", true)
720CUSTOM_BUILTIN(mma_pmxvi4ger8pp, "vW512*VVi15i15i255", true)
721CUSTOM_BUILTIN(mma_pmxvi8ger4pp, "vW512*VVi15i15i15", true)
722CUSTOM_BUILTIN(mma_pmxvi8ger4spp, "vW512*VVi15i15i15", true)
723CUSTOM_BUILTIN(mma_pmxvi16ger2pp, "vW512*VVi15i15i3", true)
724CUSTOM_BUILTIN(mma_pmxvi16ger2spp, "vW512*VVi15i15i3", true)
725CUSTOM_BUILTIN(mma_xvf16ger2pp, "vW512*VV", true)
726CUSTOM_BUILTIN(mma_xvf16ger2pn, "vW512*VV", true)
727CUSTOM_BUILTIN(mma_xvf16ger2np, "vW512*VV", true)
728CUSTOM_BUILTIN(mma_xvf16ger2nn, "vW512*VV", true)
729CUSTOM_BUILTIN(mma_pmxvf16ger2pp, "vW512*VVi15i15i3", true)
730CUSTOM_BUILTIN(mma_pmxvf16ger2pn, "vW512*VVi15i15i3", true)
731CUSTOM_BUILTIN(mma_pmxvf16ger2np, "vW512*VVi15i15i3", true)
732CUSTOM_BUILTIN(mma_pmxvf16ger2nn, "vW512*VVi15i15i3", true)
733CUSTOM_BUILTIN(mma_xvf32gerpp, "vW512*VV", true)
734CUSTOM_BUILTIN(mma_xvf32gerpn, "vW512*VV", true)
735CUSTOM_BUILTIN(mma_xvf32gernp, "vW512*VV", true)
736CUSTOM_BUILTIN(mma_xvf32gernn, "vW512*VV", true)
737CUSTOM_BUILTIN(mma_pmxvf32gerpp, "vW512*VVi15i15", true)
738CUSTOM_BUILTIN(mma_pmxvf32gerpn, "vW512*VVi15i15", true)
739CUSTOM_BUILTIN(mma_pmxvf32gernp, "vW512*VVi15i15", true)
740CUSTOM_BUILTIN(mma_pmxvf32gernn, "vW512*VVi15i15", true)
741CUSTOM_BUILTIN(mma_xvf64gerpp, "vW512*W256V", true)
742CUSTOM_BUILTIN(mma_xvf64gerpn, "vW512*W256V", true)
743CUSTOM_BUILTIN(mma_xvf64gernp, "vW512*W256V", true)
744CUSTOM_BUILTIN(mma_xvf64gernn, "vW512*W256V", true)
745CUSTOM_BUILTIN(mma_pmxvf64gerpp, "vW512*W256Vi15i3", true)
746CUSTOM_BUILTIN(mma_pmxvf64gerpn, "vW512*W256Vi15i3", true)
747CUSTOM_BUILTIN(mma_pmxvf64gernp, "vW512*W256Vi15i3", true)
748CUSTOM_BUILTIN(mma_pmxvf64gernn, "vW512*W256Vi15i3", true)
749CUSTOM_BUILTIN(mma_xvbf16ger2, "vW512*VV", false)
750CUSTOM_BUILTIN(mma_pmxvbf16ger2, "vW512*VVi15i15i3", false)
751CUSTOM_BUILTIN(mma_xvbf16ger2pp, "vW512*VV", true)
752CUSTOM_BUILTIN(mma_xvbf16ger2pn, "vW512*VV", true)
753CUSTOM_BUILTIN(mma_xvbf16ger2np, "vW512*VV", true)
754CUSTOM_BUILTIN(mma_xvbf16ger2nn, "vW512*VV", true)
755CUSTOM_BUILTIN(mma_pmxvbf16ger2pp, "vW512*VVi15i15i3", true)
756CUSTOM_BUILTIN(mma_pmxvbf16ger2pn, "vW512*VVi15i15i3", true)
757CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true)
758CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true)
759
760// FIXME: Obviously incomplete.
761
762#undef BUILTIN
763#undef CUSTOM_BUILTIN
764