1//===--- X86Target.def - X86 Feature/Processor Database ---------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the X86-specific Features and Processors, as used by
10// the X86 Targets.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef FEATURE
15#define FEATURE(ENUM)
16#endif
17
18#ifndef CPU_SPECIFIC
19#define CPU_SPECIFIC(NAME, MANGLING, FEATURES)
20#endif
21
22#ifndef CPU_SPECIFIC_ALIAS
23#define CPU_SPECIFIC_ALIAS(NEW_NAME, NAME)
24#endif
25
26// List of CPU Supports features in order. These need to remain in the order
27// required by attribute 'target' checking. Note that not all are supported/
28// prioritized by GCC, so synchronization with GCC's implementation may require
29// changing some existing values.
30FEATURE(FEATURE_CMOV)
31FEATURE(FEATURE_MMX)
32FEATURE(FEATURE_SSE)
33FEATURE(FEATURE_SSE2)
34FEATURE(FEATURE_SSE3)
35FEATURE(FEATURE_SSSE3)
36FEATURE(FEATURE_SSE4_A)
37FEATURE(FEATURE_SSE4_1)
38FEATURE(FEATURE_SSE4_2)
39FEATURE(FEATURE_POPCNT)
40FEATURE(FEATURE_AES)
41FEATURE(FEATURE_PCLMUL)
42FEATURE(FEATURE_AVX)
43FEATURE(FEATURE_BMI)
44FEATURE(FEATURE_FMA4)
45FEATURE(FEATURE_XOP)
46FEATURE(FEATURE_FMA)
47FEATURE(FEATURE_BMI2)
48FEATURE(FEATURE_AVX2)
49FEATURE(FEATURE_AVX512F)
50FEATURE(FEATURE_AVX512VL)
51FEATURE(FEATURE_AVX512BW)
52FEATURE(FEATURE_AVX512DQ)
53FEATURE(FEATURE_AVX512CD)
54FEATURE(FEATURE_AVX512ER)
55FEATURE(FEATURE_AVX512PF)
56FEATURE(FEATURE_AVX512VBMI)
57FEATURE(FEATURE_AVX512IFMA)
58FEATURE(FEATURE_AVX5124VNNIW)
59FEATURE(FEATURE_AVX5124FMAPS)
60FEATURE(FEATURE_AVX512VPOPCNTDQ)
61FEATURE(FEATURE_AVX512VBMI2)
62FEATURE(FEATURE_GFNI)
63FEATURE(FEATURE_VPCLMULQDQ)
64FEATURE(FEATURE_AVX512VNNI)
65FEATURE(FEATURE_AVX512BITALG)
66FEATURE(FEATURE_AVX512BF16)
67FEATURE(FEATURE_AVX512VP2INTERSECT)
68
69
70// FIXME: When commented out features are supported in LLVM, enable them here.
71CPU_SPECIFIC("generic", 'A', "")
72CPU_SPECIFIC("pentium", 'B', "")
73CPU_SPECIFIC("pentium_pro", 'C', "+cmov")
74CPU_SPECIFIC("pentium_mmx", 'D', "+mmx")
75CPU_SPECIFIC("pentium_ii", 'E', "+cmov,+mmx")
76CPU_SPECIFIC("pentium_iii", 'H', "+cmov,+mmx,+sse")
77CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium_iii")
78CPU_SPECIFIC("pentium_4", 'J', "+cmov,+mmx,+sse,+sse2")
79CPU_SPECIFIC("pentium_m", 'K', "+cmov,+mmx,+sse,+sse2")
80CPU_SPECIFIC("pentium_4_sse3", 'L', "+cmov,+mmx,+sse,+sse2,+sse3")
81CPU_SPECIFIC("core_2_duo_ssse3", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3")
82CPU_SPECIFIC("core_2_duo_sse4_1", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1")
83CPU_SPECIFIC("atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe")
84CPU_SPECIFIC("atom_sse4_2", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
85CPU_SPECIFIC("core_i7_sse4_2", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
86CPU_SPECIFIC("core_aes_pclmulqdq", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt")
87CPU_SPECIFIC("atom_sse4_2_movbe", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt")
88CPU_SPECIFIC("goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt")
89CPU_SPECIFIC("sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx")
90CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge")
91CPU_SPECIFIC("ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx")
92CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge")
93CPU_SPECIFIC("haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2")
94CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell")
95CPU_SPECIFIC("core_4th_gen_avx_tsx", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2")
96CPU_SPECIFIC("broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx")
97CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell")
98CPU_SPECIFIC("core_5th_gen_avx_tsx", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx")
99CPU_SPECIFIC("knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd")
100CPU_SPECIFIC_ALIAS("mic_avx512", "knl")
101CPU_SPECIFIC("skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx")
102CPU_SPECIFIC( "skylake_avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb")
103CPU_SPECIFIC("cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi")
104CPU_SPECIFIC("knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq")
105
106#undef CPU_SPECIFIC_ALIAS
107#undef CPU_SPECIFIC
108#undef PROC_64_BIT
109#undef PROC_32_BIT
110#undef FEATURE
111