1//===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file exposes a function named BuildMI, which is useful for dramatically
10// simplifying how MachineInstr's are created. It allows use of code like this:
11//
12// M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
13// .addReg(argVal1)
14// .addReg(argVal2);
15//
16//===----------------------------------------------------------------------===//
17
18#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20
21#include "llvm/ADT/ArrayRef.h"
22#include "llvm/CodeGen/GlobalISel/Utils.h"
23#include "llvm/CodeGen/MachineBasicBlock.h"
24#include "llvm/CodeGen/MachineFunction.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/MachineInstrBundle.h"
27#include "llvm/CodeGen/MachineOperand.h"
28#include "llvm/CodeGen/TargetRegisterInfo.h"
29#include "llvm/IR/InstrTypes.h"
30#include "llvm/IR/Intrinsics.h"
31#include "llvm/Support/ErrorHandling.h"
32#include <cassert>
33#include <cstdint>
34
35namespace llvm {
36
37class MCInstrDesc;
38class MDNode;
39
40namespace RegState {
41
42enum {
43 /// Register definition.
44 Define = 0x2,
45 /// Not emitted register (e.g. carry, or temporary result).
46 Implicit = 0x4,
47 /// The last use of a register.
48 Kill = 0x8,
49 /// Unused definition.
50 Dead = 0x10,
51 /// Value of the register doesn't matter.
52 Undef = 0x20,
53 /// Register definition happens before uses.
54 EarlyClobber = 0x40,
55 /// Register 'use' is for debugging purpose.
56 Debug = 0x80,
57 /// Register reads a value that is defined inside the same instruction or
58 /// bundle.
59 InternalRead = 0x100,
60 /// Register that may be renamed.
61 Renamable = 0x200,
62 DefineNoRead = Define | Undef,
63 ImplicitDefine = Implicit | Define,
64 ImplicitKill = Implicit | Kill
65};
66
67} // end namespace RegState
68
69class MachineInstrBuilder {
70 MachineFunction *MF = nullptr;
71 MachineInstr *MI = nullptr;
72
73public:
74 MachineInstrBuilder() = default;
75
76 /// Create a MachineInstrBuilder for manipulating an existing instruction.
77 /// F must be the machine function that was used to allocate I.
78 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
79 MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
80 : MF(&F), MI(&*I) {}
81
82 /// Allow automatic conversion to the machine instruction we are working on.
83 operator MachineInstr*() const { return MI; }
84 MachineInstr *operator->() const { return MI; }
85 operator MachineBasicBlock::iterator() const { return MI; }
86
87 /// If conversion operators fail, use this method to get the MachineInstr
88 /// explicitly.
89 MachineInstr *getInstr() const { return MI; }
90
91 /// Get the register for the operand index.
92 /// The operand at the index should be a register (asserted by
93 /// MachineOperand).
94 Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
95
96 /// Add a new virtual register operand.
97 const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
98 unsigned SubReg = 0) const {
99 assert((flags & 0x1) == 0 &&
100 "Passing in 'true' to addReg is forbidden! Use enums instead.");
101 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
102 flags & RegState::Define,
103 flags & RegState::Implicit,
104 flags & RegState::Kill,
105 flags & RegState::Dead,
106 flags & RegState::Undef,
107 flags & RegState::EarlyClobber,
108 SubReg,
109 flags & RegState::Debug,
110 flags & RegState::InternalRead,
111 flags & RegState::Renamable));
112 return *this;
113 }
114
115 /// Add a virtual register definition operand.
116 const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
117 unsigned SubReg = 0) const {
118 return addReg(RegNo, Flags | RegState::Define, SubReg);
119 }
120
121 /// Add a virtual register use operand. It is an error for Flags to contain
122 /// `RegState::Define` when calling this function.
123 const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
124 unsigned SubReg = 0) const {
125 assert(!(Flags & RegState::Define) &&
126 "Misleading addUse defines register, use addReg instead.");
127 return addReg(RegNo, Flags, SubReg);
128 }
129
130 /// Add a new immediate operand.
131 const MachineInstrBuilder &addImm(int64_t Val) const {
132 MI->addOperand(*MF, MachineOperand::CreateImm(Val));
133 return *this;
134 }
135
136 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
137 MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
138 return *this;
139 }
140
141 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
142 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
143 return *this;
144 }
145
146 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
147 unsigned TargetFlags = 0) const {
148 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
149 return *this;
150 }
151
152 const MachineInstrBuilder &addFrameIndex(int Idx) const {
153 MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
154 return *this;
155 }
156
157 const MachineInstrBuilder &
158 addConstantPoolIndex(unsigned Idx, int Offset = 0,
159 unsigned TargetFlags = 0) const {
160 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
161 return *this;
162 }
163
164 const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
165 unsigned TargetFlags = 0) const {
166 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
167 TargetFlags));
168 return *this;
169 }
170
171 const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
172 unsigned TargetFlags = 0) const {
173 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
174 return *this;
175 }
176
177 const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
178 int64_t Offset = 0,
179 unsigned TargetFlags = 0) const {
180 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
181 return *this;
182 }
183
184 const MachineInstrBuilder &addExternalSymbol(const char *FnName,
185 unsigned TargetFlags = 0) const {
186 MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
187 return *this;
188 }
189
190 const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
191 int64_t Offset = 0,
192 unsigned TargetFlags = 0) const {
193 MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
194 return *this;
195 }
196
197 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
198 MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
199 return *this;
200 }
201
202 const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
203 MI->addMemOperand(*MF, MMO);
204 return *this;
205 }
206
207 const MachineInstrBuilder &
208 setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const {
209 MI->setMemRefs(*MF, MMOs);
210 return *this;
211 }
212
213 const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
214 MI->cloneMemRefs(*MF, OtherMI);
215 return *this;
216 }
217
218 const MachineInstrBuilder &
219 cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const {
220 MI->cloneMergedMemRefs(*MF, OtherMIs);
221 return *this;
222 }
223
224 const MachineInstrBuilder &add(const MachineOperand &MO) const {
225 MI->addOperand(*MF, MO);
226 return *this;
227 }
228
229 const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const {
230 for (const MachineOperand &MO : MOs) {
231 MI->addOperand(*MF, MO);
232 }
233 return *this;
234 }
235
236 const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
237 MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
238 assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
239 : true) &&
240 "first MDNode argument of a DBG_VALUE not a variable");
241 assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
242 : true) &&
243 "first MDNode argument of a DBG_LABEL not a label");
244 return *this;
245 }
246
247 const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
248 MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
249 return *this;
250 }
251
252 const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const {
253 MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
254 return *this;
255 }
256
257 const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const {
258 MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
259 return *this;
260 }
261
262 const MachineInstrBuilder &addShuffleMask(ArrayRef<int> Val) const {
263 MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
264 return *this;
265 }
266
267 const MachineInstrBuilder &addSym(MCSymbol *Sym,
268 unsigned char TargetFlags = 0) const {
269 MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
270 return *this;
271 }
272
273 const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
274 MI->setFlags(Flags);
275 return *this;
276 }
277
278 const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
279 MI->setFlag(Flag);
280 return *this;
281 }
282
283 // Add a displacement from an existing MachineOperand with an added offset.
284 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
285 unsigned char TargetFlags = 0) const {
286 // If caller specifies new TargetFlags then use it, otherwise the
287 // default behavior is to copy the target flags from the existing
288 // MachineOperand. This means if the caller wants to clear the
289 // target flags it needs to do so explicitly.
290 if (0 == TargetFlags)
291 TargetFlags = Disp.getTargetFlags();
292
293 switch (Disp.getType()) {
294 default:
295 llvm_unreachable("Unhandled operand type in addDisp()");
296 case MachineOperand::MO_Immediate:
297 return addImm(Disp.getImm() + off);
298 case MachineOperand::MO_ConstantPoolIndex:
299 return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
300 TargetFlags);
301 case MachineOperand::MO_GlobalAddress:
302 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
303 TargetFlags);
304 case MachineOperand::MO_BlockAddress:
305 return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
306 TargetFlags);
307 case MachineOperand::MO_JumpTableIndex:
308 assert(off == 0 && "cannot create offset into jump tables");
309 return addJumpTableIndex(Disp.getIndex(), TargetFlags);
310 }
311 }
312
313 /// Copy all the implicit operands from OtherMI onto this one.
314 const MachineInstrBuilder &
315 copyImplicitOps(const MachineInstr &OtherMI) const {
316 MI->copyImplicitOps(*MF, OtherMI);
317 return *this;
318 }
319
320 bool constrainAllUses(const TargetInstrInfo &TII,
321 const TargetRegisterInfo &TRI,
322 const RegisterBankInfo &RBI) const {
323 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
324 }
325};
326
327/// Builder interface. Specify how to create the initial instruction itself.
328inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
329 const MCInstrDesc &MCID) {
330 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
331}
332
333/// This version of the builder sets up the first operand as a
334/// destination virtual register.
335inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
336 const MCInstrDesc &MCID, Register DestReg) {
337 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
338 .addReg(DestReg, RegState::Define);
339}
340
341/// This version of the builder inserts the newly-built instruction before
342/// the given position in the given MachineBasicBlock, and sets up the first
343/// operand as a destination virtual register.
344inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
345 MachineBasicBlock::iterator I,
346 const DebugLoc &DL, const MCInstrDesc &MCID,
347 Register DestReg) {
348 MachineFunction &MF = *BB.getParent();
349 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
350 BB.insert(I, MI);
351 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
352}
353
354/// This version of the builder inserts the newly-built instruction before
355/// the given position in the given MachineBasicBlock, and sets up the first
356/// operand as a destination virtual register.
357///
358/// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
359/// added to the same bundle.
360inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
361 MachineBasicBlock::instr_iterator I,
362 const DebugLoc &DL, const MCInstrDesc &MCID,
363 Register DestReg) {
364 MachineFunction &MF = *BB.getParent();
365 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
366 BB.insert(I, MI);
367 return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
368}
369
370inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
371 const DebugLoc &DL, const MCInstrDesc &MCID,
372 Register DestReg) {
373 // Calling the overload for instr_iterator is always correct. However, the
374 // definition is not available in headers, so inline the check.
375 if (I.isInsideBundle())
376 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
377 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
378}
379
380inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
381 const DebugLoc &DL, const MCInstrDesc &MCID,
382 Register DestReg) {
383 return BuildMI(BB, *I, DL, MCID, DestReg);
384}
385
386/// This version of the builder inserts the newly-built instruction before the
387/// given position in the given MachineBasicBlock, and does NOT take a
388/// destination register.
389inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
390 MachineBasicBlock::iterator I,
391 const DebugLoc &DL,
392 const MCInstrDesc &MCID) {
393 MachineFunction &MF = *BB.getParent();
394 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
395 BB.insert(I, MI);
396 return MachineInstrBuilder(MF, MI);
397}
398
399inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
400 MachineBasicBlock::instr_iterator I,
401 const DebugLoc &DL,
402 const MCInstrDesc &MCID) {
403 MachineFunction &MF = *BB.getParent();
404 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
405 BB.insert(I, MI);
406 return MachineInstrBuilder(MF, MI);
407}
408
409inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
410 const DebugLoc &DL,
411 const MCInstrDesc &MCID) {
412 // Calling the overload for instr_iterator is always correct. However, the
413 // definition is not available in headers, so inline the check.
414 if (I.isInsideBundle())
415 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
416 return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
417}
418
419inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
420 const DebugLoc &DL,
421 const MCInstrDesc &MCID) {
422 return BuildMI(BB, *I, DL, MCID);
423}
424
425/// This version of the builder inserts the newly-built instruction at the end
426/// of the given MachineBasicBlock, and does NOT take a destination register.
427inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
428 const MCInstrDesc &MCID) {
429 return BuildMI(*BB, BB->end(), DL, MCID);
430}
431
432/// This version of the builder inserts the newly-built instruction at the
433/// end of the given MachineBasicBlock, and sets up the first operand as a
434/// destination virtual register.
435inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
436 const MCInstrDesc &MCID, Register DestReg) {
437 return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
438}
439
440/// This version of the builder builds a DBG_VALUE intrinsic
441/// for either a value in a register or a register-indirect
442/// address. The convention is that a DBG_VALUE is indirect iff the
443/// second operand is an immediate.
444MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
445 const MCInstrDesc &MCID, bool IsIndirect,
446 Register Reg, const MDNode *Variable,
447 const MDNode *Expr);
448
449/// This version of the builder builds a DBG_VALUE intrinsic
450/// for a MachineOperand.
451MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
452 const MCInstrDesc &MCID, bool IsIndirect,
453 const MachineOperand &MO, const MDNode *Variable,
454 const MDNode *Expr);
455
456/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
457/// for a MachineOperand.
458MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
459 const MCInstrDesc &MCID, bool IsIndirect,
460 ArrayRef<MachineOperand> MOs,
461 const MDNode *Variable, const MDNode *Expr);
462
463/// This version of the builder builds a DBG_VALUE intrinsic
464/// for either a value in a register or a register-indirect
465/// address and inserts it at position I.
466MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
467 MachineBasicBlock::iterator I, const DebugLoc &DL,
468 const MCInstrDesc &MCID, bool IsIndirect,
469 Register Reg, const MDNode *Variable,
470 const MDNode *Expr);
471
472/// This version of the builder builds a DBG_VALUE intrinsic
473/// for a machine operand and inserts it at position I.
474MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
475 MachineBasicBlock::iterator I, const DebugLoc &DL,
476 const MCInstrDesc &MCID, bool IsIndirect,
477 MachineOperand &MO, const MDNode *Variable,
478 const MDNode *Expr);
479
480/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
481/// for a machine operand and inserts it at position I.
482MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
483 MachineBasicBlock::iterator I, const DebugLoc &DL,
484 const MCInstrDesc &MCID, bool IsIndirect,
485 ArrayRef<MachineOperand> MOs,
486 const MDNode *Variable, const MDNode *Expr);
487
488/// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
489MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
490 MachineBasicBlock::iterator I,
491 const MachineInstr &Orig, int FrameIndex,
492 Register SpillReg);
493MachineInstr *
494buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I,
495 const MachineInstr &Orig, int FrameIndex,
496 SmallVectorImpl<const MachineOperand *> &SpilledOperands);
497
498/// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
499/// modifying an instruction in place while iterating over a basic block.
500void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg);
501
502inline unsigned getDefRegState(bool B) {
503 return B ? RegState::Define : 0;
504}
505inline unsigned getImplRegState(bool B) {
506 return B ? RegState::Implicit : 0;
507}
508inline unsigned getKillRegState(bool B) {
509 return B ? RegState::Kill : 0;
510}
511inline unsigned getDeadRegState(bool B) {
512 return B ? RegState::Dead : 0;
513}
514inline unsigned getUndefRegState(bool B) {
515 return B ? RegState::Undef : 0;
516}
517inline unsigned getInternalReadRegState(bool B) {
518 return B ? RegState::InternalRead : 0;
519}
520inline unsigned getDebugRegState(bool B) {
521 return B ? RegState::Debug : 0;
522}
523inline unsigned getRenamableRegState(bool B) {
524 return B ? RegState::Renamable : 0;
525}
526
527/// Get all register state flags from machine operand \p RegOp.
528inline unsigned getRegState(const MachineOperand &RegOp) {
529 assert(RegOp.isReg() && "Not a register operand");
530 return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
531 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
532 getUndefRegState(RegOp.isUndef()) |
533 getInternalReadRegState(RegOp.isInternalRead()) |
534 getDebugRegState(RegOp.isDebug()) |
535 getRenamableRegState(Register::isPhysicalRegister(RegOp.getReg()) &&
536 RegOp.isRenamable());
537}
538
539/// Helper class for constructing bundles of MachineInstrs.
540///
541/// MIBundleBuilder can create a bundle from scratch by inserting new
542/// MachineInstrs one at a time, or it can create a bundle from a sequence of
543/// existing MachineInstrs in a basic block.
544class MIBundleBuilder {
545 MachineBasicBlock &MBB;
546 MachineBasicBlock::instr_iterator Begin;
547 MachineBasicBlock::instr_iterator End;
548
549public:
550 /// Create an MIBundleBuilder that inserts instructions into a new bundle in
551 /// BB above the bundle or instruction at Pos.
552 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
553 : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
554
555 /// Create a bundle from the sequence of instructions between B and E.
556 MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B,
557 MachineBasicBlock::iterator E)
558 : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
559 assert(B != E && "No instructions to bundle");
560 ++B;
561 while (B != E) {
562 MachineInstr &MI = *B;
563 ++B;
564 MI.bundleWithPred();
565 }
566 }
567
568 /// Create an MIBundleBuilder representing an existing instruction or bundle
569 /// that has MI as its head.
570 explicit MIBundleBuilder(MachineInstr *MI)
571 : MBB(*MI->getParent()), Begin(MI),
572 End(getBundleEnd(MI->getIterator())) {}
573
574 /// Return a reference to the basic block containing this bundle.
575 MachineBasicBlock &getMBB() const { return MBB; }
576
577 /// Return true if no instructions have been inserted in this bundle yet.
578 /// Empty bundles aren't representable in a MachineBasicBlock.
579 bool empty() const { return Begin == End; }
580
581 /// Return an iterator to the first bundled instruction.
582 MachineBasicBlock::instr_iterator begin() const { return Begin; }
583
584 /// Return an iterator beyond the last bundled instruction.
585 MachineBasicBlock::instr_iterator end() const { return End; }
586
587 /// Insert MI into this bundle before I which must point to an instruction in
588 /// the bundle, or end().
589 MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
590 MachineInstr *MI) {
591 MBB.insert(I, MI);
592 if (I == Begin) {
593 if (!empty())
594 MI->bundleWithSucc();
595 Begin = MI->getIterator();
596 return *this;
597 }
598 if (I == End) {
599 MI->bundleWithPred();
600 return *this;
601 }
602 // MI was inserted in the middle of the bundle, so its neighbors' flags are
603 // already fine. Update MI's bundle flags manually.
604 MI->setFlag(MachineInstr::BundledPred);
605 MI->setFlag(MachineInstr::BundledSucc);
606 return *this;
607 }
608
609 /// Insert MI into MBB by prepending it to the instructions in the bundle.
610 /// MI will become the first instruction in the bundle.
611 MIBundleBuilder &prepend(MachineInstr *MI) {
612 return insert(begin(), MI);
613 }
614
615 /// Insert MI into MBB by appending it to the instructions in the bundle.
616 /// MI will become the last instruction in the bundle.
617 MIBundleBuilder &append(MachineInstr *MI) {
618 return insert(end(), MI);
619 }
620};
621
622} // end namespace llvm
623
624#endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
625