1//===- StackMaps.h - StackMaps ----------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_CODEGEN_STACKMAPS_H
10#define LLVM_CODEGEN_STACKMAPS_H
11
12#include "llvm/ADT/MapVector.h"
13#include "llvm/ADT/SmallVector.h"
14#include "llvm/CodeGen/MachineInstr.h"
15#include "llvm/IR/CallingConv.h"
16#include "llvm/MC/MCSymbol.h"
17#include "llvm/Support/Debug.h"
18#include <algorithm>
19#include <cassert>
20#include <cstdint>
21#include <vector>
22
23namespace llvm {
24
25class AsmPrinter;
26class MCExpr;
27class MCStreamer;
28class raw_ostream;
29class TargetRegisterInfo;
30
31/// MI-level stackmap operands.
32///
33/// MI stackmap operations take the form:
34/// <id>, <numBytes>, live args...
35class StackMapOpers {
36public:
37 /// Enumerate the meta operands.
38 enum { IDPos, NBytesPos };
39
40private:
41 const MachineInstr* MI;
42
43public:
44 explicit StackMapOpers(const MachineInstr *MI);
45
46 /// Return the ID for the given stackmap
47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); }
48
49 /// Return the number of patchable bytes the given stackmap should emit.
50 uint32_t getNumPatchBytes() const {
51 return MI->getOperand(NBytesPos).getImm();
52 }
53
54 /// Get the operand index of the variable list of non-argument operands.
55 /// These hold the "live state".
56 unsigned getVarIdx() const {
57 // Skip ID, nShadowBytes.
58 return 2;
59 }
60};
61
62/// MI-level patchpoint operands.
63///
64/// MI patchpoint operations take the form:
65/// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
66///
67/// IR patchpoint intrinsics do not have the <cc> operand because calling
68/// convention is part of the subclass data.
69///
70/// SD patchpoint nodes do not have a def operand because it is part of the
71/// SDValue.
72///
73/// Patchpoints following the anyregcc convention are handled specially. For
74/// these, the stack map also records the location of the return value and
75/// arguments.
76class PatchPointOpers {
77public:
78 /// Enumerate the meta operands.
79 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
80
81private:
82 const MachineInstr *MI;
83 bool HasDef;
84
85 unsigned getMetaIdx(unsigned Pos = 0) const {
86 assert(Pos < MetaEnd && "Meta operand index out of range.");
87 return (HasDef ? 1 : 0) + Pos;
88 }
89
90 const MachineOperand &getMetaOper(unsigned Pos) const {
91 return MI->getOperand(getMetaIdx(Pos));
92 }
93
94public:
95 explicit PatchPointOpers(const MachineInstr *MI);
96
97 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); }
98 bool hasDef() const { return HasDef; }
99
100 /// Return the ID for the given patchpoint.
101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); }
102
103 /// Return the number of patchable bytes the given patchpoint should emit.
104 uint32_t getNumPatchBytes() const {
105 return getMetaOper(NBytesPos).getImm();
106 }
107
108 /// Returns the target of the underlying call.
109 const MachineOperand &getCallTarget() const {
110 return getMetaOper(TargetPos);
111 }
112
113 /// Returns the calling convention
114 CallingConv::ID getCallingConv() const {
115 return getMetaOper(CCPos).getImm();
116 }
117
118 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
119
120 /// Return the number of call arguments
121 uint32_t getNumCallArgs() const {
122 return MI->getOperand(getMetaIdx(NArgPos)).getImm();
123 }
124
125 /// Get the operand index of the variable list of non-argument operands.
126 /// These hold the "live state".
127 unsigned getVarIdx() const {
128 return getMetaIdx() + MetaEnd + getNumCallArgs();
129 }
130
131 /// Get the index at which stack map locations will be recorded.
132 /// Arguments are not recorded unless the anyregcc convention is used.
133 unsigned getStackMapStartIdx() const {
134 if (isAnyReg())
135 return getArgIdx();
136 return getVarIdx();
137 }
138
139 /// Get the next scratch register operand index.
140 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
141};
142
143/// MI-level Statepoint operands
144///
145/// Statepoint operands take the form:
146/// <id>, <num patch bytes >, <num call arguments>, <call target>,
147/// [call arguments...],
148/// <StackMaps::ConstantOp>, <calling convention>,
149/// <StackMaps::ConstantOp>, <statepoint flags>,
150/// <StackMaps::ConstantOp>, <num deopt args>, [deopt args...],
151/// <StackMaps::ConstantOp>, <num gc pointer args>, [gc pointer args...],
152/// <StackMaps::ConstantOp>, <num gc allocas>, [gc allocas args...],
153/// <StackMaps::ConstantOp>, <num entries in gc map>, [base/derived pairs]
154/// base/derived pairs in gc map are logical indices into <gc pointer args>
155/// section.
156/// All gc pointers assigned to VRegs produce new value (in form of MI Def
157/// operand) and are tied to it.
158class StatepointOpers {
159 // TODO:: we should change the STATEPOINT representation so that CC and
160 // Flags should be part of meta operands, with args and deopt operands, and
161 // gc operands all prefixed by their length and a type code. This would be
162 // much more consistent.
163
164 // These values are absolute offsets into the operands of the statepoint
165 // instruction.
166 enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd };
167
168 // These values are relative offsets from the start of the statepoint meta
169 // arguments (i.e. the end of the call arguments).
170 enum { CCOffset = 1, FlagsOffset = 3, NumDeoptOperandsOffset = 5 };
171
172public:
173 explicit StatepointOpers(const MachineInstr *MI) : MI(MI) {
174 NumDefs = MI->getNumDefs();
175 }
176
177 /// Get index of statepoint ID operand.
178 unsigned getIDPos() const { return NumDefs + IDPos; }
179
180 /// Get index of Num Patch Bytes operand.
181 unsigned getNBytesPos() const { return NumDefs + NBytesPos; }
182
183 /// Get index of Num Call Arguments operand.
184 unsigned getNCallArgsPos() const { return NumDefs + NCallArgsPos; }
185
186 /// Get starting index of non call related arguments
187 /// (calling convention, statepoint flags, vm state and gc state).
188 unsigned getVarIdx() const {
189 return MI->getOperand(NumDefs + NCallArgsPos).getImm() + MetaEnd + NumDefs;
190 }
191
192 /// Get index of Calling Convention operand.
193 unsigned getCCIdx() const { return getVarIdx() + CCOffset; }
194
195 /// Get index of Flags operand.
196 unsigned getFlagsIdx() const { return getVarIdx() + FlagsOffset; }
197
198 /// Get index of Number Deopt Arguments operand.
199 unsigned getNumDeoptArgsIdx() const {
200 return getVarIdx() + NumDeoptOperandsOffset;
201 }
202
203 /// Return the ID for the given statepoint.
204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); }
205
206 /// Return the number of patchable bytes the given statepoint should emit.
207 uint32_t getNumPatchBytes() const {
208 return MI->getOperand(NumDefs + NBytesPos).getImm();
209 }
210
211 /// Return the target of the underlying call.
212 const MachineOperand &getCallTarget() const {
213 return MI->getOperand(NumDefs + CallTargetPos);
214 }
215
216 /// Return the calling convention.
217 CallingConv::ID getCallingConv() const {
218 return MI->getOperand(getCCIdx()).getImm();
219 }
220
221 /// Return the statepoint flags.
222 uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); }
223
224 uint64_t getNumDeoptArgs() const {
225 return MI->getOperand(getNumDeoptArgsIdx()).getImm();
226 }
227
228 /// Get index of number of gc map entries.
229 unsigned getNumGcMapEntriesIdx();
230
231 /// Get index of number of gc allocas.
232 unsigned getNumAllocaIdx();
233
234 /// Get index of number of GC pointers.
235 unsigned getNumGCPtrIdx();
236
237 /// Get index of first GC pointer operand of -1 if there are none.
238 int getFirstGCPtrIdx();
239
240 /// Get vector of base/derived pairs from statepoint.
241 /// Elements are indices into GC Pointer operand list (logical).
242 /// Returns number of elements in GCMap.
243 unsigned
244 getGCPointerMap(SmallVectorImpl<std::pair<unsigned, unsigned>> &GCMap);
245
246private:
247 const MachineInstr *MI;
248 unsigned NumDefs;
249};
250
251class StackMaps {
252public:
253 struct Location {
254 enum LocationType {
255 Unprocessed,
256 Register,
257 Direct,
258 Indirect,
259 Constant,
260 ConstantIndex
261 };
262 LocationType Type = Unprocessed;
263 unsigned Size = 0;
264 unsigned Reg = 0;
265 int64_t Offset = 0;
266
267 Location() = default;
268 Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
269 : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {}
270 };
271
272 struct LiveOutReg {
273 unsigned short Reg = 0;
274 unsigned short DwarfRegNum = 0;
275 unsigned short Size = 0;
276
277 LiveOutReg() = default;
278 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum,
279 unsigned short Size)
280 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {}
281 };
282
283 // OpTypes are used to encode information about the following logical
284 // operand (which may consist of several MachineOperands) for the
285 // OpParser.
286 using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp };
287
288 StackMaps(AsmPrinter &AP);
289
290 /// Get index of next meta operand.
291 /// Similar to parseOperand, but does not actually parses operand meaning.
292 static unsigned getNextMetaArgIdx(const MachineInstr *MI, unsigned CurIdx);
293
294 void reset() {
295 CSInfos.clear();
296 ConstPool.clear();
297 FnInfos.clear();
298 }
299
300 using LocationVec = SmallVector<Location, 8>;
301 using LiveOutVec = SmallVector<LiveOutReg, 8>;
302 using ConstantPool = MapVector<uint64_t, uint64_t>;
303
304 struct FunctionInfo {
305 uint64_t StackSize = 0;
306 uint64_t RecordCount = 1;
307
308 FunctionInfo() = default;
309 explicit FunctionInfo(uint64_t StackSize) : StackSize(StackSize) {}
310 };
311
312 struct CallsiteInfo {
313 const MCExpr *CSOffsetExpr = nullptr;
314 uint64_t ID = 0;
315 LocationVec Locations;
316 LiveOutVec LiveOuts;
317
318 CallsiteInfo() = default;
319 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
320 LocationVec &&Locations, LiveOutVec &&LiveOuts)
321 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)),
322 LiveOuts(std::move(LiveOuts)) {}
323 };
324
325 using FnInfoMap = MapVector<const MCSymbol *, FunctionInfo>;
326 using CallsiteInfoList = std::vector<CallsiteInfo>;
327
328 /// Generate a stackmap record for a stackmap instruction.
329 ///
330 /// MI must be a raw STACKMAP, not a PATCHPOINT.
331 void recordStackMap(const MCSymbol &L,
332 const MachineInstr &MI);
333
334 /// Generate a stackmap record for a patchpoint instruction.
335 void recordPatchPoint(const MCSymbol &L,
336 const MachineInstr &MI);
337
338 /// Generate a stackmap record for a statepoint instruction.
339 void recordStatepoint(const MCSymbol &L,
340 const MachineInstr &MI);
341
342 /// If there is any stack map data, create a stack map section and serialize
343 /// the map info into it. This clears the stack map data structures
344 /// afterwards.
345 void serializeToStackMapSection();
346
347 /// Get call site info.
348 CallsiteInfoList &getCSInfos() { return CSInfos; }
349
350 /// Get function info.
351 FnInfoMap &getFnInfos() { return FnInfos; }
352
353private:
354 static const char *WSMP;
355
356 AsmPrinter &AP;
357 CallsiteInfoList CSInfos;
358 ConstantPool ConstPool;
359 FnInfoMap FnInfos;
360
361 MachineInstr::const_mop_iterator
362 parseOperand(MachineInstr::const_mop_iterator MOI,
363 MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
364 LiveOutVec &LiveOuts) const;
365
366 /// Specialized parser of statepoint operands.
367 /// They do not directly correspond to StackMap record entries.
368 void parseStatepointOpers(const MachineInstr &MI,
369 MachineInstr::const_mop_iterator MOI,
370 MachineInstr::const_mop_iterator MOE,
371 LocationVec &Locations, LiveOutVec &LiveOuts);
372
373 /// Create a live-out register record for the given register @p Reg.
374 LiveOutReg createLiveOutReg(unsigned Reg,
375 const TargetRegisterInfo *TRI) const;
376
377 /// Parse the register live-out mask and return a vector of live-out
378 /// registers that need to be recorded in the stackmap.
379 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
380
381 /// Record the locations of the operands of the provided instruction in a
382 /// record keyed by the provided label. For instructions w/AnyReg calling
383 /// convention the return register is also recorded if requested. For
384 /// STACKMAP, and PATCHPOINT the label is expected to immediately *preceed*
385 /// lowering of the MI to MCInsts. For STATEPOINT, it expected to
386 /// immediately *follow*. It's not clear this difference was intentional,
387 /// but it exists today.
388 void recordStackMapOpers(const MCSymbol &L,
389 const MachineInstr &MI, uint64_t ID,
390 MachineInstr::const_mop_iterator MOI,
391 MachineInstr::const_mop_iterator MOE,
392 bool recordResult = false);
393
394 /// Emit the stackmap header.
395 void emitStackmapHeader(MCStreamer &OS);
396
397 /// Emit the function frame record for each function.
398 void emitFunctionFrameRecords(MCStreamer &OS);
399
400 /// Emit the constant pool.
401 void emitConstantPoolEntries(MCStreamer &OS);
402
403 /// Emit the callsite info for each stackmap/patchpoint intrinsic call.
404 void emitCallsiteEntries(MCStreamer &OS);
405
406 void print(raw_ostream &OS);
407 void debug() { print(dbgs()); }
408};
409
410} // end namespace llvm
411
412#endif // LLVM_CODEGEN_STACKMAPS_H
413