Warning: That file was not part of the compilation database. It may have many parsing errors.

1/* pthread_spin_lock -- lock a spin lock. Generic version.
2 Copyright (C) 2012-2019 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
18
19#include <atomic.h>
20#include "pthreadP.h"
21
22int
23pthread_spin_lock (pthread_spinlock_t *lock)
24{
25 int val = 0;
26
27 /* We assume that the first try mostly will be successful, thus we use
28 atomic_exchange if it is not implemented by a CAS loop (we also assume
29 that atomic_exchange can be faster if it succeeds, see
30 ATOMIC_EXCHANGE_USES_CAS). Otherwise, we use a weak CAS and not an
31 exchange so we bail out after the first failed attempt to change the
32 state. For the subsequent attempts we use atomic_compare_and_exchange
33 after we observe that the lock is not acquired.
34 See also comment in pthread_spin_trylock.
35 We use acquire MO to synchronize-with the release MO store in
36 pthread_spin_unlock, and thus ensure that prior critical sections
37 happen-before this critical section. */
38#if ! ATOMIC_EXCHANGE_USES_CAS
39 /* Try to acquire the lock with an exchange instruction as this architecture
40 has such an instruction and we assume it is faster than a CAS.
41 The acquisition succeeds if the lock is not in an acquired state. */
42 if (__glibc_likely (atomic_exchange_acquire (lock, 1) == 0))
43 return 0;
44#else
45 /* Try to acquire the lock with a CAS instruction as this architecture
46 has no exchange instruction. The acquisition succeeds if the lock is not
47 acquired. */
48 if (__glibc_likely (atomic_compare_exchange_weak_acquire (lock, &val, 1)))
49 return 0;
50#endif
51
52 do
53 {
54 /* The lock is contended and we need to wait. Going straight back
55 to cmpxchg is not a good idea on many targets as that will force
56 expensive memory synchronizations among processors and penalize other
57 running threads.
58 There is no technical reason for throwing in a CAS every now and then,
59 and so far we have no evidence that it can improve performance.
60 If that would be the case, we have to adjust other spin-waiting loops
61 elsewhere, too!
62 Thus we use relaxed MO reads until we observe the lock to not be
63 acquired anymore. */
64 do
65 {
66 /* TODO Back-off. */
67
68 atomic_spin_nop ();
69
70 val = atomic_load_relaxed (lock);
71 }
72 while (val != 0);
73
74 /* We need acquire memory order here for the same reason as mentioned
75 for the first try to lock the spinlock. */
76 }
77 while (!atomic_compare_exchange_weak_acquire (lock, &val, 1));
78
79 return 0;
80}
81

Warning: That file was not part of the compilation database. It may have many parsing errors.