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| 1 | /* FPU control word bits. Alpha-mapped-to-Intel version. |
|---|---|
| 2 | Copyright (C) 1996-2022 Free Software Foundation, Inc. |
| 3 | This file is part of the GNU C Library. |
| 4 | |
| 5 | The GNU C Library is free software; you can redistribute it and/or |
| 6 | modify it under the terms of the GNU Lesser General Public |
| 7 | License as published by the Free Software Foundation; either |
| 8 | version 2.1 of the License, or (at your option) any later version. |
| 9 | |
| 10 | The GNU C Library is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | Lesser General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU Lesser General Public |
| 16 | License along with the GNU C Library. If not, see |
| 17 | <https://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #ifndef _ALPHA_FPU_CONTROL_H |
| 20 | #define _ALPHA_FPU_CONTROL_H |
| 21 | |
| 22 | /* |
| 23 | * Since many programs seem to hardcode the values passed to __setfpucw() |
| 24 | * (rather than using the manifest constants) we emulate the x87 interface |
| 25 | * here (at least where this makes sense). |
| 26 | * |
| 27 | * 15-13 12 11-10 9-8 7-6 5 4 3 2 1 0 |
| 28 | * | reserved | IC | RC | PC | reserved | PM | UM | OM | ZM | DM | IM |
| 29 | * |
| 30 | * IM: Invalid operation mask |
| 31 | * DM: Denormalized operand mask |
| 32 | * ZM: Zero-divide mask |
| 33 | * OM: Overflow mask |
| 34 | * UM: Underflow mask |
| 35 | * PM: Precision (inexact result) mask |
| 36 | * |
| 37 | * Mask bit is 1 means no interrupt. |
| 38 | * |
| 39 | * PC: Precision control |
| 40 | * 11 - round to extended precision |
| 41 | * 10 - round to double precision |
| 42 | * 00 - round to single precision |
| 43 | * |
| 44 | * RC: Rounding control |
| 45 | * 00 - rounding to nearest |
| 46 | * 01 - rounding down (toward - infinity) |
| 47 | * 10 - rounding up (toward + infinity) |
| 48 | * 11 - rounding toward zero |
| 49 | * |
| 50 | * IC: Infinity control |
| 51 | * That is for 8087 and 80287 only. |
| 52 | * |
| 53 | * The hardware default is 0x037f. I choose 0x1372. |
| 54 | */ |
| 55 | |
| 56 | #include <features.h> |
| 57 | |
| 58 | /* masking of interrupts */ |
| 59 | #define _FPU_MASK_IM 0x01 |
| 60 | #define _FPU_MASK_DM 0x02 |
| 61 | #define _FPU_MASK_ZM 0x04 |
| 62 | #define _FPU_MASK_OM 0x08 |
| 63 | #define _FPU_MASK_UM 0x10 |
| 64 | #define _FPU_MASK_PM 0x20 |
| 65 | |
| 66 | /* precision control -- without effect on Alpha */ |
| 67 | #define _FPU_EXTENDED 0x300 /* RECOMMENDED */ |
| 68 | #define _FPU_DOUBLE 0x200 |
| 69 | #define _FPU_SINGLE 0x0 /* DO NOT USE */ |
| 70 | |
| 71 | /* |
| 72 | * rounding control---notice that on the Alpha this affects only |
| 73 | * instructions with the dynamic rounding mode qualifier (/d). |
| 74 | */ |
| 75 | #define _FPU_RC_NEAREST 0x000 /* RECOMMENDED */ |
| 76 | #define _FPU_RC_DOWN 0x400 |
| 77 | #define _FPU_RC_UP 0x800 |
| 78 | #define _FPU_RC_ZERO 0xC00 |
| 79 | |
| 80 | #define _FPU_RESERVED 0xF0C0 /* Reserved bits in cw */ |
| 81 | |
| 82 | |
| 83 | /* Now two recommended cw */ |
| 84 | |
| 85 | /* Linux default: |
| 86 | - extended precision |
| 87 | - rounding to positive infinity. There is no /p instruction |
| 88 | qualifier. By setting the dynamic rounding mode to +infinity, |
| 89 | one can use /d to get round to +infinity with no extra overhead |
| 90 | (so long as the default isn't changed, of course...) |
| 91 | - no exceptions enabled. */ |
| 92 | |
| 93 | #define _FPU_DEFAULT 0x137f |
| 94 | |
| 95 | /* IEEE: same as above. */ |
| 96 | #define _FPU_IEEE 0x137f |
| 97 | |
| 98 | /* Type of the control word. */ |
| 99 | typedef unsigned int fpu_control_t; |
| 100 | |
| 101 | /* Default control word set at startup. */ |
| 102 | extern fpu_control_t __fpu_control; |
| 103 | |
| 104 | #endif /* _ALPHA_FPU_CONTROL */ |
| 105 |
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