1/* Install given floating-point control modes. ARM version.
2 Copyright (C) 2016-2022 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
18
19#include <fenv.h>
20#include <fpu_control.h>
21#include <arm-features.h>
22
23/* NZCV flags, QC bit, IDC bit and bits for IEEE exception status. */
24#define FPU_STATUS_BITS 0xf800009f
25
26int
27fesetmode (const femode_t *modep)
28{
29 fpu_control_t fpscr, new_fpscr;
30
31 if (!ARM_HAVE_VFP)
32 /* Nothing to do. */
33 return 0;
34
35 _FPU_GETCW (fpscr);
36 if (modep == FE_DFL_MODE)
37 new_fpscr = (fpscr & (_FPU_RESERVED | FPU_STATUS_BITS)) | _FPU_DEFAULT;
38 else
39 new_fpscr = (fpscr & FPU_STATUS_BITS) | (*modep & ~FPU_STATUS_BITS);
40
41 if (((new_fpscr ^ fpscr) & ~_FPU_MASK_NZCV) != 0)
42 _FPU_SETCW (new_fpscr);
43
44 return 0;
45}
46

source code of glibc/sysdeps/arm/fesetmode.c